target/linux/brcm47xx/patches-2.6.25/690-mips-allow-pciregister-after-boot.patch

   1 Allow registering PCI devices after early boot.
   2
   3 This is an ugly hack and needs to be rewritten before going upstream.
   4 --- a/arch/mips/pci/pci.c
   5 +++ b/arch/mips/pci/pci.c
   6 @@ -21,6 +21,17 @@
   7   */
   8  int pci_probe_only;
   9
  10 +/*
  11 + * Indicate whether PCI-bios init was already done.
  12 + */
  13 +static int pcibios_init_done;
  14 +
  15 +/*
  16 + * The currently used busnumber.
  17 + */
  18 +static int next_busno;
  19 +static int need_domain_info;
  20 +
  21  #define PCI_ASSIGN_ALL_BUSSES  1
  22
  23  unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES;
  24 @@ -75,8 +86,32 @@ pcibios_align_resource(void *data, struc
  25         res->start = start;
  26  }
  27
  28 -void __devinit register_pci_controller(struct pci_controller *hose)
  29 +/* Most MIPS systems have straight-forward swizzling needs.  */
  30 +
  31 +static inline u8 bridge_swizzle(u8 pin, u8 slot)
  32 +{
  33 +       return (((pin - 1) + slot) % 4) + 1;
  34 +}
  35 +
  36 +static u8 common_swizzle(struct pci_dev *dev, u8 *pinp)
  37  {
  38 +       u8 pin = *pinp;
  39 +
  40 +       while (dev->bus->parent) {
  41 +               pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
  42 +               /* Move up the chain of bridges. */
  43 +               dev = dev->bus->self;
  44 +        }
  45 +       *pinp = pin;
  46 +
  47 +       /* The slot is the slot of the last bridge. */
  48 +       return PCI_SLOT(dev->devfn);
  49 +}
  50 +
  51 +void register_pci_controller(struct pci_controller *hose)
  52 +{
  53 +       struct pci_bus *bus;
  54 +
  55         if (request_resource(&iomem_resource, hose->mem_resource) < 0)
  56                 goto out;
  57         if (request_resource(&ioport_resource, hose->io_resource) < 0) {
  58 @@ -84,9 +119,6 @@ void __devinit register_pci_controller(s
  59                 goto out;
  60         }
  61
  62 -       *hose_tail = hose;
  63 -       hose_tail = &hose->next;
  64 -
  65         /*
  66          * Do not panic here but later - this might hapen before console init.
  67          */
  68 @@ -94,41 +126,47 @@ void __devinit register_pci_controller(s
  69                 printk(KERN_WARNING
  70                        "registering PCI controller with io_map_base unset\n");
  71         }
  72 -       return;
  73
  74 -out:
  75 -       printk(KERN_WARNING
  76 -              "Skipping PCI bus scan due to resource conflict\n");
  77 -}
  78 +       if (pcibios_init_done) {
  79 +               //TODO
  80
  81 -/* Most MIPS systems have straight-forward swizzling needs.  */
  82 +               printk(KERN_INFO "Registering a PCI bus after boot\n");
  83
  84 -static inline u8 bridge_swizzle(u8 pin, u8 slot)
  85 -{
  86 -       return (((pin - 1) + slot) % 4) + 1;
  87 -}
  88 +               if (!hose->iommu)
  89 +                       PCI_DMA_BUS_IS_PHYS = 1;
  90
  91 -static u8 __init common_swizzle(struct pci_dev *dev, u8 *pinp)
  92 -{
  93 -       u8 pin = *pinp;
  94 +               bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
  95 +               hose->bus = bus;
  96 +               need_domain_info = need_domain_info || hose->index;
  97 +               hose->need_domain_info = need_domain_info;
  98 +               if (bus) {
  99 +                       next_busno = bus->subordinate + 1;
 100 +                       /* Don't allow 8-bit bus number overflow inside the hose -
 101 +                          reserve some space for bridges. */
 102 +                       if (next_busno > 224) {
 103 +                               next_busno = 0;
 104 +                               need_domain_info = 1;
 105 +                       }
 106 +               }
 107 +               if (!pci_probe_only)
 108 +                       pci_assign_unassigned_resources();
 109 +               pci_fixup_irqs(common_swizzle, pcibios_map_irq);
 110 +       } else {
 111 +               *hose_tail = hose;
 112 +               hose_tail = &hose->next;
 113 +       }
 114
 115 -       while (dev->bus->parent) {
 116 -               pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
 117 -               /* Move up the chain of bridges. */
 118 -               dev = dev->bus->self;
 119 -        }
 120 -       *pinp = pin;
 121 +       return;
 122
 123 -       /* The slot is the slot of the last bridge. */
 124 -       return PCI_SLOT(dev->devfn);
 125 +out:
 126 +       printk(KERN_WARNING
 127 +              "Skipping PCI bus scan due to resource conflict\n");
 128  }
 129
 130  static int __init pcibios_init(void)
 131  {
 132         struct pci_controller *hose;
 133         struct pci_bus *bus;
 134 -       int next_busno;
 135 -       int need_domain_info = 0;
 136
 137         /* Scan all of the recorded PCI controllers.  */
 138         for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
 139 @@ -157,6 +195,7 @@ static int __init pcibios_init(void)
 140         if (!pci_probe_only)
 141                 pci_assign_unassigned_resources();
 142         pci_fixup_irqs(common_swizzle, pcibios_map_irq);
 143 +       pcibios_init_done = 1;
 144
 145         return 0;
 146  }
 147 --- a/drivers/ssb/main.c
 148 +++ b/drivers/ssb/main.c
 149 @@ -1191,9 +1191,7 @@ static int __init ssb_modinit(void)
 150  /* ssb must be initialized after PCI but before the ssb drivers.
 151   * That means we must use some initcall between subsys_initcall
 152   * and device_initcall. */
 153 -//FIXME on embedded we need to be early to make sure we can register
 154 -//      a new PCI bus, if needed.
 155 -subsys_initcall(ssb_modinit);
 156 +fs_initcall(ssb_modinit);
 157
 158  static void __exit ssb_modexit(void)
 159  {