1 --- a/arch/mips/ar7/platform.c
2 +++ b/arch/mips/ar7/platform.c
3 @@ -769,22 +769,31 @@ static int __init ar7_register_devices(v
6 if (ar7_has_high_cpmac()) {
7 - res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
8 + fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_high_titan.id : cpmac_high.id,
11 - cpmac_get_mac(1, cpmac_high_data.dev_addr);
13 - res = platform_device_register(&cpmac_high);
14 + cpmac_get_mac(1, ar7_is_titan() ? cpmac_high_data_titan.dev_addr :
15 + cpmac_high_data.dev_addr);
16 + res = platform_device_register(ar7_is_titan() ? &cpmac_high_titan :
19 pr_warning("unable to register cpmac-high: %d\n", res);
21 pr_warning("unable to add cpmac-high phy: %d\n", res);
23 - cpmac_low_data.phy_mask = 0xffffffff;
26 + cpmac_low_data_titan.phy_mask = 0xffffffff;
28 + cpmac_low_data.phy_mask = 0xffffffff;
31 - res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
32 + res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_low_titan.id : cpmac_low.id,
35 - cpmac_get_mac(0, cpmac_low_data.dev_addr);
36 - res = platform_device_register(&cpmac_low);
37 + cpmac_get_mac(0, ar7_is_titan() ? cpmac_low_data_titan.dev_addr :
38 + cpmac_low_data.dev_addr);
39 + res = platform_device_register(ar7_is_titan() ? &cpmac_low_titan :
42 pr_warning("unable to register cpmac-low: %d\n", res);
44 --- a/drivers/net/cpmac.c
45 +++ b/drivers/net/cpmac.c
46 @@ -1158,6 +1158,8 @@ static int __devinit cpmac_probe(struct
50 + ar7_device_reset(pdata->reset_bit);
52 dev->irq = platform_get_irq_byname(pdev, "irq");
54 dev->netdev_ops = &cpmac_netdev_ops;
55 @@ -1234,7 +1236,7 @@ int __devinit cpmac_init(void)
56 cpmac_mii->reset = cpmac_mdio_reset;
57 cpmac_mii->irq = mii_irqs;
59 - cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
60 + cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256);
62 if (!cpmac_mii->priv) {
63 printk(KERN_ERR "Can't ioremap mdio registers\n");
64 @@ -1245,10 +1247,17 @@ int __devinit cpmac_init(void)
65 #warning FIXME: unhardcode gpio&reset bits
68 - ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
69 - ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
71 + if (!ar7_is_titan()) {
72 + ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
73 + ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
75 ar7_device_reset(AR7_RESET_BIT_EPHY);
77 + if (ar7_is_titan()) {
78 + ar7_device_reset(TITAN_RESET_BIT_EPHY1);
81 cpmac_mii->reset(cpmac_mii);
83 for (i = 0; i < 300; i++)
84 @@ -1263,7 +1272,8 @@ int __devinit cpmac_init(void)
88 - cpmac_mii->phy_mask = ~(mask | 0x80000000);
89 + cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000):
90 + ~(mask | 0x80000000);
91 snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
93 res = mdiobus_register(cpmac_mii);
94 --- a/arch/mips/include/asm/mach-ar7/ar7.h
95 +++ b/arch/mips/include/asm/mach-ar7/ar7.h
97 #define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00)
98 #define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
100 -#define TITAN_REGS_MAC0 (0x08640000)
101 -#define TITAN_REGS_MAC1 (TITAN_REGS_MAC0 + 0x0800)
102 +#define TITAN_REGS_ESWITCH_BASE (0x08640000)
103 +#define TITAN_REGS_MAC0 (TITAN_REGS_ESWITCH_BASE + 0)
104 +#define TITAN_REGS_MAC1 (TITAN_REGS_ESWITCH_BASE + 0x0800)
105 +#define TITAN_REGS_MDIO (TITAN_REGS_ESWITCH_BASE + 0x02000)
106 #define TITAN_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1c00)
107 #define TITAN_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1300)