1 From: David Daney <ddaney@caviumnetworks.com>
2 Date: Thu, 20 Aug 2009 21:10:22 +0000 (-0700)
3 Subject: MIPS: Octeon: Add hardware RNG platform device.
4 X-Git-Tag: linux-2.6.32-rc1~34
5 X-Git-Url: http://www.linux-mips.org/git?p=linux.git;a=commitdiff_plain;h=c691b963;hp=a68577bc6ce2b5e422cdb7a993b1c07cc410e02a
7 MIPS: Octeon: Add hardware RNG platform device.
9 Add a platform device for the Octeon Random Number Generator (RNG).
11 Signed-off-by: David Daney <ddaney@caviumnetworks.com>
12 Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
13 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
16 Index: linux-2.6.30.8/arch/mips/cavium-octeon/setup.c
17 ===================================================================
18 --- linux-2.6.30.8.orig/arch/mips/cavium-octeon/setup.c 2009-09-24 17:28:02.000000000 +0200
19 +++ linux-2.6.30.8/arch/mips/cavium-octeon/setup.c 2009-10-08 13:10:09.000000000 +0200
23 #include <asm/octeon/octeon.h>
24 +#include <asm/octeon/cvmx-rnm-defs.h>
26 #ifdef CONFIG_CAVIUM_DECODE_RSL
27 extern void cvmx_interrupt_rsl_decode(void);
31 device_initcall(octeon_cf_device_init);
33 +/* Octeon Random Number Generator. */
34 +static int __init octeon_rng_device_init(void)
36 + struct platform_device *pd;
39 + struct resource rng_resources[] = {
41 + .flags = IORESOURCE_MEM,
42 + .start = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS),
43 + .end = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS) + 0xf
45 + .flags = IORESOURCE_MEM,
46 + .start = cvmx_build_io_address(8, 0),
47 + .end = cvmx_build_io_address(8, 0) + 0x7
51 + pd = platform_device_alloc("octeon_rng", -1);
57 + ret = platform_device_add_resources(pd, rng_resources,
58 + ARRAY_SIZE(rng_resources));
62 + ret = platform_device_add(pd);
68 + platform_device_put(pd);
73 +device_initcall(octeon_rng_device_init);
74 Index: linux-2.6.30.8/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
75 ===================================================================
76 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
77 +++ linux-2.6.30.8/arch/mips/include/asm/octeon/cvmx-rnm-defs.h 2009-10-08 13:10:09.000000000 +0200
79 +/***********************license start***************
80 + * Author: Cavium Networks
82 + * Contact: support@caviumnetworks.com
83 + * This file is part of the OCTEON SDK
85 + * Copyright (c) 2003-2008 Cavium Networks
87 + * This file is free software; you can redistribute it and/or modify
88 + * it under the terms of the GNU General Public License, Version 2, as
89 + * published by the Free Software Foundation.
91 + * This file is distributed in the hope that it will be useful, but
92 + * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
93 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
94 + * NONINFRINGEMENT. See the GNU General Public License for more
97 + * You should have received a copy of the GNU General Public License
98 + * along with this file; if not, write to the Free Software
99 + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
100 + * or visit http://www.gnu.org/licenses/.
102 + * This file may also be available under a different license from Cavium.
103 + * Contact Cavium Networks for more information
104 + ***********************license end**************************************/
106 +#ifndef __CVMX_RNM_DEFS_H__
107 +#define __CVMX_RNM_DEFS_H__
109 +#include <linux/types.h>
111 +#define CVMX_RNM_BIST_STATUS \
112 + CVMX_ADD_IO_SEG(0x0001180040000008ull)
113 +#define CVMX_RNM_CTL_STATUS \
114 + CVMX_ADD_IO_SEG(0x0001180040000000ull)
116 +union cvmx_rnm_bist_status {
118 + struct cvmx_rnm_bist_status_s {
119 + uint64_t reserved_2_63:62;
123 + struct cvmx_rnm_bist_status_s cn30xx;
124 + struct cvmx_rnm_bist_status_s cn31xx;
125 + struct cvmx_rnm_bist_status_s cn38xx;
126 + struct cvmx_rnm_bist_status_s cn38xxp2;
127 + struct cvmx_rnm_bist_status_s cn50xx;
128 + struct cvmx_rnm_bist_status_s cn52xx;
129 + struct cvmx_rnm_bist_status_s cn52xxp1;
130 + struct cvmx_rnm_bist_status_s cn56xx;
131 + struct cvmx_rnm_bist_status_s cn56xxp1;
132 + struct cvmx_rnm_bist_status_s cn58xx;
133 + struct cvmx_rnm_bist_status_s cn58xxp1;
136 +union cvmx_rnm_ctl_status {
138 + struct cvmx_rnm_ctl_status_s {
139 + uint64_t reserved_9_63:55;
140 + uint64_t ent_sel:4;
141 + uint64_t exp_ent:1;
142 + uint64_t rng_rst:1;
143 + uint64_t rnm_rst:1;
147 + struct cvmx_rnm_ctl_status_cn30xx {
148 + uint64_t reserved_4_63:60;
149 + uint64_t rng_rst:1;
150 + uint64_t rnm_rst:1;
154 + struct cvmx_rnm_ctl_status_cn30xx cn31xx;
155 + struct cvmx_rnm_ctl_status_cn30xx cn38xx;
156 + struct cvmx_rnm_ctl_status_cn30xx cn38xxp2;
157 + struct cvmx_rnm_ctl_status_s cn50xx;
158 + struct cvmx_rnm_ctl_status_s cn52xx;
159 + struct cvmx_rnm_ctl_status_s cn52xxp1;
160 + struct cvmx_rnm_ctl_status_s cn56xx;
161 + struct cvmx_rnm_ctl_status_s cn56xxp1;
162 + struct cvmx_rnm_ctl_status_s cn58xx;
163 + struct cvmx_rnm_ctl_status_s cn58xxp1;
167 Index: linux-2.6.30.8/drivers/char/hw_random/Kconfig
168 ===================================================================
169 --- linux-2.6.30.8.orig/drivers/char/hw_random/Kconfig 2009-09-24 17:28:02.000000000 +0200
170 +++ linux-2.6.30.8/drivers/char/hw_random/Kconfig 2009-10-08 13:10:09.000000000 +0200
175 +config HW_RANDOM_OCTEON
176 + tristate "Octeon Random Number Generator support"
177 + depends on HW_RANDOM && CPU_CAVIUM_OCTEON
180 + This driver provides kernel-side support for the Random Number
181 + Generator hardware found on Octeon processors.
183 + To compile this driver as a module, choose M here: the
184 + module will be called octeon-rng.
188 config HW_RANDOM_PASEMI
189 tristate "PA Semi HW Random Number Generator support"
190 depends on HW_RANDOM && PPC_PASEMI
191 Index: linux-2.6.30.8/drivers/char/hw_random/Makefile
192 ===================================================================
193 --- linux-2.6.30.8.orig/drivers/char/hw_random/Makefile 2009-09-24 17:28:02.000000000 +0200
194 +++ linux-2.6.30.8/drivers/char/hw_random/Makefile 2009-10-08 13:10:23.000000000 +0200
196 obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o
197 obj-$(CONFIG_HW_RANDOM_PASEMI) += pasemi-rng.o
198 obj-$(CONFIG_HW_RANDOM_VIRTIO) += virtio-rng.o
199 +obj-$(CONFIG_HW_RANDOM_OCTEON) += octeon-rng.o
200 Index: linux-2.6.30.8/drivers/char/hw_random/octeon-rng.c
201 ===================================================================
202 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
203 +++ linux-2.6.30.8/drivers/char/hw_random/octeon-rng.c 2009-10-08 13:10:09.000000000 +0200
206 + * Hardware Random Number Generator support for Cavium Networks
207 + * Octeon processor family.
209 + * This file is subject to the terms and conditions of the GNU General Public
210 + * License. See the file "COPYING" in the main directory of this archive
211 + * for more details.
213 + * Copyright (C) 2009 Cavium Networks
216 +#include <linux/module.h>
217 +#include <linux/init.h>
218 +#include <linux/platform_device.h>
219 +#include <linux/device.h>
220 +#include <linux/hw_random.h>
221 +#include <linux/io.h>
223 +#include <asm/octeon/octeon.h>
224 +#include <asm/octeon/cvmx-rnm-defs.h>
228 + void __iomem *control_status;
229 + void __iomem *result;
232 +static int octeon_rng_init(struct hwrng *rng)
234 + union cvmx_rnm_ctl_status ctl;
235 + struct octeon_rng *p = container_of(rng, struct octeon_rng, ops);
238 + ctl.s.ent_en = 1; /* Enable the entropy source. */
239 + ctl.s.rng_en = 1; /* Enable the RNG hardware. */
240 + cvmx_write_csr((u64)p->control_status, ctl.u64);
244 +static void octeon_rng_cleanup(struct hwrng *rng)
246 + union cvmx_rnm_ctl_status ctl;
247 + struct octeon_rng *p = container_of(rng, struct octeon_rng, ops);
250 + /* Disable everything. */
251 + cvmx_write_csr((u64)p->control_status, ctl.u64);
254 +static int octeon_rng_data_read(struct hwrng *rng, u32 *data)
256 + struct octeon_rng *p = container_of(rng, struct octeon_rng, ops);
258 + *data = cvmx_read64_uint32((u64)p->result);
259 + return sizeof(u32);
262 +static int __devinit octeon_rng_probe(struct platform_device *pdev)
264 + struct resource *res_ports;
265 + struct resource *res_result;
266 + struct octeon_rng *rng;
268 + struct hwrng ops = {
270 + .init = octeon_rng_init,
271 + .cleanup = octeon_rng_cleanup,
272 + .data_read = octeon_rng_data_read
275 + rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
279 + res_ports = platform_get_resource(pdev, IORESOURCE_MEM, 0);
283 + res_result = platform_get_resource(pdev, IORESOURCE_MEM, 1);
288 + rng->control_status = devm_ioremap_nocache(&pdev->dev,
291 + if (!rng->control_status)
294 + rng->result = devm_ioremap_nocache(&pdev->dev,
302 + dev_set_drvdata(&pdev->dev, &rng->ops);
303 + ret = hwrng_register(&rng->ops);
307 + dev_info(&pdev->dev, "Octeon Random Number Generator\n");
311 + devm_iounmap(&pdev->dev, rng->control_status);
313 + devm_iounmap(&pdev->dev, rng->result);
315 + devm_kfree(&pdev->dev, rng);
319 +static int __exit octeon_rng_remove(struct platform_device *pdev)
321 + struct hwrng *rng = dev_get_drvdata(&pdev->dev);
323 + hwrng_unregister(rng);
328 +static struct platform_driver octeon_rng_driver = {
330 + .name = "octeon_rng",
331 + .owner = THIS_MODULE,
333 + .probe = octeon_rng_probe,
334 + .remove = __exit_p(octeon_rng_remove),
337 +static int __init octeon_rng_mod_init(void)
339 + return platform_driver_register(&octeon_rng_driver);
342 +static void __exit octeon_rng_mod_exit(void)
344 + platform_driver_unregister(&octeon_rng_driver);
347 +module_init(octeon_rng_mod_init);
348 +module_exit(octeon_rng_mod_exit);
350 +MODULE_AUTHOR("David Daney");
351 +MODULE_LICENSE("GPL");