1 --- a/arch/arm/mach-ixp4xx/cambria-setup.c
2 +++ b/arch/arm/mach-ixp4xx/cambria-setup.c
4 #include <asm/mach-types.h>
5 #include <asm/mach/arch.h>
6 #include <asm/mach/flash.h>
7 +#include <linux/irq.h>
9 struct cambria_board_info {
12 .resource = &cambria_uart_resource,
15 +static struct resource cambria_optional_uart_resources[] = {
17 + .start = 0x52000000,
19 + .flags = IORESOURCE_MEM
22 + .start = 0x53000000,
24 + .flags = IORESOURCE_MEM
28 +static struct plat_serial8250_port cambria_optional_uart_data[] = {
30 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_BUGGY_UART,
36 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_BUGGY_UART,
44 +static struct platform_device cambria_optional_uart = {
45 + .name = "serial8250",
46 + .id = PLAT8250_DEV_PLATFORM1,
47 + .dev.platform_data = cambria_optional_uart_data,
49 + .resource = cambria_optional_uart_resources,
52 static struct resource cambria_pata_resources[] = {
54 .flags = IORESOURCE_MEM
56 #ifdef CONFIG_SENSORS_EEPROM
57 static void __init cambria_gw2350_setup(void)
59 + *IXP4XX_EXP_CS2 = 0xbfff0003;
60 + set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_BOTH);
61 + cambria_optional_uart_data[0].mapbase = IXP4XX_EXP_BUS_BASE(2);
62 + cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(IXP4XX_EXP_BUS_BASE(2), 0x0fff);
63 + cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
65 + *IXP4XX_EXP_CS3 = 0xbfff0003;
66 + set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_BOTH);
67 + cambria_optional_uart_data[1].mapbase = IXP4XX_EXP_BUS_BASE(3);
68 + cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(IXP4XX_EXP_BUS_BASE(3), 0x0fff);
69 + cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
71 + platform_device_register(&cambria_optional_uart);
72 platform_device_register(&cambria_npec_device);
73 platform_device_register(&cambria_npea_device);
77 static void __init cambria_gw2358_setup(void)
79 + *IXP4XX_EXP_CS3 = 0xbfff0003;
80 + set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_BOTH);
81 + cambria_optional_uart_data[0].mapbase = 0x53FC0000;
82 + cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x53FC0000, 0x0fff);
83 + cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
85 + *IXP4XX_EXP_CS3 = 0xbfff0003;
86 + set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_BOTH);
87 + cambria_optional_uart_data[1].mapbase = 0x53F80000;
88 + cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53F80000, 0x0fff);
89 + cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
91 + platform_device_register(&cambria_optional_uart);
93 platform_device_register(&cambria_npec_device);
94 platform_device_register(&cambria_npea_device);