1 Triggering TX before the write to the DMA status mask register leads to
2 transferring packets with maximum payload no matter what the actual
4 While here, also trigger RX scheduling after writing the DMA status mask
5 register, like it was in the original driver before it was sent
8 Signed-off-by: Phil Sutter <n0-1@freewrt.org>
10 --- a/drivers/net/korina.c
11 +++ b/drivers/net/korina.c
12 @@ -330,12 +330,12 @@ static irqreturn_t korina_rx_dma_interru
14 dmas = readl(&lp->rx_dma_regs->dmas);
15 if (dmas & (DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR)) {
16 - netif_rx_schedule(dev, &lp->napi);
18 dmasm = readl(&lp->rx_dma_regs->dmasm);
19 writel(dmasm | (DMA_STAT_DONE |
20 DMA_STAT_HALT | DMA_STAT_ERR),
21 &lp->rx_dma_regs->dmasm);
23 + netif_rx_schedule(dev, &lp->napi);
25 if (dmas & DMA_STAT_ERR)
26 printk(KERN_ERR DRV_NAME "%s: DMA error\n", dev->name);
27 @@ -621,11 +621,11 @@ korina_tx_dma_interrupt(int irq, void *d
28 dmas = readl(&lp->tx_dma_regs->dmas);
30 if (dmas & (DMA_STAT_FINI | DMA_STAT_ERR)) {
33 dmasm = readl(&lp->tx_dma_regs->dmasm);
34 writel(dmasm | (DMA_STAT_FINI | DMA_STAT_ERR),
35 &lp->tx_dma_regs->dmasm);
39 if (lp->tx_chain_status == desc_filled &&
40 (readl(&(lp->tx_dma_regs->dmandptr)) == 0)) {