target/linux/ifxmips/files/drivers/net/ifxmips_mii0.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  15  *
  16  *   Copyright (C) 2005 Wu Qi Ming <Qi-Ming.Wu@infineon.com>
  17  *   Copyright (C) 2008 John Crispin <blogic@openwrt.org>
  18  */
  19
  20 #include <linux/kernel.h>
  21 #include <linux/slab.h>
  22 #include <linux/errno.h>
  23 #include <linux/types.h>
  24 #include <linux/interrupt.h>
  25 #include <asm/uaccess.h>
  26 #include <linux/in.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/etherdevice.h>
  29 #include <linux/ip.h>
  30 #include <linux/tcp.h>
  31 #include <linux/skbuff.h>
  32 #include <linux/mm.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/ethtool.h>
  35 #include <asm/checksum.h>
  36 #include <linux/init.h>
  37 #include <asm/delay.h>
  38 #include <asm/ifxmips/ifxmips.h>
  39 #include <asm/ifxmips/ifxmips_mii0.h>
  40 #include <asm/ifxmips/ifxmips_dma.h>
  41 #include <asm/ifxmips/ifxmips_pmu.h>
  42
  43 static struct net_device *ifxmips_mii0_dev;
  44 static unsigned char mac_addr[MAX_ADDR_LEN];
  45
  46 void
  47 ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
  48 {
  49         u32 val = MDIO_ACC_REQUEST |
  50                 ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
  51                 ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET) |
  52                 phy_data;
  53
  54         while(ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST);
  55         ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
  56 }
  57
  58 unsigned short
  59 ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
  60 {
  61         u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
  62                 ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
  63                 ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET);
  64
  65         ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
  66         while(ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST){};
  67         val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
  68         return val;
  69 }
  70
  71 int
  72 ifxmips_ifxmips_mii_open(struct net_device *dev)
  73 {
  74         struct ifxmips_mii_priv* priv = (struct ifxmips_mii_priv*)dev->priv;
  75         struct dma_device_info* dma_dev = priv->dma_device;
  76         int i;
  77
  78         for(i = 0; i < dma_dev->max_rx_chan_num; i++)
  79         {
  80                 if((dma_dev->rx_chan[i])->control == IFXMIPS_DMA_CH_ON)
  81                         (dma_dev->rx_chan[i])->open(dma_dev->rx_chan[i]);
  82         }
  83         netif_start_queue(dev);
  84         return 0;
  85 }
  86
  87 int
  88 ifxmips_mii_release(struct net_device *dev){
  89         struct ifxmips_mii_priv* priv = (struct ifxmips_mii_priv*)dev->priv;
  90         struct dma_device_info* dma_dev = priv->dma_device;
  91         int i;
  92
  93         for(i = 0; i < dma_dev->max_rx_chan_num; i++)
  94                 dma_dev->rx_chan[i]->close(dma_dev->rx_chan[i]);
  95         netif_stop_queue(dev);
  96         return 0;
  97 }
  98
  99 int
 100 ifxmips_mii_hw_receive(struct net_device* dev,struct dma_device_info* dma_dev)
 101 {
 102         struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv*)dev->priv;
 103         unsigned char* buf = NULL;
 104         struct sk_buff *skb = NULL;
 105         int len = 0;
 106
 107         len = dma_device_read(dma_dev, &buf, (void**)&skb);
 108
 109         if(len >= ETHERNET_PACKET_DMA_BUFFER_SIZE)
 110         {
 111                 printk(KERN_INFO "ifxmips_mii0: packet too large %d\n",len);
 112                 goto ifxmips_mii_hw_receive_err_exit;
 113         }
 114
 115         /* remove CRC */
 116         len -= 4;
 117         if(skb == NULL)
 118         {
 119                 printk(KERN_INFO "ifxmips_mii0: cannot restore pointer\n");
 120                 goto ifxmips_mii_hw_receive_err_exit;
 121         }
 122
 123         if(len > (skb->end - skb->tail))
 124         {
 125                 printk(KERN_INFO "ifxmips_mii0: BUG, len:%d end:%p tail:%p\n",
 126                         (len+4), skb->end, skb->tail);
 127                 goto ifxmips_mii_hw_receive_err_exit;
 128         }
 129
 130         skb_put(skb, len);
 131         skb->dev = dev;
 132         skb->protocol = eth_type_trans(skb, dev);
 133         netif_rx(skb);
 134
 135         priv->stats.rx_packets++;
 136         priv->stats.rx_bytes += len;
 137         return 0;
 138
 139 ifxmips_mii_hw_receive_err_exit:
 140         if(len == 0)
 141         {
 142                 if(skb)
 143                         dev_kfree_skb_any(skb);
 144                 priv->stats.rx_errors++;
 145                 priv->stats.rx_dropped++;
 146                 return -EIO;
 147         } else {
 148                 return len;
 149         }
 150 }
 151
 152 int
 153 ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
 154 {
 155         int ret = 0;
 156         struct ifxmips_mii_priv *priv = dev->priv;
 157         struct dma_device_info* dma_dev = priv->dma_device;
 158         ret = dma_device_write(dma_dev, buf, len, priv->skb);
 159         return ret;
 160 }
 161
 162 int
 163 ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
 164 {
 165         int len;
 166         char *data;
 167         struct ifxmips_mii_priv *priv = dev->priv;
 168         struct dma_device_info* dma_dev = priv->dma_device;
 169
 170         len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
 171         data = skb->data;
 172         priv->skb = skb;
 173         dev->trans_start = jiffies;
 174         // TODO we got more than 1 dma channel, so we should do something intelligent
 175         // here to select one
 176         dma_dev->current_tx_chan = 0;
 177
 178         wmb();
 179
 180         if(ifxmips_mii_hw_tx(data, len, dev) != len)
 181         {
 182                 dev_kfree_skb_any(skb);
 183                 priv->stats.tx_errors++;
 184                 priv->stats.tx_dropped++;
 185         } else {
 186                 priv->stats.tx_packets++;
 187                 priv->stats.tx_bytes+=len;
 188         }
 189
 190         return 0;
 191 }
 192
 193 void
 194 ifxmips_mii_tx_timeout(struct net_device *dev)
 195 {
 196         int i;
 197         struct ifxmips_mii_priv* priv = (struct ifxmips_mii_priv*)dev->priv;
 198
 199         priv->stats.tx_errors++;
 200         for(i = 0; i < priv->dma_device->max_tx_chan_num; i++)
 201                 priv->dma_device->tx_chan[i]->disable_irq(priv->dma_device->tx_chan[i]);
 202         netif_wake_queue(dev);
 203         return;
 204 }
 205
 206 int
 207 dma_intr_handler(struct dma_device_info* dma_dev, int status)
 208 {
 209         int i;
 210
 211         switch(status)
 212         {
 213         case RCV_INT:
 214                 ifxmips_mii_hw_receive(ifxmips_mii0_dev, dma_dev);
 215                 break;
 216
 217         case TX_BUF_FULL_INT:
 218                 printk(KERN_INFO "ifxmips_mii0: tx buffer full\n");
 219                 netif_stop_queue(ifxmips_mii0_dev);
 220                 for (i = 0; i < dma_dev->max_tx_chan_num; i++)
 221                 {
 222                         if ((dma_dev->tx_chan[i])->control==IFXMIPS_DMA_CH_ON)
 223                                 dma_dev->tx_chan[i]->enable_irq(dma_dev->tx_chan[i]);
 224                 }
 225                 break;
 226
 227         case TRANSMIT_CPT_INT:
 228                 for(i = 0; i < dma_dev->max_tx_chan_num; i++)
 229                         dma_dev->tx_chan[i]->disable_irq(dma_dev->tx_chan[i]);
 230
 231                 netif_wake_queue(ifxmips_mii0_dev);
 232                 break;
 233         }
 234
 235         return 0;
 236 }
 237
 238 unsigned char*
 239 ifxmips_etop_dma_buffer_alloc(int len, int *byte_offset, void **opt)
 240 {
 241         unsigned char *buffer = NULL;
 242         struct sk_buff *skb = NULL;
 243
 244         skb = dev_alloc_skb(ETHERNET_PACKET_DMA_BUFFER_SIZE);
 245         if(skb == NULL)
 246                 return NULL;
 247
 248         buffer = (unsigned char*)(skb->data);
 249         skb_reserve(skb, 2);
 250         *(int*)opt = (int)skb;
 251         *byte_offset = 2;
 252
 253         return buffer;
 254 }
 255
 256 void
 257 ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
 258 {
 259         struct sk_buff *skb = NULL;
 260
 261         if(opt == NULL)
 262         {
 263                 kfree(dataptr);
 264         } else {
 265                 skb = (struct sk_buff*)opt;
 266                 dev_kfree_skb_any(skb);
 267         }
 268 }
 269
 270 static struct net_device_stats*
 271 ifxmips_get_stats(struct net_device *dev)
 272 {
 273         return (struct net_device_stats *)dev->priv;
 274 }
 275
 276 static int
 277 ifxmips_mii_dev_init(struct net_device *dev)
 278 {
 279         int i;
 280         struct ifxmips_mii_priv *priv;
 281
 282         ether_setup(dev);
 283         printk(KERN_INFO "ifxmips_mii0: %s is up\n", dev->name);
 284         dev->open = ifxmips_ifxmips_mii_open;
 285         dev->stop = ifxmips_mii_release;
 286         dev->hard_start_xmit = ifxmips_mii_tx;
 287         dev->get_stats = ifxmips_get_stats;
 288         dev->tx_timeout = ifxmips_mii_tx_timeout;
 289         dev->watchdog_timeo = 10 * HZ;
 290         memset(dev->priv, 0, sizeof(struct ifxmips_mii_priv));
 291         priv = dev->priv;
 292         priv->dma_device = dma_device_reserve("PPE");
 293         if(!priv->dma_device){
 294                 BUG();
 295                 return -ENODEV;
 296         }
 297         priv->dma_device->buffer_alloc = &ifxmips_etop_dma_buffer_alloc;
 298         priv->dma_device->buffer_free = &ifxmips_etop_dma_buffer_free;
 299         priv->dma_device->intr_handler = &dma_intr_handler;
 300         priv->dma_device->max_rx_chan_num = 4;
 301
 302         for(i = 0; i < priv->dma_device->max_rx_chan_num; i++)
 303         {
 304                 priv->dma_device->rx_chan[i]->packet_size = ETHERNET_PACKET_DMA_BUFFER_SIZE;
 305                 priv->dma_device->rx_chan[i]->control = IFXMIPS_DMA_CH_ON;
 306         }
 307
 308         for(i = 0; i < priv->dma_device->max_tx_chan_num; i++)
 309                 if(i == 0)
 310                         priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_ON;
 311                 else
 312                         priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_OFF;
 313
 314         dma_device_register(priv->dma_device);
 315
 316         printk(KERN_INFO "ifxmips_mii0: using mac=");
 317         for(i = 0; i < 6; i++)
 318         {
 319                 dev->dev_addr[i] = mac_addr[i];
 320                 printk("%02X%c", dev->dev_addr[i], (i == 5)?('\n'):(':'));
 321         }
 322         return 0;
 323 }
 324
 325 static void
 326 ifxmips_mii_chip_init(int mode)
 327 {
 328         ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
 329         ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
 330
 331         if(mode == REV_MII_MODE)
 332                 ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_REVERSE, IFXMIPS_PPE32_CFG);
 333         else if(mode == MII_MODE)
 334                 ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_NORMAL, IFXMIPS_PPE32_CFG);
 335         ifxmips_w32(PPE32_PLEN_UNDER | PPE32_PLEN_OVER, IFXMIPS_PPE32_IG_PLEN_CTRL);
 336         ifxmips_w32(PPE32_CGEN, IFXMIPS_PPE32_ENET_MAC_CFG);
 337         wmb();
 338 }
 339
 340 static int
 341 ifxmips_mii_probe(struct platform_device *dev)
 342 {
 343         int result = 0;
 344         struct ifxmips_mac *mac = (struct ifxmips_mac*)dev->dev.platform_data;
 345         ifxmips_mii0_dev = alloc_etherdev(sizeof(struct ifxmips_mii_priv));
 346         ifxmips_mii0_dev->init = ifxmips_mii_dev_init;
 347         memcpy(mac_addr, mac->mac, 6);
 348         strcpy(ifxmips_mii0_dev->name, "eth%d");
 349         result = register_netdev(ifxmips_mii0_dev);
 350         if (result)
 351         {
 352                 printk(KERN_INFO "ifxmips_mii0: error %i registering device \"%s\"\n", result, ifxmips_mii0_dev->name);
 353                 goto out;
 354         }
 355
 356         ifxmips_mii_chip_init(REV_MII_MODE);
 357         printk(KERN_INFO "ifxmips_mii0: driver loaded!\n");
 358
 359 out:
 360         return result;
 361 }
 362
 363 static int
 364 ifxmips_mii_remove(struct platform_device *dev)
 365 {
 366         struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv*)ifxmips_mii0_dev->priv;
 367
 368         printk(KERN_INFO "ifxmips_mii0: ifxmips_mii0 cleanup\n");
 369
 370         dma_device_unregister(priv->dma_device);
 371         dma_device_release(priv->dma_device);
 372         kfree(priv->dma_device);
 373         kfree(ifxmips_mii0_dev->priv);
 374         unregister_netdev(ifxmips_mii0_dev);
 375         return 0;
 376 }
 377
 378 static struct
 379 platform_driver ifxmips_mii_driver = {
 380         .probe = ifxmips_mii_probe,
 381         .remove = ifxmips_mii_remove,
 382         .driver = {
 383                 .name = "ifxmips_mii0",
 384                 .owner = THIS_MODULE,
 385         },
 386 };
 387
 388 int __init
 389 ifxmips_mii_init(void)
 390 {
 391         int ret = platform_driver_register(&ifxmips_mii_driver);
 392         if (ret)
 393                 printk(KERN_INFO "ifxmips_mii0: Error registering platfom driver!");
 394         return ret;
 395 }
 396
 397 static void __exit
 398 ifxmips_mii_cleanup(void)
 399 {
 400         platform_driver_unregister(&ifxmips_mii_driver);
 401 }
 402
 403 module_init(ifxmips_mii_init);
 404 module_exit(ifxmips_mii_cleanup);
 405
 406 MODULE_LICENSE("GPL");
 407 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
 408 MODULE_DESCRIPTION("ethernet map driver for IFXMIPS boards");