ath5k: fix tx queue limit for the cabq, fixes warning described in #9465
[openwrt.git] / package / uboot-xburst / files / cpu / mips / jz_serial.c
1 /*
2 * Jz47xx UART support
3 *
4 * Hardcoded to UART 0 for now
5 * Options also hardcoded to 8N1
6 *
7 * Copyright (c) 2005
8 * Ingenic Semiconductor, <jlwei@ingenic.cn>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #include <config.h>
27
28 #if defined(CONFIG_JZ4740)
29
30 #include <common.h>
31
32 #include <asm/jz4740.h>
33
34 #undef UART_BASE
35 #ifndef CONFIG_SYS_UART_BASE
36 #define UART_BASE UART0_BASE
37 #else
38 #define UART_BASE CONFIG_SYS_UART_BASE
39 #endif
40
41 /******************************************************************************
42 *
43 * serial_init - initialize a channel
44 *
45 * This routine initializes the number of data bits, parity
46 * and set the selected baud rate. Interrupts are disabled.
47 * Set the modem control signals if the option is selected.
48 *
49 * RETURNS: N/A
50 */
51
52 int serial_init (void)
53 {
54 #if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
55 volatile u8 *uart_fcr = (volatile u8 *)(UART_BASE + OFF_FCR);
56 volatile u8 *uart_lcr = (volatile u8 *)(UART_BASE + OFF_LCR);
57 volatile u8 *uart_ier = (volatile u8 *)(UART_BASE + OFF_IER);
58 volatile u8 *uart_sircr = (volatile u8 *)(UART_BASE + OFF_SIRCR);
59
60 /* Disable port interrupts while changing hardware */
61 *uart_ier = 0;
62
63 /* Disable UART unit function */
64 *uart_fcr = ~UART_FCR_UUE;
65
66 /* Set both receiver and transmitter in UART mode (not SIR) */
67 *uart_sircr = ~(SIRCR_RSIRE | SIRCR_TSIRE);
68
69 /* Set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
70 *uart_lcr = UART_LCR_WLEN_8 | UART_LCR_STOP_1;
71
72 /* Set baud rate */
73 serial_setbrg();
74
75 /* Enable UART unit, enable and clear FIFO */
76 *uart_fcr = UART_FCR_UUE | UART_FCR_FE | UART_FCR_TFLS | UART_FCR_RFLS;
77 #endif
78 return 0;
79 }
80
81 void serial_setbrg (void)
82 {
83 volatile u8 *uart_lcr = (volatile u8 *)(UART_BASE + OFF_LCR);
84 volatile u8 *uart_dlhr = (volatile u8 *)(UART_BASE + OFF_DLHR);
85 volatile u8 *uart_dllr = (volatile u8 *)(UART_BASE + OFF_DLLR);
86 u32 baud_div, tmp;
87
88 baud_div = CONFIG_SYS_EXTAL / 16 / CONFIG_BAUDRATE;
89
90 tmp = *uart_lcr;
91 tmp |= UART_LCR_DLAB;
92 *uart_lcr = tmp;
93
94 *uart_dlhr = (baud_div >> 8) & 0xff;
95 *uart_dllr = baud_div & 0xff;
96
97 tmp &= ~UART_LCR_DLAB;
98 *uart_lcr = tmp;
99 }
100
101 void serial_putc (const char c)
102 {
103 volatile u8 *uart_lsr = (volatile u8 *)(UART_BASE + OFF_LSR);
104 volatile u8 *uart_tdr = (volatile u8 *)(UART_BASE + OFF_TDR);
105
106 if (c == '\n') serial_putc ('\r');
107
108 /* Wait for fifo to shift out some bytes */
109 while ( !((*uart_lsr & (UART_LSR_TDRQ | UART_LSR_TEMT)) == 0x60) );
110
111 *uart_tdr = (u8)c;
112 }
113
114 void serial_puts (const char *s)
115 {
116 while (*s) {
117 serial_putc (*s++);
118 }
119 }
120
121 int serial_getc (void)
122 {
123 volatile u8 *uart_rdr = (volatile u8 *)(UART_BASE + OFF_RDR);
124
125 while (!serial_tstc());
126
127 return *uart_rdr;
128 }
129
130 int serial_tstc (void)
131 {
132 volatile u8 *uart_lsr = (volatile u8 *)(UART_BASE + OFF_LSR);
133
134 if (*uart_lsr & UART_LSR_DR) {
135 /* Data in rfifo */
136 return (1);
137 }
138 return 0;
139 }
140
141 #endif
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