target/linux/brcm47xx/patches-2.6.23/600-ssb-fix-pcidevices.patch

   1 Index: linux-2.6.23.16/drivers/ssb/driver_pcicore.c
   2 ===================================================================
   3 --- linux-2.6.23.16.orig/drivers/ssb/driver_pcicore.c   2008-02-16 17:55:20.000000000 +0100
   4 +++ linux-2.6.23.16/drivers/ssb/driver_pcicore.c        2008-02-16 17:55:35.000000000 +0100
   5 @@ -66,6 +66,7 @@ int pcibios_plat_dev_init(struct pci_dev
   6                         base = &ssb_pcicore_pcibus_iobase;
   7                 else
   8                         base = &ssb_pcicore_pcibus_membase;
   9 +               res->flags |= IORESOURCE_PCI_FIXED;
  10                 if (res->end) {
  11                         size = res->end - res->start + 1;
  12                         if (*base & (size - 1))
  13 @@ -88,10 +89,12 @@ int pcibios_plat_dev_init(struct pci_dev
  14
  15  static void __init ssb_fixup_pcibridge(struct pci_dev *dev)
  16  {
  17 +       u8 lat;
  18 +
  19         if (dev->bus->number != 0 || PCI_SLOT(dev->devfn) != 0)
  20                 return;
  21
  22 -       ssb_printk(KERN_INFO "PCI: fixing up bridge\n");
  23 +       ssb_printk(KERN_INFO "PCI: Fixing up bridge %s\n", pci_name(dev));
  24
  25         /* Enable PCI bridge bus mastering and memory space */
  26         pci_set_master(dev);
  27 @@ -101,7 +104,10 @@ static void __init ssb_fixup_pcibridge(s
  28         pci_write_config_dword(dev, SSB_BAR1_CONTROL, 3);
  29
  30         /* Make sure our latency is high enough to handle the devices behind us */
  31 -       pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xa8);
  32 +       lat = 168;
  33 +       ssb_printk(KERN_INFO "PCI: Fixing latency timer of device %s to %u\n",
  34 +                  pci_name(dev), lat);
  35 +       pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
  36  }
  37  DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_fixup_pcibridge);
  38
  39 @@ -279,14 +285,14 @@ static struct resource ssb_pcicore_mem_r
  40         .name   = "SSB PCIcore external memory",
  41         .start  = SSB_PCI_DMA,
  42         .end    = SSB_PCI_DMA + SSB_PCI_DMA_SZ - 1,
  43 -       .flags  = IORESOURCE_MEM,
  44 +       .flags  = IORESOURCE_MEM | IORESOURCE_PCI_FIXED,
  45  };
  46
  47  static struct resource ssb_pcicore_io_resource = {
  48         .name   = "SSB PCIcore external I/O",
  49         .start  = 0x100,
  50         .end    = 0x7FF,
  51 -       .flags  = IORESOURCE_IO,
  52 +       .flags  = IORESOURCE_IO | IORESOURCE_PCI_FIXED,
  53  };
  54
  55  static struct pci_controller ssb_pcicore_controller = {
  56 @@ -344,7 +350,8 @@ static void ssb_pcicore_init_hostmode(st
  57         /* Ok, ready to run, register it to the system.
  58          * The following needs change, if we want to port hostmode
  59          * to non-MIPS platform. */
  60 -       set_io_port_base((unsigned long)ioremap_nocache(SSB_PCI_MEM, 0x04000000));
  61 +       ssb_pcicore_controller.io_map_base = (unsigned long)ioremap_nocache(SSB_PCI_MEM, 0x04000000);
  62 +       set_io_port_base(ssb_pcicore_controller.io_map_base);
  63         /* Give some time to the PCI controller to configure itself with the new
  64          * values. Not waiting at this point causes crashes of the machine. */
  65         mdelay(10);