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introduce USB_SUPPORT, clean up some dependencies
[openwrt.git] / target / linux / brcm63xx-2.6 / patches / 001-bcm963xx.patch
1 diff -urN linux.old/arch/mips/bcm963xx/bcm63xx_led.c linux.dev/arch/mips/bcm963xx/bcm63xx_led.c
2 --- linux.old/arch/mips/bcm963xx/bcm63xx_led.c 1970-01-01 01:00:00.000000000 +0100
3 +++ linux.dev/arch/mips/bcm963xx/bcm63xx_led.c 2006-08-25 00:39:38.000000000 +0200
4 @@ -0,0 +1,582 @@
5 +/*
6 +<:copyright-gpl
7 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8 +
9 + This program is free software; you can distribute it and/or modify it
10 + under the terms of the GNU General Public License (Version 2) as
11 + published by the Free Software Foundation.
12 +
13 + This program is distributed in the hope it will be useful, but WITHOUT
14 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 + for more details.
17 +
18 + You should have received a copy of the GNU General Public License along
19 + with this program; if not, write to the Free Software Foundation, Inc.,
20 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
21 +:>
22 +*/
23 +/***************************************************************************
24 + * File Name : bcm63xx_led.c
25 + *
26 + * Description:
27 + *
28 + * This file contains bcm963xx board led control API functions.
29 + *
30 + * To use it, do the following
31 + *
32 + * 1). define in the board.c the following led mappping (this is for 6345GW board):
33 + * const LED_MAP_PAIR cLedMapping45GW[] =
34 + * { // led name Initial state physical pin (ledMask)
35 + * {kLedUsb, kLedStateOff, GPIO_LED_PIN_7},
36 + * {kLedAdsl, kLedStateOff, GPIO_LED_PIN_8},
37 + * {kLedPPP, kLedStateOff, GPIO_LED_PIN_9}, // PPP and WanData share PIN_9
38 + * {kLedWanData, kLedStateOff, GPIO_LED_PIN_9},
39 + * {kLedWireless, kLedStateOff, GPIO_LED_PIN_10},
40 + * {kLedEnd, kLedStateOff, 0 } // NOTE: kLedEnd has to be at the end.
41 + *
42 + * 2). };To initialize led API and initial state of the leds, call the following function with the mapping
43 + * pointer from the above struct
44 + *
45 + * boardLedInit((PLED_MAP_PAIR) &cLedMapping45R);
46 + *
47 + * 3). Sample call for kernel mode:
48 + *
49 + * kerSysLedCtrl(kLedAdsl, kLedStateBlinkOnce); // kLedxxx defines in board.h
50 + *
51 + * 4). Sample call for user mode
52 + *
53 + * sysLedCtrl(kLedAdsl, kLedStateBlinkOnce); // kLedxxx defines in board_api.h
54 + *
55 + *
56 + * Created on : 10/28/2002 seanl
57 + *
58 + ***************************************************************************/
59 +
60 +/* Includes. */
61 +#include <linux/init.h>
62 +#include <linux/fs.h>
63 +#include <linux/capability.h>
64 +#include <linux/slab.h>
65 +#include <linux/errno.h>
66 +#include <linux/module.h>
67 +#include <linux/netdevice.h>
68 +#include <asm/uaccess.h>
69 +
70 +#include <bcm_map_part.h>
71 +#include <board.h>
72 +
73 +#define k100ms (HZ / 10) // ~100 ms
74 +#define kFastBlinkCount 0 // ~100ms
75 +#define kSlowBlinkCount 5 // ~600ms
76 +
77 +#define MAX_VIRT_LEDS 12
78 +
79 +// uncomment // for debug led
80 +//#define DEBUG_LED
81 +
82 +// global variables:
83 +struct timer_list gLedTimer;
84 +int gTimerOn = FALSE;
85 +int gLedCount = 0;
86 +
87 +typedef struct ledinfo
88 +{
89 + unsigned short ledMask; // mask for led: ie. giop 10 = 0x0400
90 + unsigned short ledActiveLow; // GPIO bit reset to turn on LED
91 + unsigned short ledMaskFail; // mask for led: ie. giop 10 = 0x0400
92 + unsigned short ledActiveLowFail;// GPIO bit reset to turn on LED
93 + BOARD_LED_STATE ledState; // current led state
94 + BOARD_LED_STATE savedLedState; // used in blink once for restore to the orignal ledState
95 + int blinkCountDown; // if == 0, do blink (toggle). Is assgined value and dec by 1 at each timer.
96 +} LED_INFO, *PLED_INFO;
97 +
98 +static PLED_INFO gLed = NULL;
99 +static PLED_INFO gpVirtLeds[MAX_VIRT_LEDS];
100 +static HANDLE_LED_FUNC gLedHwFunc[MAX_VIRT_LEDS];
101 +static HANDLE_LED_FUNC gLedHwFailFunc[MAX_VIRT_LEDS];
102 +
103 +#if 0 /* BROKEN */
104 +#if defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
105 +static int gLedOffInBridgeMode = 1;
106 +#elif defined(CONFIG_BCM96345)
107 +static int gLedOffInBridgeMode = 0;
108 +#endif
109 +#endif
110 +
111 +void ledTimerExpire(void);
112 +int initLedInfo( PLED_MAP_PAIR pCurMap, PLED_INFO pCurLed );
113 +
114 +//**************************************************************************************
115 +// LED operations
116 +//**************************************************************************************
117 +
118 +// turn led on and set the ledState
119 +void ledOn(PLED_INFO pLed)
120 +{
121 + if( pLed->ledMask )
122 + {
123 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
124 + if( pLed->ledActiveLow )
125 + GPIO->GPIOio &= ~pLed->ledMask; // turn on the led
126 + else
127 + GPIO->GPIOio |= pLed->ledMask; // turn on the led
128 + pLed->ledState = pLed->savedLedState = kLedStateOn;
129 + }
130 +}
131 +
132 +
133 +// turn led off and set the ledState
134 +void ledOff(PLED_INFO pLed)
135 +{
136 + if( pLed->ledMask )
137 + {
138 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
139 + if( pLed->ledActiveLow )
140 + GPIO->GPIOio |= pLed->ledMask; // turn off the led
141 + else
142 + GPIO->GPIOio &= ~pLed->ledMask; // turn off the led
143 + pLed->ledState = pLed->savedLedState = kLedStateOff;
144 + }
145 +}
146 +
147 +// turn led on and set the ledState
148 +void ledOnFail(PLED_INFO pLed)
149 +{
150 + if( pLed->ledMaskFail )
151 + {
152 + GPIO->GPIODir |= pLed->ledMaskFail; // turn on the direction bit in case was turned off by some one
153 + if( pLed->ledActiveLowFail )
154 + GPIO->GPIOio &= ~pLed->ledMaskFail;// turn on the led
155 + else
156 + GPIO->GPIOio |= pLed->ledMaskFail; // turn on the led
157 + pLed->ledState = pLed->savedLedState = kLedStateFail;
158 + }
159 +}
160 +
161 +
162 +// turn led off and set the ledState
163 +void ledOffFail(PLED_INFO pLed)
164 +{
165 + if( pLed->ledMaskFail )
166 + {
167 + GPIO->GPIODir |= pLed->ledMaskFail; // turn on the direction bit in case was turned off by some one
168 + if( pLed->ledActiveLowFail )
169 + GPIO->GPIOio |= pLed->ledMaskFail; // turn off the led
170 + else
171 + GPIO->GPIOio &= ~pLed->ledMaskFail;// turn off the led
172 + pLed->ledState = pLed->savedLedState = kLedStateOff;
173 + }
174 +}
175 +
176 +
177 +// toggle the led and return the current ledState
178 +BOARD_LED_STATE ledToggle(PLED_INFO pLed)
179 +{
180 + GPIO->GPIODir |= pLed->ledMask; // turn on the direction bit in case was turned off by some one
181 + if (GPIO->GPIOio & pLed->ledMask)
182 + {
183 + GPIO->GPIOio &= ~(pLed->ledMask);
184 + return( (pLed->ledActiveLow) ? kLedStateOn : kLedStateOff );
185 + }
186 + else
187 + {
188 + GPIO->GPIOio |= pLed->ledMask;
189 + return( (pLed->ledActiveLow) ? kLedStateOff : kLedStateOn );
190 + }
191 +}
192 +
193 +
194 +// led timer. Will return if timer is already on
195 +void ledTimerStart(void)
196 +{
197 + if (gTimerOn)
198 + return;
199 +
200 +#if defined(DEBUG_LED)
201 + printk("led: add_timer\n");
202 +#endif
203 +
204 + init_timer(&gLedTimer);
205 + gLedTimer.function = (void*)ledTimerExpire;
206 + gLedTimer.expires = jiffies + k100ms; // timer expires in ~100ms
207 + add_timer (&gLedTimer);
208 + gTimerOn = TRUE;
209 +}
210 +
211 +
212 +// led timer expire kicks in about ~100ms and perform the led operation according to the ledState and
213 +// restart the timer according to ledState
214 +void ledTimerExpire(void)
215 +{
216 + int i;
217 + PLED_INFO pCurLed;
218 +
219 + gTimerOn = FALSE;
220 +
221 + for (i = 0, pCurLed = gLed; i < gLedCount; i++, pCurLed++)
222 + {
223 +#if defined(DEBUG_LED)
224 + printk("led[%d]: Mask=0x%04x, State = %d, blcd=%d\n", i, pCurLed->ledMask, pCurLed->ledState, pCurLed->blinkCountDown);
225 +#endif
226 + switch (pCurLed->ledState)
227 + {
228 + case kLedStateOn:
229 + case kLedStateOff:
230 + case kLedStateFail:
231 + pCurLed->blinkCountDown = 0; // reset the blink count down
232 + break;
233 +
234 + case kLedStateBlinkOnce:
235 + ledToggle(pCurLed);
236 + pCurLed->blinkCountDown = 0; // reset to 0
237 + pCurLed->ledState = pCurLed->savedLedState;
238 + if (pCurLed->ledState == kLedStateSlowBlinkContinues ||
239 + pCurLed->ledState == kLedStateFastBlinkContinues)
240 + ledTimerStart(); // start timer if in blinkContinues stats
241 + break;
242 +
243 + case kLedStateSlowBlinkContinues:
244 + if (pCurLed->blinkCountDown-- == 0)
245 + {
246 + pCurLed->blinkCountDown = kSlowBlinkCount;
247 + ledToggle(pCurLed);
248 + }
249 + ledTimerStart();
250 + break;
251 +
252 + case kLedStateFastBlinkContinues:
253 + if (pCurLed->blinkCountDown-- == 0)
254 + {
255 + pCurLed->blinkCountDown = kFastBlinkCount;
256 + ledToggle(pCurLed);
257 + }
258 + ledTimerStart();
259 + break;
260 +
261 + default:
262 + printk("Invalid state = %d\n", pCurLed->ledState);
263 + }
264 + }
265 +}
266 +
267 +// initialize the gLedCount and allocate and fill gLed struct
268 +void __init boardLedInit(PLED_MAP_PAIR cLedMapping)
269 +{
270 + PLED_MAP_PAIR p1, p2;
271 + PLED_INFO pCurLed;
272 + int needTimer = FALSE;
273 + int alreadyUsed = 0;
274 +
275 +#if defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
276 + /* Set blink rate for BCM6348/BCM6338 hardware LEDs. */
277 + GPIO->LEDCtrl &= ~LED_INTERVAL_SET_MASK;
278 + GPIO->LEDCtrl |= LED_INTERVAL_SET_80MS;
279 +#endif
280 +
281 + memset( gpVirtLeds, 0x00, sizeof(gpVirtLeds) );
282 + memset( gLedHwFunc, 0x00, sizeof(gLedHwFunc) );
283 + memset( gLedHwFailFunc, 0x00, sizeof(gLedHwFailFunc) );
284 +
285 + gLedCount = 0;
286 +
287 + // Check for multiple LED names and multiple LED GPIO pins that share the
288 + // same physical board LED.
289 + for( p1 = cLedMapping; p1->ledName != kLedEnd; p1++ )
290 + {
291 + alreadyUsed = 0;
292 + for( p2 = cLedMapping; p2 != p1; p2++ )
293 + {
294 + if( (p1->ledMask && p1->ledMask == p2->ledMask) ||
295 + (p1->ledMaskFail && p1->ledMaskFail == p2->ledMaskFail) )
296 + {
297 + alreadyUsed = 1;
298 + break;
299 + }
300 + }
301 +
302 + if( alreadyUsed == 0 )
303 + gLedCount++;
304 + }
305 +
306 + gLed = (PLED_INFO) kmalloc((gLedCount * sizeof(LED_INFO)), GFP_KERNEL);
307 + if( gLed == NULL )
308 + {
309 + printk( "LED memory allocation error.\n" );
310 + return;
311 + }
312 +
313 + memset( gLed, 0x00, gLedCount * sizeof(LED_INFO) );
314 +
315 + // initial the gLed with unique ledMask and initial state. If more than 1 ledNames share the physical led
316 + // (ledMask) the first defined led's ledInitState will be used.
317 + pCurLed = gLed;
318 + for( p1 = cLedMapping; p1->ledName != kLedEnd; p1++ )
319 + {
320 + if( (int) p1->ledName > MAX_VIRT_LEDS )
321 + continue;
322 +
323 + alreadyUsed = 0;
324 + for( p2 = cLedMapping; p2 != p1; p2++ )
325 + {
326 + if( (p1->ledMask && p1->ledMask == p2->ledMask) ||
327 + (p1->ledMaskFail && p1->ledMaskFail == p2->ledMaskFail) )
328 + {
329 + alreadyUsed = 1;
330 + break;
331 + }
332 + }
333 +
334 + if( alreadyUsed == 0 )
335 + {
336 + // Initialize the board LED for the first time.
337 + needTimer = initLedInfo( p1, pCurLed );
338 + gpVirtLeds[(int) p1->ledName] = pCurLed;
339 + pCurLed++;
340 + }
341 + else
342 + {
343 + PLED_INFO pLed;
344 + for( pLed = gLed; pLed != pCurLed; pLed++ )
345 + {
346 + // Find the LED_INFO structure that has already been initialized.
347 + if((pLed->ledMask && pLed->ledMask == p1->ledMask) ||
348 + (pLed->ledMaskFail && pLed->ledMaskFail==p1->ledMaskFail))
349 + {
350 + // The board LED has already been initialized but possibly
351 + // not completely initialized.
352 + if( p1->ledMask )
353 + {
354 + pLed->ledMask = p1->ledMask;
355 + pLed->ledActiveLow = p1->ledActiveLow;
356 + }
357 + if( p1->ledMaskFail )
358 + {
359 + pLed->ledMaskFail = p1->ledMaskFail;
360 + pLed->ledActiveLowFail = p1->ledActiveLowFail;
361 + }
362 + gpVirtLeds[(int) p1->ledName] = pLed;
363 + break;
364 + }
365 + }
366 + }
367 + }
368 +
369 + if (needTimer)
370 + ledTimerStart();
371 +
372 +#if defined(DEBUG_LED)
373 + int i;
374 + for (i=0; i < gLedCount; i++)
375 + printk("initLed: led[%d]: mask=0x%04x, state=%d\n", i,(gLed+i)->ledMask, (gLed+i)->ledState);
376 +#endif
377 +
378 +}
379 +
380 +// Initialize a structure that contains information about a physical board LED
381 +// control. The board LED may contain more than one GPIO pin to control a
382 +// normal condition (green) or a failure condition (red).
383 +int initLedInfo( PLED_MAP_PAIR pCurMap, PLED_INFO pCurLed )
384 +{
385 + int needTimer = FALSE;
386 + pCurLed->ledState = pCurLed->savedLedState = pCurMap->ledInitState;
387 + pCurLed->ledMask = pCurMap->ledMask;
388 + pCurLed->ledActiveLow = pCurMap->ledActiveLow;
389 + pCurLed->ledMaskFail = pCurMap->ledMaskFail;
390 + pCurLed->ledActiveLowFail = pCurMap->ledActiveLowFail;
391 +
392 + switch (pCurLed->ledState)
393 + {
394 + case kLedStateOn:
395 + pCurLed->blinkCountDown = 0; // reset the blink count down
396 + ledOn(pCurLed);
397 + break;
398 + case kLedStateOff:
399 + pCurLed->blinkCountDown = 0; // reset the blink count down
400 + ledOff(pCurLed);
401 + break;
402 + case kLedStateFail:
403 + pCurLed->blinkCountDown = 0; // reset the blink count down
404 + ledOnFail(pCurLed);
405 + break;
406 + case kLedStateBlinkOnce:
407 + pCurLed->blinkCountDown = 1;
408 + needTimer = TRUE;
409 + break;
410 + case kLedStateSlowBlinkContinues:
411 + pCurLed->blinkCountDown = kSlowBlinkCount;
412 + needTimer = TRUE;
413 + break;
414 + case kLedStateFastBlinkContinues:
415 + pCurLed->blinkCountDown = kFastBlinkCount;
416 + needTimer = TRUE;
417 + break;
418 + default:
419 + printk("Invalid state = %d\n", pCurLed->ledState);
420 + }
421 +
422 + return( needTimer );
423 +}
424 +
425 +#if 0 /* BROKEN */
426 +// Determines if there is at least one interface in bridge mode. Bridge mode
427 +// is determined by the cfm convention of naming bridge interfaces nas17
428 +// through nas24.
429 +static int isBridgedProtocol(void)
430 +{
431 + extern int dev_get(const char *name);
432 + const int firstBridgeId = 17;
433 + const int lastBridgeId = 24;
434 + int i;
435 + int ret = FALSE;
436 + char name[16];
437 +
438 + for( i = firstBridgeId; i <= lastBridgeId; i++ )
439 + {
440 + sprintf( name, "nas%d", i );
441 +
442 + if( dev_get(name) )
443 + {
444 + ret = TRUE;
445 + break;
446 + }
447 + }
448 +
449 + return(ret);
450 +}
451 +#endif
452 +
453 +// led ctrl. Maps the ledName to the corresponding ledInfoPtr and perform the led operation
454 +void boardLedCtrl(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState)
455 +{
456 + PLED_INFO ledInfoPtr;
457 +
458 + // do the mapping from virtual to physical led
459 + if( (int) ledName < MAX_VIRT_LEDS )
460 + ledInfoPtr = gpVirtLeds[(int) ledName];
461 + else
462 + ledInfoPtr = NULL;
463 +
464 + if (ledInfoPtr == NULL)
465 + return;
466 +
467 + if( ledState != kLedStateFail && gLedHwFunc[(int) ledName] )
468 + {
469 + (*gLedHwFunc[(int) ledName]) (ledName, ledState);
470 + ledOffFail(ledInfoPtr);
471 + return;
472 + }
473 + else
474 + if( ledState == kLedStateFail && gLedHwFailFunc[(int) ledName] )
475 + {
476 + (*gLedHwFailFunc[(int) ledName]) (ledName, ledState);
477 + ledOff(ledInfoPtr);
478 + return;
479 + }
480 +
481 +#if 0 /* BROKEN */
482 + // Do not blink the WAN Data LED if at least one interface is in bridge mode.
483 + if(gLedOffInBridgeMode == 1 && (ledName == kLedWanData || ledName == kLedPPP))
484 + {
485 + static int BridgedProtocol = -1;
486 +
487 + if( BridgedProtocol == -1 )
488 + BridgedProtocol = isBridgedProtocol();
489 +
490 + if( BridgedProtocol == TRUE )
491 + return;
492 + }
493 +#endif
494 +
495 + // If the state is kLedStateFail and there is not a failure LED defined
496 + // in the board parameters, change the state to kLedStateFastBlinkContinues.
497 + if( ledState == kLedStateFail && ledInfoPtr->ledMaskFail == 0 )
498 + ledState = kLedStateFastBlinkContinues;
499 +
500 + switch (ledState)
501 + {
502 + case kLedStateOn:
503 + // First, turn off the complimentary (failure) LED GPIO.
504 + if( ledInfoPtr->ledMaskFail )
505 + ledOffFail(ledInfoPtr);
506 + else
507 + if( gLedHwFailFunc[(int) ledName] )
508 + (*gLedHwFailFunc[(int) ledName]) (ledName, kLedStateOff);
509 +
510 + // Next, turn on the specified LED GPIO.
511 + ledOn(ledInfoPtr);
512 + break;
513 +
514 + case kLedStateOff:
515 + // First, turn off the complimentary (failure) LED GPIO.
516 + if( ledInfoPtr->ledMaskFail )
517 + ledOffFail(ledInfoPtr);
518 + else
519 + if( gLedHwFailFunc[(int) ledName] )
520 + (*gLedHwFailFunc[(int) ledName]) (ledName, kLedStateOff);
521 +
522 + // Next, turn off the specified LED GPIO.
523 + ledOff(ledInfoPtr);
524 + break;
525 +
526 + case kLedStateFail:
527 + // First, turn off the complimentary (normal) LED GPIO.
528 + if( ledInfoPtr->ledMask )
529 + ledOff(ledInfoPtr);
530 + else
531 + if( gLedHwFunc[(int) ledName] )
532 + (*gLedHwFunc[(int) ledName]) (ledName, kLedStateOff);
533 +
534 + // Next, turn on (red) the specified LED GPIO.
535 + ledOnFail(ledInfoPtr);
536 + break;
537 +
538 + case kLedStateBlinkOnce:
539 + // skip blinkOnce if it is already in Slow/Fast blink continues state
540 + if (ledInfoPtr->savedLedState == kLedStateSlowBlinkContinues ||
541 + ledInfoPtr->savedLedState == kLedStateFastBlinkContinues)
542 + ;
543 + else
544 + {
545 + if (ledInfoPtr->blinkCountDown == 0) // skip the call if it is 1
546 + {
547 + ledToggle(ledInfoPtr);
548 + ledInfoPtr->blinkCountDown = 1; // it will be reset to 0 when timer expires
549 + ledInfoPtr->ledState = kLedStateBlinkOnce;
550 + ledTimerStart();
551 + }
552 + }
553 + break;
554 +
555 + case kLedStateSlowBlinkContinues:
556 + ledInfoPtr->blinkCountDown = kSlowBlinkCount;
557 + ledInfoPtr->ledState = kLedStateSlowBlinkContinues;
558 + ledInfoPtr->savedLedState = kLedStateSlowBlinkContinues;
559 + ledTimerStart();
560 + break;
561 +
562 + case kLedStateFastBlinkContinues:
563 + ledInfoPtr->blinkCountDown = kFastBlinkCount;
564 + ledInfoPtr->ledState = kLedStateFastBlinkContinues;
565 + ledInfoPtr->savedLedState = kLedStateFastBlinkContinues;
566 + ledTimerStart();
567 + break;
568 +
569 + default:
570 + printk("Invalid led state\n");
571 + }
572 +}
573 +
574 +// This function is called for an LED that is controlled by hardware.
575 +void kerSysLedRegisterHwHandler( BOARD_LED_NAME ledName,
576 + HANDLE_LED_FUNC ledHwFunc, int ledFailType )
577 +{
578 + if( (int) ledName < MAX_VIRT_LEDS )
579 + {
580 + if( ledFailType == 1 )
581 + gLedHwFailFunc[(int) ledName] = ledHwFunc;
582 + else
583 + gLedHwFunc[(int) ledName] = ledHwFunc;
584 + }
585 +}
586 +
587 diff -urN linux.old/arch/mips/bcm963xx/board.c linux.dev/arch/mips/bcm963xx/board.c
588 --- linux.old/arch/mips/bcm963xx/board.c 1970-01-01 01:00:00.000000000 +0100
589 +++ linux.dev/arch/mips/bcm963xx/board.c 2006-08-25 15:16:26.000000000 +0200
590 @@ -0,0 +1,555 @@
591 +/*
592 +<:copyright-gpl
593 + Copyright 2002 Broadcom Corp. All Rights Reserved.
594 +
595 + This program is free software; you can distribute it and/or modify it
596 + under the terms of the GNU General Public License (Version 2) as
597 + published by the Free Software Foundation.
598 +
599 + This program is distributed in the hope it will be useful, but WITHOUT
600 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
601 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
602 + for more details.
603 +
604 + You should have received a copy of the GNU General Public License along
605 + with this program; if not, write to the Free Software Foundation, Inc.,
606 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
607 +:>
608 +*/
609 +
610 +/* Includes. */
611 +#include <linux/version.h>
612 +#include <linux/init.h>
613 +#include <linux/fs.h>
614 +#include <linux/interrupt.h>
615 +#include <linux/capability.h>
616 +#include <linux/slab.h>
617 +#include <linux/errno.h>
618 +#include <linux/module.h>
619 +#include <linux/pagemap.h>
620 +#include <asm/uaccess.h>
621 +#include <linux/wait.h>
622 +#include <linux/poll.h>
623 +#include <linux/sched.h>
624 +#include <linux/list.h>
625 +#include <linux/if.h>
626 +#include <linux/spinlock.h>
627 +
628 +#include <bcm_map_part.h>
629 +#include <board.h>
630 +#include <bcmTag.h>
631 +#include "boardparms.h"
632 +#include "bcm_intr.h"
633 +#include "board.h"
634 +#include "bcm_map_part.h"
635 +
636 +static DEFINE_SPINLOCK(board_lock);
637 +
638 +/* Typedefs. */
639 +#if defined (NON_CONSECUTIVE_MAC)
640 +// used to be the last octet. Now changed to the first 5 bits of the the forth octet
641 +// to reduced the duplicated MAC addresses.
642 +#define CHANGED_OCTET 3
643 +#define SHIFT_BITS 3
644 +#else
645 +#define CHANGED_OCTET 1
646 +#define SHIFT_BITS 0
647 +#endif
648 +
649 +typedef struct
650 +{
651 + unsigned long ulId;
652 + char chInUse;
653 + char chReserved[3];
654 +} MAC_ADDR_INFO, *PMAC_ADDR_INFO;
655 +
656 +typedef struct
657 +{
658 + unsigned long ulSdramSize;
659 + unsigned long ulPsiSize;
660 + unsigned long ulNumMacAddrs;
661 + unsigned long ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
662 + MAC_ADDR_INFO MacAddrs[1];
663 +} NVRAM_INFO, *PNVRAM_INFO;
664 +
665 +typedef struct
666 +{
667 + unsigned long eventmask;
668 +} BOARD_IOC, *PBOARD_IOC;
669 +
670 +
671 +/*Dyinggasp callback*/
672 +typedef void (*cb_dgasp_t)(void *arg);
673 +typedef struct _CB_DGASP__LIST
674 +{
675 + struct list_head list;
676 + char name[IFNAMSIZ];
677 + cb_dgasp_t cb_dgasp_fn;
678 + void *context;
679 +}CB_DGASP_LIST , *PCB_DGASP_LIST;
680 +
681 +
682 +static LED_MAP_PAIR LedMapping[] =
683 +{ // led name Initial state physical pin (ledMask)
684 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
685 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
686 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
687 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
688 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
689 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
690 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
691 + {kLedEnd, kLedStateOff, 0, 0, 0, 0},
692 + {kLedEnd, kLedStateOff, 0, 0, 0, 0} // NOTE: kLedEnd has to be at the end.
693 +};
694 +
695 +/* Externs. */
696 +extern struct file fastcall *fget_light(unsigned int fd, int *fput_needed);
697 +extern unsigned int nr_free_pages (void);
698 +extern const char *get_system_type(void);
699 +extern void kerSysFlashInit(void);
700 +extern unsigned long get_nvram_start_addr(void);
701 +extern unsigned long get_scratch_pad_start_addr(void);
702 +extern unsigned long getMemorySize(void);
703 +extern void __init boardLedInit(PLED_MAP_PAIR);
704 +extern void boardLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
705 +extern void kerSysLedRegisterHandler( BOARD_LED_NAME ledName,
706 + HANDLE_LED_FUNC ledHwFunc, int ledFailType );
707 +
708 +/* Prototypes. */
709 +void __init InitNvramInfo( void );
710 +
711 +/* DyingGasp function prototype */
712 +static void __init kerSysDyingGaspMapIntr(void);
713 +static irqreturn_t kerSysDyingGaspIsr(int irq, void * dev_id, struct pt_regs * regs);
714 +static void __init kerSysInitDyingGaspHandler( void );
715 +static void __exit kerSysDeinitDyingGaspHandler( void );
716 +/* -DyingGasp function prototype - */
717 +
718 +static PNVRAM_INFO g_pNvramInfo = NULL;
719 +static int g_ledInitialized = 0;
720 +static CB_DGASP_LIST *g_cb_dgasp_list_head = NULL;
721 +
722 +static int g_wakeup_monitor = 0;
723 +static struct file *g_monitor_file = NULL;
724 +static struct task_struct *g_monitor_task = NULL;
725 +static unsigned int (*g_orig_fop_poll)
726 + (struct file *, struct poll_table_struct *) = NULL;
727 +
728 +void kerSysMipsSoftReset(void)
729 +{
730 + if (PERF->RevID == 0x634800A1) {
731 + typedef void (*FNPTR) (void);
732 + FNPTR bootaddr = (FNPTR) FLASH_BASE;
733 + int i;
734 +
735 + /* Disable interrupts. */
736 + //cli();
737 + spin_lock_irq(&board_lock);
738 +
739 + /* Reset all blocks. */
740 + PERF->BlockSoftReset &= ~BSR_ALL_BLOCKS;
741 + for( i = 0; i < 1000000; i++ )
742 + ;
743 + PERF->BlockSoftReset |= BSR_ALL_BLOCKS;
744 + /* Jump to the power on address. */
745 + (*bootaddr) ();
746 + }
747 + else
748 + PERF->pll_control |= SOFT_RESET; // soft reset mips
749 +}
750 +
751 +
752 +int kerSysGetMacAddress( unsigned char *pucaMacAddr, unsigned long ulId )
753 +{
754 + int nRet = 0;
755 + PMAC_ADDR_INFO pMai = NULL;
756 + PMAC_ADDR_INFO pMaiFreeNoId = NULL;
757 + PMAC_ADDR_INFO pMaiFreeId = NULL;
758 + unsigned long i = 0, ulIdxNoId = 0, ulIdxId = 0, shiftedIdx = 0;
759 +
760 + /* CMO -- Fix le problème avec les adresses mac que l'on n'arrive pas
761 + * * à relire plusieurs fois */
762 + /* inv_xde */
763 + if (boot_loader_type == BOOT_CFE)
764 + memcpy( pucaMacAddr, g_pNvramInfo->ucaBaseMacAddr,
765 + NVRAM_MAC_ADDRESS_LEN );
766 + else {
767 + pucaMacAddr[0] = 0x00;
768 + pucaMacAddr[1] = 0x07;
769 + pucaMacAddr[2] = 0x3A;
770 + pucaMacAddr[3] = 0xFF;
771 + pucaMacAddr[4] = 0xFF;
772 + pucaMacAddr[5] = 0xFF;
773 + }
774 +
775 + return nRet;
776 +} /* kerSysGetMacAddr */
777 +
778 +int kerSysReleaseMacAddress( unsigned char *pucaMacAddr )
779 +{
780 + int nRet = -EINVAL;
781 + unsigned long ulIdx = 0;
782 + int idx = (pucaMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET] -
783 + g_pNvramInfo->ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET]);
784 +
785 + // if overflow 255 (negitive), add 256 to have the correct index
786 + if (idx < 0)
787 + idx += 256;
788 + ulIdx = (unsigned long) (idx >> SHIFT_BITS);
789 +
790 + if( ulIdx < g_pNvramInfo->ulNumMacAddrs )
791 + {
792 + PMAC_ADDR_INFO pMai = &g_pNvramInfo->MacAddrs[ulIdx];
793 + if( pMai->chInUse == 1 )
794 + {
795 + pMai->chInUse = 0;
796 + nRet = 0;
797 + }
798 + }
799 +
800 + return( nRet );
801 +} /* kerSysReleaseMacAddr */
802 +
803 +int kerSysGetSdramSize( void )
804 +{
805 + if (boot_loader_type == BOOT_CFE) {
806 + return( (int) g_pNvramInfo->ulSdramSize );
807 + }
808 + else {
809 + printk("kerSysGetSdramSize : 0x%08X\n", (int)getMemorySize() + 0x00040000);
810 + return((int)getMemorySize() + 0x00040000);
811 + }
812 +} /* kerSysGetSdramSize */
813 +
814 +
815 +void kerSysLedCtrl(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState)
816 +{
817 + if (g_ledInitialized)
818 + boardLedCtrl(ledName, ledState);
819 +}
820 +
821 +unsigned int kerSysMonitorPollHook( struct file *f, struct poll_table_struct *t)
822 +{
823 + int mask = (*g_orig_fop_poll) (f, t);
824 +
825 + if( g_wakeup_monitor == 1 && g_monitor_file == f )
826 + {
827 + /* If g_wakeup_monitor is non-0, the user mode application needs to
828 + * return from a blocking select function. Return POLLPRI which will
829 + * cause the select to return with the exception descriptor set.
830 + */
831 + mask |= POLLPRI;
832 + g_wakeup_monitor = 0;
833 + }
834 +
835 + return( mask );
836 +}
837 +
838 +/* Put the user mode application that monitors link state on a run queue. */
839 +void kerSysWakeupMonitorTask( void )
840 +{
841 + g_wakeup_monitor = 1;
842 + if( g_monitor_task )
843 + wake_up_process( g_monitor_task );
844 +}
845 +
846 +//<<JUNHON, 2004/09/15, get reset button status , tim hou , 05/04/12
847 +int kerSysGetResetHold(void)
848 +{
849 + unsigned short gpio;
850 +
851 + if( BpGetPressAndHoldResetGpio( &gpio ) == BP_SUCCESS )
852 + {
853 + unsigned long gpio_mask = GPIO_NUM_TO_MASK(gpio);
854 + volatile unsigned long *gpio_reg = &GPIO->GPIOio;
855 +
856 + if( (gpio & ~BP_ACTIVE_MASK) >= 32 )
857 + {
858 + gpio_mask = GPIO_NUM_TO_MASK_HIGH(gpio);
859 + gpio_reg = &GPIO->GPIOio_high;
860 + }
861 + //printk("gpio=%04x,gpio_mask=%04x,gpio_reg=%04x\n",gpio,gpio_mask,*gpio_reg);
862 + if(*gpio_reg & gpio_mask) //press down
863 + return RESET_BUTTON_UP;
864 + }
865 + return RESET_BUTTON_PRESSDOWN;
866 +}
867 +//<<JUNHON, 2004/09/15
868 +
869 +/***************************************************************************
870 + * Dying gasp ISR and functions.
871 + ***************************************************************************/
872 +#define KERSYS_DBG printk
873 +
874 +#if defined(CONFIG_BCM96345)
875 +#define CYCLE_PER_US 70
876 +#elif defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
877 +/* The BCM6348 cycles per microsecond is really variable since the BCM6348
878 + * MIPS speed can vary depending on the PLL settings. However, an appoximate
879 + * value of 120 will still work OK for the test being done.
880 + */
881 +#define CYCLE_PER_US 120
882 +#endif
883 +#define DG_GLITCH_TO (100*CYCLE_PER_US)
884 +
885 +static void __init kerSysDyingGaspMapIntr()
886 +{
887 + unsigned long ulIntr;
888 +
889 +#if defined(CONFIG_BCM96348) || defined(_BCM96348_) || defined(CONFIG_BCM96338) || defined(_BCM96338_)
890 + if( BpGetAdslDyingGaspExtIntr( &ulIntr ) == BP_SUCCESS ) {
891 + BcmHalMapInterrupt((FN_HANDLER)kerSysDyingGaspIsr, 0, INTERRUPT_ID_DG);
892 + BcmHalInterruptEnable( INTERRUPT_ID_DG );
893 + }
894 +#elif defined(CONFIG_BCM96345) || defined(_BCM96345_)
895 + if( BpGetAdslDyingGaspExtIntr( &ulIntr ) == BP_SUCCESS ) {
896 + ulIntr += INTERRUPT_ID_EXTERNAL_0;
897 + BcmHalMapInterrupt((FN_HANDLER)kerSysDyingGaspIsr, 0, ulIntr);
898 + BcmHalInterruptEnable( ulIntr );
899 + }
900 +#endif
901 +
902 +}
903 +
904 +void kerSysSetWdTimer(ulong timeUs)
905 +{
906 + TIMER->WatchDogDefCount = timeUs * (FPERIPH/1000000);
907 + TIMER->WatchDogCtl = 0xFF00;
908 + TIMER->WatchDogCtl = 0x00FF;
909 +}
910 +
911 +ulong kerSysGetCycleCount(void)
912 +{
913 + ulong cnt;
914 +#ifdef _WIN32_WCE
915 + cnt = 0;
916 +#else
917 + __asm volatile("mfc0 %0, $9":"=d"(cnt));
918 +#endif
919 + return(cnt);
920 +}
921 +
922 +static Bool kerSysDyingGaspCheckPowerLoss(void)
923 +{
924 + ulong clk0;
925 + ulong ulIntr;
926 +
927 + ulIntr = 0;
928 + clk0 = kerSysGetCycleCount();
929 +
930 + UART->Data = 'D';
931 + UART->Data = '%';
932 + UART->Data = 'G';
933 +
934 +#if defined(CONFIG_BCM96345)
935 + BpGetAdslDyingGaspExtIntr( &ulIntr );
936 +
937 + do {
938 + ulong clk1;
939 +
940 + clk1 = kerSysGetCycleCount(); /* time cleared */
941 + /* wait a little to get new reading */
942 + while ((kerSysGetCycleCount()-clk1) < CYCLE_PER_US*2)
943 + ;
944 + } while ((0 == (PERF->ExtIrqCfg & (1 << (ulIntr + EI_STATUS_SHFT)))) && ((kerSysGetCycleCount() - clk0) < DG_GLITCH_TO));
945 +
946 + if (PERF->ExtIrqCfg & (1 << (ulIntr + EI_STATUS_SHFT))) { /* power glitch */
947 + BcmHalInterruptEnable( ulIntr + INTERRUPT_ID_EXTERNAL_0);
948 + KERSYS_DBG(" - Power glitch detected. Duration: %ld us\n", (kerSysGetCycleCount() - clk0)/CYCLE_PER_US);
949 + return 0;
950 + }
951 +#elif (defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)) && !defined(VXWORKS)
952 + do {
953 + ulong clk1;
954 +
955 + clk1 = kerSysGetCycleCount(); /* time cleared */
956 + /* wait a little to get new reading */
957 + while ((kerSysGetCycleCount()-clk1) < CYCLE_PER_US*2)
958 + ;
959 + } while ((PERF->IrqStatus & (1 << (INTERRUPT_ID_DG - INTERNAL_ISR_TABLE_OFFSET))) && ((kerSysGetCycleCount() - clk0) < DG_GLITCH_TO));
960 +
961 + if (!(PERF->IrqStatus & (1 << (INTERRUPT_ID_DG - INTERNAL_ISR_TABLE_OFFSET)))) {
962 + BcmHalInterruptEnable( INTERRUPT_ID_DG );
963 + KERSYS_DBG(" - Power glitch detected. Duration: %ld us\n", (kerSysGetCycleCount() - clk0)/CYCLE_PER_US);
964 + return 0;
965 + }
966 +#endif
967 + return 1;
968 +}
969 +
970 +static void kerSysDyingGaspShutdown( void )
971 +{
972 + kerSysSetWdTimer(1000000);
973 +#if defined(CONFIG_BCM96345)
974 + PERF->blkEnables &= ~(EMAC_CLK_EN | USB_CLK_EN | CPU_CLK_EN);
975 +#elif defined(CONFIG_BCM96348)
976 + PERF->blkEnables &= ~(EMAC_CLK_EN | USBS_CLK_EN | USBH_CLK_EN | SAR_CLK_EN);
977 +#endif
978 +}
979 +
980 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
981 +static irqreturn_t kerSysDyingGaspIsr(int irq, void * dev_id, struct pt_regs * regs)
982 +#else
983 +static unsigned int kerSysDyingGaspIsr(void)
984 +#endif
985 +{
986 + struct list_head *pos;
987 + CB_DGASP_LIST *tmp, *dsl = NULL;
988 +
989 + if (kerSysDyingGaspCheckPowerLoss()) {
990 +
991 + /* first to turn off everything other than dsl */
992 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
993 + tmp = list_entry(pos, CB_DGASP_LIST, list);
994 + if(strncmp(tmp->name, "dsl", 3)) {
995 + (tmp->cb_dgasp_fn)(tmp->context);
996 + }else {
997 + dsl = tmp;
998 + }
999 + }
1000 +
1001 + /* now send dgasp */
1002 + if(dsl)
1003 + (dsl->cb_dgasp_fn)(dsl->context);
1004 +
1005 + /* reset and shutdown system */
1006 + kerSysDyingGaspShutdown();
1007 + }
1008 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
1009 +return( IRQ_HANDLED );
1010 +#else
1011 + return( 1 );
1012 +#endif
1013 +}
1014 +
1015 +static void __init kerSysInitDyingGaspHandler( void )
1016 +{
1017 + CB_DGASP_LIST *new_node;
1018 +
1019 + if( g_cb_dgasp_list_head != NULL) {
1020 + printk("Error: kerSysInitDyingGaspHandler: list head is not null\n");
1021 + return;
1022 + }
1023 + new_node= (CB_DGASP_LIST *)kmalloc(sizeof(CB_DGASP_LIST), GFP_KERNEL);
1024 + memset(new_node, 0x00, sizeof(CB_DGASP_LIST));
1025 + INIT_LIST_HEAD(&new_node->list);
1026 + g_cb_dgasp_list_head = new_node;
1027 +
1028 +} /* kerSysInitDyingGaspHandler */
1029 +
1030 +static void __exit kerSysDeinitDyingGaspHandler( void )
1031 +{
1032 + struct list_head *pos;
1033 + CB_DGASP_LIST *tmp;
1034 +
1035 + if(g_cb_dgasp_list_head == NULL)
1036 + return;
1037 +
1038 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
1039 + tmp = list_entry(pos, CB_DGASP_LIST, list);
1040 + list_del(pos);
1041 + kfree(tmp);
1042 + }
1043 +
1044 + kfree(g_cb_dgasp_list_head);
1045 + g_cb_dgasp_list_head = NULL;
1046 +
1047 +} /* kerSysDeinitDyingGaspHandler */
1048 +
1049 +void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context)
1050 +{
1051 + CB_DGASP_LIST *new_node;
1052 +
1053 + if( g_cb_dgasp_list_head == NULL) {
1054 + printk("Error: kerSysRegisterDyingGaspHandler: list head is null\n");
1055 + return;
1056 + }
1057 +
1058 + if( devname == NULL || cbfn == NULL ) {
1059 + printk("Error: kerSysRegisterDyingGaspHandler: register info not enough (%s,%x,%x)\n", devname, (unsigned int)cbfn, (unsigned int)context);
1060 + return;
1061 + }
1062 +
1063 + new_node= (CB_DGASP_LIST *)kmalloc(sizeof(CB_DGASP_LIST), GFP_KERNEL);
1064 + memset(new_node, 0x00, sizeof(CB_DGASP_LIST));
1065 + INIT_LIST_HEAD(&new_node->list);
1066 + strncpy(new_node->name, devname, IFNAMSIZ);
1067 + new_node->cb_dgasp_fn = (cb_dgasp_t)cbfn;
1068 + new_node->context = context;
1069 + list_add(&new_node->list, &g_cb_dgasp_list_head->list);
1070 +
1071 + printk("dgasp: kerSysRegisterDyingGaspHandler: %s registered \n", devname);
1072 +
1073 +} /* kerSysRegisterDyingGaspHandler */
1074 +
1075 +void kerSysDeregisterDyingGaspHandler(char *devname)
1076 +{
1077 + struct list_head *pos;
1078 + CB_DGASP_LIST *tmp;
1079 +
1080 + if(g_cb_dgasp_list_head == NULL) {
1081 + printk("Error: kerSysDeregisterDyingGaspHandler: list head is null\n");
1082 + return;
1083 + }
1084 +
1085 + if(devname == NULL) {
1086 + printk("Error: kerSysDeregisterDyingGaspHandler: devname is null\n");
1087 + return;
1088 + }
1089 +
1090 + printk("kerSysDeregisterDyingGaspHandler: %s is deregistering\n", devname);
1091 +
1092 + list_for_each(pos, &g_cb_dgasp_list_head->list) {
1093 + tmp = list_entry(pos, CB_DGASP_LIST, list);
1094 + if(!strcmp(tmp->name, devname)) {
1095 + list_del(pos);
1096 + kfree(tmp);
1097 + printk("kerSysDeregisterDyingGaspHandler: %s is deregistered\n", devname);
1098 + return;
1099 + }
1100 + }
1101 + printk("kerSysDeregisterDyingGaspHandler: %s not (de)registered\n", devname);
1102 +
1103 +} /* kerSysDeregisterDyingGaspHandler */
1104 +
1105 +//EXPORT_SYMBOL(kerSysNvRamGet);
1106 +EXPORT_SYMBOL(kerSysGetMacAddress);
1107 +EXPORT_SYMBOL(kerSysReleaseMacAddress);
1108 +EXPORT_SYMBOL(kerSysGetSdramSize);
1109 +EXPORT_SYMBOL(kerSysLedCtrl);
1110 +EXPORT_SYMBOL(kerSysGetResetHold);
1111 +EXPORT_SYMBOL(kerSysLedRegisterHwHandler);
1112 +EXPORT_SYMBOL(BpGetBoardIds);
1113 +EXPORT_SYMBOL(BpGetSdramSize);
1114 +EXPORT_SYMBOL(BpGetPsiSize);
1115 +EXPORT_SYMBOL(BpGetEthernetMacInfo);
1116 +EXPORT_SYMBOL(BpGetRj11InnerOuterPairGpios);
1117 +EXPORT_SYMBOL(BpGetPressAndHoldResetGpio);
1118 +EXPORT_SYMBOL(BpGetVoipResetGpio);
1119 +EXPORT_SYMBOL(BpGetVoipIntrGpio);
1120 +EXPORT_SYMBOL(BpGetPcmciaResetGpio);
1121 +EXPORT_SYMBOL(BpGetRtsCtsUartGpios);
1122 +EXPORT_SYMBOL(BpGetAdslLedGpio);
1123 +EXPORT_SYMBOL(BpGetAdslFailLedGpio);
1124 +EXPORT_SYMBOL(BpGetWirelessLedGpio);
1125 +EXPORT_SYMBOL(BpGetUsbLedGpio);
1126 +EXPORT_SYMBOL(BpGetHpnaLedGpio);
1127 +EXPORT_SYMBOL(BpGetWanDataLedGpio);
1128 +EXPORT_SYMBOL(BpGetPppLedGpio);
1129 +EXPORT_SYMBOL(BpGetPppFailLedGpio);
1130 +EXPORT_SYMBOL(BpGetVoipLedGpio);
1131 +EXPORT_SYMBOL(BpGetWirelessExtIntr);
1132 +EXPORT_SYMBOL(BpGetAdslDyingGaspExtIntr);
1133 +EXPORT_SYMBOL(BpGetVoipExtIntr);
1134 +EXPORT_SYMBOL(BpGetHpnaExtIntr);
1135 +EXPORT_SYMBOL(BpGetHpnaChipSelect);
1136 +EXPORT_SYMBOL(BpGetVoipChipSelect);
1137 +EXPORT_SYMBOL(BpGetWirelessSesBtnGpio);
1138 +EXPORT_SYMBOL(BpGetWirelessSesExtIntr);
1139 +EXPORT_SYMBOL(BpGetWirelessSesLedGpio);
1140 +EXPORT_SYMBOL(kerSysRegisterDyingGaspHandler);
1141 +EXPORT_SYMBOL(kerSysDeregisterDyingGaspHandler);
1142 +EXPORT_SYMBOL(kerSysGetCycleCount);
1143 +EXPORT_SYMBOL(kerSysSetWdTimer);
1144 +EXPORT_SYMBOL(kerSysWakeupMonitorTask);
1145 +
1146 diff -urN linux.old/arch/mips/bcm963xx/boardparms.c linux.dev/arch/mips/bcm963xx/boardparms.c
1147 --- linux.old/arch/mips/bcm963xx/boardparms.c 1970-01-01 01:00:00.000000000 +0100
1148 +++ linux.dev/arch/mips/bcm963xx/boardparms.c 2006-08-25 00:39:38.000000000 +0200
1149 @@ -0,0 +1,2391 @@
1150 +/*
1151 +<:copyright-gpl
1152 +
1153 + Copyright 2003 Broadcom Corp. All Rights Reserved.
1154 +
1155 + This program is free software; you can distribute it and/or modify it
1156 + under the terms of the GNU General Public License (Version 2) as
1157 + published by the Free Software Foundation.
1158 +
1159 + This program is distributed in the hope it will be useful, but WITHOUT
1160 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1161 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1162 + for more details.
1163 +
1164 + You should have received a copy of the GNU General Public License along
1165 + with this program; if not, write to the Free Software Foundation, Inc.,
1166 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
1167 +
1168 +:>
1169 +*/
1170 +/**************************************************************************
1171 + * File Name : boardparms.c
1172 + *
1173 + * Description: This file contains the implementation for the BCM63xx board
1174 + * parameter access functions.
1175 + *
1176 + * Updates : 07/14/2003 Created.
1177 + ***************************************************************************/
1178 +
1179 +/* Includes. */
1180 +#include "boardparms.h"
1181 +
1182 +/* Defines. */
1183 +
1184 +/* Default psi size in K bytes */
1185 +#define BP_PSI_DEFAULT_SIZE 24
1186 +
1187 +/* Typedefs */
1188 +typedef struct boardparameters
1189 +{
1190 + char szBoardId[BP_BOARD_ID_LEN]; /* board id string */
1191 + ETHERNET_MAC_INFO EnetMacInfos[BP_MAX_ENET_MACS];
1192 + VOIP_DSP_INFO VoIPDspInfo[BP_MAX_VOIP_DSP];
1193 + unsigned short usSdramSize; /* SDRAM size and type */
1194 + unsigned short usPsiSize; /* persistent storage in K bytes */
1195 + unsigned short usGpioRj11InnerPair; /* GPIO pin or not defined */
1196 + unsigned short usGpioRj11OuterPair; /* GPIO pin or not defined */
1197 + unsigned short usGpioPressAndHoldReset; /* GPIO pin or not defined */
1198 + unsigned short usGpioPcmciaReset; /* GPIO pin or not defined */
1199 + unsigned short usGpioUartRts; /* GPIO pin or not defined */
1200 + unsigned short usGpioUartCts; /* GPIO pin or not defined */
1201 + unsigned short usGpioLedAdsl; /* GPIO pin or not defined */
1202 + unsigned short usGpioLedAdslFail; /* GPIO pin or not defined */
1203 + unsigned short usGpioLedWireless; /* GPIO pin or not defined */
1204 + unsigned short usGpioLedUsb; /* GPIO pin or not defined */
1205 + unsigned short usGpioLedHpna; /* GPIO pin or not defined */
1206 + unsigned short usGpioLedWanData; /* GPIO pin or not defined */
1207 + unsigned short usGpioLedPpp; /* GPIO pin or not defined */
1208 + unsigned short usGpioLedPppFail; /* GPIO pin or not defined */
1209 + unsigned short usGpioLedBlPowerOn; /* GPIO pin or not defined */
1210 + unsigned short usGpioLedBlAlarm; /* GPIO pin or not defined */
1211 + unsigned short usGpioLedBlResetCfg; /* GPIO pin or not defined */
1212 + unsigned short usGpioLedBlStop; /* GPIO pin or not defined */
1213 + unsigned short usExtIntrWireless; /* ext intr or not defined */
1214 + unsigned short usExtIntrAdslDyingGasp; /* ext intr or not defined */
1215 + unsigned short usExtIntrHpna; /* ext intr or not defined */
1216 + unsigned short usCsHpna; /* chip select not defined */
1217 + unsigned short usAntInUseWireless; /* antenna in use or not defined */
1218 + unsigned short usGpioSesBtnWireless; /* GPIO pin or not defined */
1219 + unsigned short usExtIntrSesBtnWireless; /* ext intr or not defined */
1220 + unsigned short usGpioLedSesWireless; /* GPIO pin or not defined */
1221 +} BOARD_PARAMETERS, *PBOARD_PARAMETERS;
1222 +
1223 +/* Variables */
1224 +#if defined(_BCM96338_) || defined(CONFIG_BCM96338)
1225 +static BOARD_PARAMETERS g_bcm96338sv =
1226 +{
1227 + "96338SV", /* szBoardId */
1228 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1229 + 0x01, /* ucPhyAddress */
1230 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1231 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1232 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1233 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1234 + BP_NOT_DEFINED, /* usGpioPhyReset */
1235 + 0x01, /* numSwitchPorts */
1236 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1237 + BP_NOT_DEFINED}, /* usReverseMii */
1238 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1239 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1240 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1241 + BP_MEMORY_16MB_1_CHIP, /* usSdramSize */
1242 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1243 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1244 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1245 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
1246 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1247 + BP_NOT_DEFINED, /* usGpioUartRts */
1248 + BP_NOT_DEFINED, /* usGpioUartCts */
1249 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1250 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1251 + BP_NOT_DEFINED, /* usGpioLedWireless */
1252 + BP_NOT_DEFINED, /* usGpioLedUsb */
1253 + BP_NOT_DEFINED, /* usGpioLedHpna */
1254 + BP_NOT_DEFINED, /* usGpioLedWanData */
1255 + BP_NOT_DEFINED, /* usGpioLedPpp */
1256 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1257 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1258 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1259 + BP_NOT_DEFINED, /* usGpioLedBlResetCfg */
1260 + BP_NOT_DEFINED, /* usGpioLedBlStop */
1261 + BP_NOT_DEFINED, /* usExtIntrWireless */
1262 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1263 + BP_NOT_DEFINED, /* usExtIntrHpna */
1264 + BP_NOT_DEFINED, /* usCsHpna */
1265 + BP_NOT_DEFINED, /* usAntInUseWireless */
1266 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1267 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1268 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1269 +};
1270 +static BOARD_PARAMETERS g_bcm96338l2m8m =
1271 +{
1272 + "96338L-2M-8M", /* szBoardId */
1273 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1274 + 0x01, /* ucPhyAddress */
1275 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1276 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1277 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1278 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1279 + BP_NOT_DEFINED, /* usGpioPhyReset */
1280 + 0x01, /* numSwitchPorts */
1281 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1282 + BP_NOT_DEFINED}, /* usReverseMii */
1283 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1284 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1285 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1286 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1287 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1288 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1289 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1290 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
1291 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1292 + BP_NOT_DEFINED, /* usGpioUartRts */
1293 + BP_NOT_DEFINED, /* usGpioUartCts */
1294 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1295 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1296 + BP_NOT_DEFINED, /* usGpioLedWireless */
1297 + BP_NOT_DEFINED, /* usGpioLedUsb */
1298 + BP_NOT_DEFINED, /* usGpioLedHpna */
1299 + BP_GPIO_3_AL, /* usGpioLedWanData */
1300 + BP_GPIO_3_AL, /* usGpioLedPpp */
1301 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1302 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1303 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1304 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1305 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1306 + BP_NOT_DEFINED, /* usExtIntrWireless */
1307 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1308 + BP_NOT_DEFINED, /* usExtIntrHpna */
1309 + BP_NOT_DEFINED, /* usCsHpna */
1310 + BP_NOT_DEFINED, /* usAntInUseWireless */
1311 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1312 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1313 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1314 +};
1315 +static PBOARD_PARAMETERS g_BoardParms[] =
1316 + {&g_bcm96338sv, &g_bcm96338l2m8m, 0};
1317 +#endif
1318 +
1319 +#if defined(_BCM96345_) || defined(CONFIG_BCM96345)
1320 +static BOARD_PARAMETERS g_bcm96345r =
1321 +{
1322 + "96345R", /* szBoardId */
1323 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1324 + 0x01, /* ucPhyAddress */
1325 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1326 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1327 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1328 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1329 + BP_NOT_DEFINED, /* usGpioPhyReset */
1330 + 0x01, /* numSwitchPorts */
1331 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1332 + BP_NOT_DEFINED}, /* usReverseMii */
1333 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1334 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1335 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1336 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1337 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1338 + BP_GPIO_11_AH, /* usGpioRj11InnerPair */
1339 + BP_GPIO_12_AH, /* usGpioRj11OuterPair */
1340 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
1341 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1342 + BP_NOT_DEFINED, /* usGpioUartRts */
1343 + BP_NOT_DEFINED, /* usGpioUartCts */
1344 + BP_GPIO_8_AH, /* usGpioLedAdsl */
1345 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1346 + BP_NOT_DEFINED, /* usGpioLedWireless */
1347 + BP_NOT_DEFINED, /* usGpioLedUsb */
1348 + BP_NOT_DEFINED, /* usGpioLedHpna */
1349 + BP_GPIO_8_AH, /* usGpioLedWanData */
1350 + BP_GPIO_9_AH, /* usGpioLedPpp */
1351 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1352 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1353 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
1354 + BP_GPIO_9_AH, /* usGpioLedBlResetCfg */
1355 + BP_GPIO_8_AH, /* usGpioLedBlStop */
1356 + BP_NOT_DEFINED, /* usExtIntrWireless */
1357 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
1358 + BP_NOT_DEFINED, /* usExtIntrHpna */
1359 + BP_NOT_DEFINED, /* usCsHpna */
1360 + BP_NOT_DEFINED, /* usAntInUseWireless */
1361 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1362 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1363 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1364 +};
1365 +
1366 +static BOARD_PARAMETERS g_bcm96345gw2 =
1367 +{
1368 + /* A hardware jumper determines whether GPIO 13 is used for Press and Hold
1369 + * Reset or RTS.
1370 + */
1371 + "96345GW2", /* szBoardId */
1372 + {{BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1373 + 0x00, /* ucPhyAddress */
1374 + BP_GPIO_0_AH, /* usGpioPhySpiSck */
1375 + BP_GPIO_4_AH, /* usGpioPhySpiSs */
1376 + BP_GPIO_12_AH, /* usGpioPhySpiMosi */
1377 + BP_GPIO_11_AH, /* usGpioPhySpiMiso */
1378 + BP_NOT_DEFINED, /* usGpioPhyReset */
1379 + 0x04, /* numSwitchPorts */
1380 + BP_ENET_CONFIG_GPIO, /* usConfigType */
1381 + BP_ENET_REVERSE_MII}, /* usReverseMii */
1382 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1383 + {{BP_VOIP_DSP, /* ucDspType */
1384 + 0x00, /* ucDspAddress */
1385 + BP_EXT_INTR_1, /* usExtIntrVoip */
1386 + BP_GPIO_6_AH, /* usGpioVoipReset */
1387 + BP_GPIO_15_AH, /* usGpioVoipIntr */
1388 + BP_NOT_DEFINED, /* usGpioLedVoip */
1389 + BP_CS_2}, /* usCsVoip */
1390 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1391 + BP_MEMORY_16MB_1_CHIP, /* usSdramSize */
1392 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1393 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1394 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1395 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
1396 + BP_GPIO_2_AH, /* usGpioPcmciaReset */
1397 + BP_GPIO_13_AH, /* usGpioUartRts */
1398 + BP_GPIO_9_AH, /* usGpioUartCts */
1399 + BP_GPIO_8_AH, /* usGpioLedAdsl */
1400 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1401 + BP_NOT_DEFINED, /* usGpioLedWireless */
1402 + BP_GPIO_7_AH, /* usGpioLedUsb */
1403 + BP_NOT_DEFINED, /* usGpioLedHpna */
1404 + BP_GPIO_8_AH, /* usGpioLedWanData */
1405 + BP_NOT_DEFINED, /* usGpioLedPpp */
1406 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1407 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1408 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
1409 + BP_GPIO_7_AH, /* usGpioLedBlResetCfg */
1410 + BP_GPIO_8_AH, /* usGpioLedBlStop */
1411 + BP_EXT_INTR_2, /* usExtIntrWireless */
1412 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
1413 + BP_NOT_DEFINED, /* usExtIntrHpna */
1414 + BP_NOT_DEFINED, /* usCsHpna */
1415 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
1416 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1417 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1418 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1419 +};
1420 +
1421 +static BOARD_PARAMETERS g_bcm96345gw =
1422 +{
1423 + "96345GW", /* szBoardId */
1424 + {{BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1425 + 0x00, /* ucPhyAddress */
1426 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1427 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1428 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1429 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1430 + BP_NOT_DEFINED, /* usGpioPhyReset */
1431 + 0x04, /* numSwitchPorts */
1432 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1433 + BP_ENET_NO_REVERSE_MII}, /* usReverseMii */
1434 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1435 + {{BP_VOIP_DSP, /* ucDspType */
1436 + 0x00, /* ucDspAddress */
1437 + BP_EXT_INTR_1, /* usExtIntrVoip */
1438 + BP_GPIO_6_AH, /* usGpioVoipReset */
1439 + BP_GPIO_15_AH, /* usGpioVoipIntr */
1440 + BP_NOT_DEFINED, /* usGpioLedVoip */
1441 + BP_CS_2}, /* usCsVoip */
1442 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1443 + BP_MEMORY_16MB_1_CHIP, /* usSdramSize */
1444 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1445 + BP_GPIO_11_AH, /* usGpioRj11InnerPair */
1446 + BP_GPIO_1_AH, /* usGpioRj11OuterPair */
1447 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
1448 + BP_GPIO_2_AH, /* usGpioPcmciaReset */
1449 + BP_NOT_DEFINED, /* usGpioUartRts */
1450 + BP_NOT_DEFINED, /* usGpioUartCts */
1451 + BP_GPIO_8_AH, /* usGpioLedAdsl */
1452 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1453 + BP_GPIO_10_AH, /* usGpioLedWireless */
1454 + BP_GPIO_7_AH, /* usGpioLedUsb */
1455 + BP_NOT_DEFINED, /* usGpioLedHpna */
1456 + BP_GPIO_8_AH, /* usGpioLedWanData */
1457 + BP_NOT_DEFINED, /* usGpioLedPpp */
1458 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1459 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1460 + BP_GPIO_9_AH, /* usGpioLedBlAlarm */
1461 + BP_GPIO_10_AH, /* usGpioLedBlResetCfg */
1462 + BP_GPIO_8_AH, /* usGpioLedBlStop */
1463 + BP_EXT_INTR_2, /* usExtIntrWireless */
1464 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
1465 + BP_EXT_INTR_3, /* usExtIntrHpna */
1466 + BP_CS_1, /* usCsHpna */
1467 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
1468 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1469 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1470 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1471 +};
1472 +
1473 +static BOARD_PARAMETERS g_bcm96335r =
1474 +{
1475 + "96335R", /* szBoardId */
1476 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1477 + 0x01, /* ucPhyAddress */
1478 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1479 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1480 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1481 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1482 + BP_NOT_DEFINED, /* usGpioPhyReset */
1483 + 0x01, /* numSwitchPorts */
1484 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1485 + BP_NOT_DEFINED}, /* usReverseMii */
1486 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1487 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1488 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1489 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1490 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1491 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1492 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1493 + BP_GPIO_14_AH, /* usGpioPressAndHoldReset */
1494 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1495 + BP_NOT_DEFINED, /* usGpioUartRts */
1496 + BP_NOT_DEFINED, /* usGpioUartCts */
1497 + BP_GPIO_9_AH, /* usGpioLedAdsl */
1498 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1499 + BP_NOT_DEFINED, /* usGpioLedWireless */
1500 + BP_NOT_DEFINED, /* usGpioLedUsb */
1501 + BP_NOT_DEFINED, /* usGpioLedHpna */
1502 + BP_GPIO_9_AH, /* usGpioLedWanData */
1503 + BP_GPIO_8_AH, /* usGpioLedPpp */
1504 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1505 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1506 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
1507 + BP_GPIO_8_AH, /* usGpioLedBlResetCfg */
1508 + BP_GPIO_9_AH, /* usGpioLedBlStop */
1509 + BP_NOT_DEFINED, /* usExtIntrWireless */
1510 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
1511 + BP_NOT_DEFINED, /* usExtIntrHpna */
1512 + BP_NOT_DEFINED, /* usCsHpna */
1513 + BP_NOT_DEFINED, /* usAntInUseWireless */
1514 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1515 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1516 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1517 +};
1518 +
1519 +static BOARD_PARAMETERS g_bcm96345r0 =
1520 +{
1521 + "96345R0", /* szBoardId */
1522 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1523 + 0x01, /* ucPhyAddress */
1524 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1525 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1526 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1527 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1528 + BP_NOT_DEFINED, /* usGpioPhyReset */
1529 + 0x01, /* numSwitchPorts */
1530 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1531 + BP_NOT_DEFINED}, /* usReverseMii */
1532 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1533 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1534 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1535 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1536 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1537 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1538 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1539 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
1540 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1541 + BP_NOT_DEFINED, /* usGpioUartRts */
1542 + BP_NOT_DEFINED, /* usGpioUartCts */
1543 + BP_GPIO_8_AH, /* usGpioLedAdsl */
1544 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1545 + BP_NOT_DEFINED, /* usGpioLedWireless */
1546 + BP_NOT_DEFINED, /* usGpioLedUsb */
1547 + BP_NOT_DEFINED, /* usGpioLedHpna */
1548 + BP_GPIO_9_AH, /* usGpioLedWanData */
1549 + BP_GPIO_9_AH, /* usGpioLedPpp */
1550 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1551 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1552 + BP_GPIO_9_AH, /* usGpioLedBlAlarm */
1553 + BP_GPIO_8_AH, /* usGpioLedBlResetCfg */
1554 + BP_GPIO_8_AH, /* usGpioLedBlStop */
1555 + BP_NOT_DEFINED, /* usExtIntrWireless */
1556 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
1557 + BP_NOT_DEFINED, /* usExtIntrHpna */
1558 + BP_NOT_DEFINED, /* usCsHpna */
1559 + BP_NOT_DEFINED, /* usAntInUseWireless */
1560 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1561 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1562 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1563 +};
1564 +
1565 +static BOARD_PARAMETERS g_bcm96345rs =
1566 +{
1567 + "96345RS", /* szBoardId */
1568 + {{BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1569 + 0x00, /* ucPhyAddress */
1570 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1571 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1572 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1573 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1574 + BP_NOT_DEFINED, /* usGpioPhyReset */
1575 + 0x01, /* numSwitchPorts */
1576 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1577 + BP_ENET_NO_REVERSE_MII}, /* usReverseMii */
1578 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1579 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1580 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1581 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1582 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1583 + BP_GPIO_11_AH, /* usGpioRj11InnerPair */
1584 + BP_GPIO_12_AH, /* usGpioRj11OuterPair */
1585 + BP_GPIO_13_AH, /* usGpioPressAndHoldReset */
1586 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1587 + BP_NOT_DEFINED, /* usGpioUartRts */
1588 + BP_NOT_DEFINED, /* usGpioUartCts */
1589 + BP_GPIO_8_AH, /* usGpioLedAdsl */
1590 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1591 + BP_NOT_DEFINED, /* usGpioLedWireless */
1592 + BP_NOT_DEFINED, /* usGpioLedUsb */
1593 + BP_NOT_DEFINED, /* usGpioLedHpna */
1594 + BP_GPIO_8_AH, /* usGpioLedWanData */
1595 + BP_GPIO_9_AH, /* usGpioLedPpp */
1596 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1597 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1598 + BP_GPIO_10_AH, /* usGpioLedBlAlarm */
1599 + BP_GPIO_9_AH, /* usGpioLedBlResetCfg */
1600 + BP_GPIO_8_AH, /* usGpioLedBlStop */
1601 + BP_NOT_DEFINED, /* usExtIntrWireless */
1602 + BP_EXT_INTR_0, /* usExtIntrAdslDyingGasp */
1603 + BP_NOT_DEFINED, /* usExtIntrHpna */
1604 + BP_NOT_DEFINED, /* usCsHpna */
1605 + BP_NOT_DEFINED, /* usAntInUseWireless */
1606 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1607 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1608 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1609 +};
1610 +
1611 +static PBOARD_PARAMETERS g_BoardParms[] =
1612 + {&g_bcm96345r, &g_bcm96345gw2, &g_bcm96345gw, &g_bcm96335r, &g_bcm96345r0,
1613 + &g_bcm96345rs, 0};
1614 +#endif
1615 +
1616 +#if defined(_BCM96348_) || defined(CONFIG_BCM96348)
1617 +
1618 +static BOARD_PARAMETERS g_bcm96348r =
1619 +{
1620 + "96348R", /* szBoardId */
1621 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1622 + 0x01, /* ucPhyAddress */
1623 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1624 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1625 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1626 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1627 + BP_NOT_DEFINED, /* usGpioPhyReset */
1628 + 0x01, /* numSwitchPorts */
1629 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1630 + BP_NOT_DEFINED}, /* usReverseMii */
1631 + {BP_ENET_NO_PHY}}, /* ucPhyType */
1632 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1633 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1634 + BP_MEMORY_8MB_1_CHIP, /* usSdramSize */
1635 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1636 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1637 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1638 + BP_GPIO_7_AH, /* usGpioPressAndHoldReset */
1639 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1640 + BP_NOT_DEFINED, /* usGpioUartRts */
1641 + BP_NOT_DEFINED, /* usGpioUartCts */
1642 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1643 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1644 + BP_NOT_DEFINED, /* usGpioLedWireless */
1645 + BP_NOT_DEFINED, /* usGpioLedUsb */
1646 + BP_NOT_DEFINED, /* usGpioLedHpna */
1647 + BP_GPIO_3_AL, /* usGpioLedWanData */
1648 + BP_GPIO_3_AL, /* usGpioLedPpp */
1649 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1650 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1651 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1652 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1653 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1654 + BP_NOT_DEFINED, /* usExtIntrWireless */
1655 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1656 + BP_NOT_DEFINED, /* usExtIntrHpna */
1657 + BP_NOT_DEFINED, /* usCsHpna */
1658 + BP_NOT_DEFINED, /* usAntInUseWireless */
1659 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1660 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1661 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1662 +};
1663 +
1664 +static BOARD_PARAMETERS g_bcm96348lv =
1665 +{
1666 + "96348LV", /* szBoardId */
1667 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1668 + 0x01, /* ucPhyAddress */
1669 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1670 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1671 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1672 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1673 + BP_NOT_DEFINED, /* usGpioPhyReset */
1674 + 0x01, /* numSwitchPorts */
1675 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1676 + BP_NOT_DEFINED}, /* usReverseMii */
1677 + {BP_ENET_EXTERNAL_PHY, /* ucPhyType */
1678 + 0x02, /* ucPhyAddress */
1679 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1680 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1681 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1682 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1683 + BP_GPIO_5_AL, /* usGpioPhyReset */
1684 + 0x01, /* numSwitchPorts */
1685 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1686 + BP_NOT_DEFINED}}, /* usReverseMii */
1687 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1688 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1689 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
1690 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1691 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1692 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1693 + BP_GPIO_7_AH, /* usGpioPressAndHoldReset */
1694 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1695 + BP_NOT_DEFINED, /* usGpioUartRts */
1696 + BP_NOT_DEFINED, /* usGpioUartCts */
1697 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1698 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1699 + BP_NOT_DEFINED, /* usGpioLedWireless */
1700 + BP_NOT_DEFINED, /* usGpioLedUsb */
1701 + BP_NOT_DEFINED, /* usGpioLedHpna */
1702 + BP_GPIO_3_AL, /* usGpioLedWanData */
1703 + BP_GPIO_3_AL, /* usGpioLedPpp */
1704 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1705 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1706 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1707 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1708 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1709 + BP_NOT_DEFINED, /* usExtIntrWireless */
1710 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
1711 + BP_NOT_DEFINED, /* usExtIntrHpna */
1712 + BP_NOT_DEFINED, /* usCsHpna */
1713 + BP_NOT_DEFINED, /* usAntInUseWireless */
1714 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1715 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1716 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1717 +};
1718 +
1719 +static BOARD_PARAMETERS g_bcm96348gw =
1720 +{
1721 + "96348GW", /* szBoardId */
1722 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1723 + 0x01, /* ucPhyAddress */
1724 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1725 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1726 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1727 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1728 + BP_NOT_DEFINED, /* usGpioPhyReset */
1729 + 0x01, /* numSwitchPorts */
1730 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1731 + BP_NOT_DEFINED}, /* usReverseMii */
1732 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1733 + 0x00, /* ucPhyAddress */
1734 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1735 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1736 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1737 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1738 + BP_NOT_DEFINED, /* usGpioPhyReset */
1739 + 0x03, /* numSwitchPorts */
1740 + BP_ENET_CONFIG_SPI_SSB_0, /* usConfigType */
1741 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
1742 + {{BP_VOIP_DSP, /* ucDspType */
1743 + 0x00, /* ucDspAddress */
1744 + BP_EXT_INTR_2, /* usExtIntrVoip */
1745 + BP_GPIO_6_AH, /* usGpioVoipReset */
1746 + BP_GPIO_34_AH, /* usGpioVoipIntr */
1747 + BP_NOT_DEFINED, /* usGpioLedVoip */
1748 + BP_CS_2}, /* usCsVoip */
1749 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1750 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
1751 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1752 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1753 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1754 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
1755 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1756 + BP_NOT_DEFINED, /* usGpioUartRts */
1757 + BP_NOT_DEFINED, /* usGpioUartCts */
1758 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1759 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1760 + BP_NOT_DEFINED, /* usGpioLedWireless */
1761 + BP_NOT_DEFINED, /* usGpioLedUsb */
1762 + BP_NOT_DEFINED, /* usGpioLedHpna */
1763 + BP_GPIO_3_AL, /* usGpioLedWanData */
1764 + BP_GPIO_3_AL, /* usGpioLedPpp */
1765 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1766 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1767 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1768 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1769 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1770 + BP_NOT_DEFINED, /* usExtIntrWireless */
1771 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1772 + BP_NOT_DEFINED, /* usExtIntrHpna */
1773 + BP_NOT_DEFINED, /* usCsHpna */
1774 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
1775 + BP_NOT_DEFINED, /* BP_GPIO_35_AH, */ /* usGpioSesBtnWireless */
1776 + BP_NOT_DEFINED, /* BP_EXT_INTR_3, */ /* usExtIntrSesBtnWireless */
1777 + BP_NOT_DEFINED /* BP_GPIO_0_AL */ /* usGpioLedSesWireless */
1778 +};
1779 +
1780 +
1781 +static BOARD_PARAMETERS g_bcm96348gw_10 =
1782 +{
1783 + "96348GW-10", /* szBoardId */
1784 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1785 + 0x01, /* ucPhyAddress */
1786 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1787 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1788 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1789 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1790 + BP_NOT_DEFINED, /* usGpioPhyReset */
1791 + 0x01, /* numSwitchPorts */
1792 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1793 + BP_NOT_DEFINED}, /* usReverseMii */
1794 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1795 + 0x00, /* ucPhyAddress */
1796 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1797 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1798 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1799 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1800 + BP_NOT_DEFINED, /* usGpioPhyReset */
1801 + 0x03, /* numSwitchPorts */
1802 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
1803 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
1804 + {{BP_VOIP_DSP, /* ucDspType */
1805 + 0x00, /* ucDspAddress */
1806 + BP_EXT_INTR_2, /* usExtIntrVoip */
1807 + BP_GPIO_6_AH, /* usGpioVoipReset */
1808 + BP_GPIO_34_AH, /* usGpioVoipIntr */
1809 + BP_NOT_DEFINED, /* usGpioLedVoip */
1810 + BP_CS_2}, /* usCsVoip */
1811 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1812 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
1813 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1814 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1815 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1816 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
1817 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1818 + BP_NOT_DEFINED, /* usGpioUartRts */
1819 + BP_NOT_DEFINED, /* usGpioUartCts */
1820 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1821 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1822 + BP_NOT_DEFINED, /* usGpioLedWireless */
1823 + BP_NOT_DEFINED, /* usGpioLedUsb */
1824 + BP_NOT_DEFINED, /* usGpioLedHpna */
1825 + BP_GPIO_3_AL, /* usGpioLedWanData */
1826 + BP_GPIO_3_AL, /* usGpioLedPpp */
1827 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1828 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1829 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1830 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1831 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1832 + BP_NOT_DEFINED, /* usExtIntrWireless */
1833 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1834 + BP_NOT_DEFINED, /* usExtIntrHpna */
1835 + BP_NOT_DEFINED, /* usCsHpna */
1836 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
1837 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1838 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1839 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1840 +};
1841 +
1842 +static BOARD_PARAMETERS g_bcm96348gw_11 =
1843 +{
1844 + "96348GW-11", /* szBoardId */
1845 + {{BP_ENET_NO_PHY}, /* ucPhyType */
1846 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1847 + 0x00, /* ucPhyAddress */
1848 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1849 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1850 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1851 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1852 + BP_NOT_DEFINED, /* usGpioPhyReset */
1853 + 0x04, /* numSwitchPorts */
1854 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
1855 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
1856 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1857 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1858 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
1859 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1860 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1861 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1862 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
1863 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1864 + BP_NOT_DEFINED, /* usGpioUartRts */
1865 + BP_NOT_DEFINED, /* usGpioUartCts */
1866 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1867 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1868 + BP_NOT_DEFINED, /* usGpioLedWireless */
1869 + BP_NOT_DEFINED, /* usGpioLedUsb */
1870 + BP_NOT_DEFINED, /* usGpioLedHpna */
1871 + BP_GPIO_3_AL, /* usGpioLedWanData */
1872 + BP_GPIO_3_AL, /* usGpioLedPpp */
1873 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1874 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1875 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1876 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
1877 + BP_GPIO_1_AL, /* usGpioLedBlStop */
1878 + BP_NOT_DEFINED, /* usExtIntrWireless */
1879 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1880 + BP_NOT_DEFINED, /* usExtIntrHpna */
1881 + BP_NOT_DEFINED, /* usCsHpna */
1882 + BP_NOT_DEFINED, /* usAntInUseWireless */
1883 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1884 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1885 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1886 +};
1887 +
1888 +static BOARD_PARAMETERS g_bcm96348sv =
1889 +{
1890 + "96348SV", /* szBoardId */
1891 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1892 + 0x01, /* ucPhyAddress */
1893 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1894 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1895 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1896 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1897 + BP_NOT_DEFINED, /* usGpioPhyReset */
1898 + 0x01, /* numSwitchPorts */
1899 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1900 + BP_NOT_DEFINED}, /* usReverseMii */
1901 + {BP_ENET_EXTERNAL_PHY, /* ucPhyType */
1902 + 0x1f, /* ucPhyAddress */
1903 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1904 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1905 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1906 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1907 + BP_NOT_DEFINED, /* usGpioPhyReset */
1908 + 0x01, /* numSwitchPorts */
1909 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1910 + BP_NOT_DEFINED}}, /* usReverseMii */
1911 + {{BP_VOIP_NO_DSP}, /* ucDspType */
1912 + {BP_VOIP_NO_DSP}}, /* ucDspType */
1913 + BP_MEMORY_32MB_2_CHIP, /* usSdramSize */
1914 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1915 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1916 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1917 + BP_NOT_DEFINED, /* usGpioPressAndHoldReset */
1918 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1919 + BP_NOT_DEFINED, /* usGpioUartRts */
1920 + BP_NOT_DEFINED, /* usGpioUartCts */
1921 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1922 + BP_NOT_DEFINED, /* usGpioLedAdslFail */
1923 + BP_NOT_DEFINED, /* usGpioLedWireless */
1924 + BP_NOT_DEFINED, /* usGpioLedUsb */
1925 + BP_NOT_DEFINED, /* usGpioLedHpna */
1926 + BP_NOT_DEFINED, /* usGpioLedWanData */
1927 + BP_NOT_DEFINED, /* usGpioLedPpp */
1928 + BP_NOT_DEFINED, /* usGpioLedPppFail */
1929 + BP_NOT_DEFINED, /* usGpioLedBlPowerOn */
1930 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1931 + BP_NOT_DEFINED, /* usGpioLedBlResetCfg */
1932 + BP_NOT_DEFINED, /* usGpioLedBlStop */
1933 + BP_NOT_DEFINED, /* usExtIntrWireless */
1934 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
1935 + BP_NOT_DEFINED, /* usExtIntrHpna */
1936 + BP_NOT_DEFINED, /* usCsHpna */
1937 + BP_NOT_DEFINED, /* usAntInUseWireless */
1938 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
1939 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
1940 + BP_NOT_DEFINED /* usGpioLedSesWireless */
1941 +};
1942 +
1943 +
1944 +static BOARD_PARAMETERS g_bcm96348gw_dualDsp =
1945 +{
1946 + "96348GW-DualDSP", /* szBoardId */
1947 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
1948 + 0x01, /* ucPhyAddress */
1949 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1950 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1951 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1952 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1953 + BP_NOT_DEFINED, /* usGpioPhyReset */
1954 + 0x01, /* numSwitchPorts */
1955 + BP_ENET_CONFIG_MDIO, /* usConfigType */
1956 + BP_NOT_DEFINED}, /* usReverseMii */
1957 + {BP_ENET_EXTERNAL_SWITCH, /* ucPhyType */
1958 + 0x00, /* ucPhyAddress */
1959 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
1960 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
1961 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
1962 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
1963 + BP_NOT_DEFINED, /* usGpioPhyReset */
1964 + 0x03, /* numSwitchPorts */
1965 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
1966 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
1967 + {{BP_VOIP_DSP, /* ucDspType */
1968 + 0x00, /* ucDspAddress */
1969 + BP_EXT_INTR_2, /* usExtIntrVoip */
1970 + BP_UNEQUIPPED, /* usGpioVoipReset */
1971 + BP_GPIO_34_AH, /* usGpioVoipIntr */
1972 + BP_NOT_DEFINED, /* usGpioLedVoip */
1973 + BP_CS_2}, /* usCsVoip */
1974 + {BP_VOIP_DSP, /* ucDspType */
1975 + 0x01, /* ucDspAddress */
1976 + BP_EXT_INTR_3, /* usExtIntrVoip */
1977 + BP_UNEQUIPPED , /* usGpioVoipReset */
1978 + BP_GPIO_35_AH, /* usGpioVoipIntr */
1979 + BP_NOT_DEFINED, /* usGpioLedVoip */
1980 + BP_CS_3}}, /* usCsVoip */
1981 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
1982 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
1983 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
1984 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
1985 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
1986 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
1987 + BP_NOT_DEFINED, /* usGpioUartRts */
1988 + BP_NOT_DEFINED, /* usGpioUartCts */
1989 + BP_NOT_DEFINED, /* usGpioLedAdsl */
1990 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
1991 + BP_NOT_DEFINED, /* usGpioLedWireless */
1992 + BP_NOT_DEFINED, /* usGpioLedUsb */
1993 + BP_NOT_DEFINED, /* usGpioLedHpna */
1994 + BP_GPIO_3_AL, /* usGpioLedWanData */
1995 + BP_GPIO_3_AL, /* usGpioLedPpp */
1996 + BP_GPIO_4_AL, /* usGpioLedPppFail */
1997 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
1998 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
1999 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
2000 + BP_GPIO_1_AL, /* usGpioLedBlStop */
2001 + BP_NOT_DEFINED, /* usExtIntrWireless */
2002 + BP_HW_DEFINED, /* usExtIntrAdslDyingGasp */
2003 + BP_NOT_DEFINED, /* usExtIntrHpna */
2004 + BP_NOT_DEFINED, /* usCsHpna */
2005 + BP_WLAN_ANT_MAIN, /* usAntInUseWireless */
2006 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
2007 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
2008 + BP_NOT_DEFINED /* usGpioLedSesWireless */
2009 +};
2010 +
2011 +
2012 +static BOARD_PARAMETERS g_bcmCustom_01 =
2013 +{
2014 + "BCMCUST_01", /* szBoardId */
2015 + {{BP_ENET_INTERNAL_PHY, /* ucPhyType */
2016 + 0x01, /* ucPhyAddress */
2017 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
2018 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
2019 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
2020 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
2021 + BP_NOT_DEFINED, /* usGpioPhyReset */
2022 + 0x01, /* numSwitchPorts */
2023 + BP_ENET_CONFIG_MDIO, /* usConfigType */
2024 + BP_NOT_DEFINED}, /* usReverseMii */
2025 + {BP_ENET_NO_PHY, /* ucPhyType */
2026 + 0x00, /* ucPhyAddress */
2027 + BP_NOT_DEFINED, /* usGpioPhySpiSck */
2028 + BP_NOT_DEFINED, /* usGpioPhySpiSs */
2029 + BP_NOT_DEFINED, /* usGpioPhySpiMosi */
2030 + BP_NOT_DEFINED, /* usGpioPhySpiMiso */
2031 + BP_NOT_DEFINED, /* usGpioPhyReset */
2032 + 0x01, /* numSwitchPorts */
2033 + BP_ENET_CONFIG_SPI_SSB_1, /* usConfigType */
2034 + BP_ENET_REVERSE_MII}}, /* usReverseMii */
2035 + {{BP_VOIP_DSP, /* ucDspType */
2036 + 0x00, /* ucDspAddress */
2037 + BP_EXT_INTR_2, /* usExtIntrVoip */
2038 + BP_GPIO_36_AH, /* usGpioVoipReset */
2039 + BP_GPIO_34_AL, /* usGpioVoipIntr */
2040 + BP_NOT_DEFINED, /* usGpioLedVoip */
2041 + BP_CS_2}, /* usCsVoip */
2042 + {BP_VOIP_NO_DSP}}, /* ucDspType */
2043 + BP_MEMORY_16MB_2_CHIP, /* usSdramSize */
2044 + BP_PSI_DEFAULT_SIZE, /* usPsiSize */
2045 + BP_NOT_DEFINED, /* usGpioRj11InnerPair */
2046 + BP_NOT_DEFINED, /* usGpioRj11OuterPair */
2047 + BP_GPIO_33_AL, /* usGpioPressAndHoldReset */
2048 + BP_NOT_DEFINED, /* usGpioPcmciaReset */
2049 + BP_NOT_DEFINED, /* usGpioUartRts */
2050 + BP_NOT_DEFINED, /* usGpioUartCts */
2051 + BP_NOT_DEFINED, /* usGpioLedAdsl */
2052 + BP_GPIO_2_AL, /* usGpioLedAdslFail */
2053 + BP_NOT_DEFINED, /* usGpioLedWireless */
2054 + BP_NOT_DEFINED, /* usGpioLedUsb */
2055 + BP_NOT_DEFINED, /* usGpioLedHpna */
2056 + BP_GPIO_3_AL, /* usGpioLedWanData */
2057 + BP_GPIO_3_AL, /* usGpioLedPpp */
2058 + BP_GPIO_4_AL, /* usGpioLedPppFail */
2059 + BP_GPIO_0_AL, /* usGpioLedBlPowerOn */
2060 + BP_NOT_DEFINED, /* usGpioLedBlAlarm */
2061 + BP_GPIO_3_AL, /* usGpioLedBlResetCfg */
2062 + BP_GPIO_1_AL, /* usGpioLedBlStop */
2063 + BP_NOT_DEFINED, /* usExtIntrWireless */
2064 + BP_NOT_DEFINED, /* usExtIntrAdslDyingGasp */
2065 + BP_NOT_DEFINED, /* usExtIntrHpna */
2066 + BP_NOT_DEFINED, /* usCsHpna */
2067 + BP_NOT_DEFINED, /* usAntInUseWireless */
2068 + BP_NOT_DEFINED, /* usGpioSesBtnWireless */
2069 + BP_NOT_DEFINED, /* usExtIntrSesBtnWireless */
2070 + BP_NOT_DEFINED /* usGpioLedSesWireless */
2071 +};
2072 +
2073 +static PBOARD_PARAMETERS g_BoardParms[] =
2074 + {&g_bcm96348r, &g_bcm96348lv, &g_bcm96348gw, &g_bcm96348gw_10,
2075 + &g_bcm96348gw_11, &g_bcm96348sv, &g_bcm96348gw_dualDsp,
2076 + &g_bcmCustom_01, 0};
2077 +#endif
2078 +
2079 +static PBOARD_PARAMETERS g_pCurrentBp = 0;
2080 +
2081 +/**************************************************************************
2082 + * Name : bpstrcmp
2083 + *
2084 + * Description: String compare for this file so it does not depend on an OS.
2085 + * (Linux kernel and CFE share this source file.)
2086 + *
2087 + * Parameters : [IN] dest - destination string
2088 + * [IN] src - source string
2089 + *
2090 + * Returns : -1 - dest < src, 1 - dest > src, 0 dest == src
2091 + ***************************************************************************/
2092 +static int bpstrcmp(const char *dest,const char *src);
2093 +static int bpstrcmp(const char *dest,const char *src)
2094 +{
2095 + while (*src && *dest)
2096 + {
2097 + if (*dest < *src) return -1;
2098 + if (*dest > *src) return 1;
2099 + dest++;
2100 + src++;
2101 + }
2102 +
2103 + if (*dest && !*src) return 1;
2104 + if (!*dest && *src) return -1;
2105 + return 0;
2106 +} /* bpstrcmp */
2107 +
2108 +/**************************************************************************
2109 + * Name : BpGetVoipDspConfig
2110 + *
2111 + * Description: Gets the DSP configuration from the board parameter
2112 + * structure for a given DSP index.
2113 + *
2114 + * Parameters : [IN] dspNum - DSP index (number)
2115 + *
2116 + * Returns : Pointer to DSP configuration block if found/valid, NULL
2117 + * otherwise.
2118 + ***************************************************************************/
2119 +VOIP_DSP_INFO *BpGetVoipDspConfig( unsigned char dspNum );
2120 +VOIP_DSP_INFO *BpGetVoipDspConfig( unsigned char dspNum )
2121 +{
2122 + VOIP_DSP_INFO *pDspConfig = 0;
2123 + int i;
2124 +
2125 + if( g_pCurrentBp )
2126 + {
2127 + for( i = 0 ; i < BP_MAX_VOIP_DSP ; i++ )
2128 + {
2129 + if( g_pCurrentBp->VoIPDspInfo[i].ucDspType != BP_VOIP_NO_DSP &&
2130 + g_pCurrentBp->VoIPDspInfo[i].ucDspAddress == dspNum )
2131 + {
2132 + pDspConfig = &g_pCurrentBp->VoIPDspInfo[i];
2133 + break;
2134 + }
2135 + }
2136 + }
2137 +
2138 + return pDspConfig;
2139 +}
2140 +
2141 +
2142 +/**************************************************************************
2143 + * Name : BpSetBoardId
2144 + *
2145 + * Description: This function find the BOARD_PARAMETERS structure for the
2146 + * specified board id string and assigns it to a global, static
2147 + * variable.
2148 + *
2149 + * Parameters : [IN] pszBoardId - Board id string that is saved into NVRAM.
2150 + *
2151 + * Returns : BP_SUCCESS - Success, value is returned.
2152 + * BP_BOARD_ID_NOT_FOUND - Error, board id input string does not
2153 + * have a board parameters configuration record.
2154 + ***************************************************************************/
2155 +int BpSetBoardId( char *pszBoardId )
2156 +{
2157 + int nRet = BP_BOARD_ID_NOT_FOUND;
2158 + PBOARD_PARAMETERS *ppBp;
2159 +
2160 + for( ppBp = g_BoardParms; *ppBp; ppBp++ )
2161 + {
2162 + if( !bpstrcmp((*ppBp)->szBoardId, pszBoardId) )
2163 + {
2164 + g_pCurrentBp = *ppBp;
2165 + nRet = BP_SUCCESS;
2166 + break;
2167 + }
2168 + }
2169 +
2170 + return( nRet );
2171 +} /* BpSetBoardId */
2172 +
2173 +/**************************************************************************
2174 + * Name : BpGetBoardIds
2175 + *
2176 + * Description: This function returns all of the supported board id strings.
2177 + *
2178 + * Parameters : [OUT] pszBoardIds - Address of a buffer that the board id
2179 + * strings are returned in. Each id starts at BP_BOARD_ID_LEN
2180 + * boundary.
2181 + * [IN] nBoardIdsSize - Number of BP_BOARD_ID_LEN elements that
2182 + * were allocated in pszBoardIds.
2183 + *
2184 + * Returns : Number of board id strings returned.
2185 + ***************************************************************************/
2186 +int BpGetBoardIds( char *pszBoardIds, int nBoardIdsSize )
2187 +{
2188 + PBOARD_PARAMETERS *ppBp;
2189 + int i;
2190 + char *src;
2191 + char *dest;
2192 +
2193 + for( i = 0, ppBp = g_BoardParms; *ppBp && nBoardIdsSize;
2194 + i++, ppBp++, nBoardIdsSize--, pszBoardIds += BP_BOARD_ID_LEN )
2195 + {
2196 + dest = pszBoardIds;
2197 + src = (*ppBp)->szBoardId;
2198 + while( *src )
2199 + *dest++ = *src++;
2200 + *dest = '\0';
2201 + }
2202 +
2203 + return( i );
2204 +} /* BpGetBoardIds */
2205 +
2206 +/**************************************************************************
2207 + * Name : BpGetEthernetMacInfo
2208 + *
2209 + * Description: This function returns all of the supported board id strings.
2210 + *
2211 + * Parameters : [OUT] pEnetInfos - Address of an array of ETHERNET_MAC_INFO
2212 + * buffers.
2213 + * [IN] nNumEnetInfos - Number of ETHERNET_MAC_INFO elements that
2214 + * are pointed to by pEnetInfos.
2215 + *
2216 + * Returns : BP_SUCCESS - Success, value is returned.
2217 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2218 + ***************************************************************************/
2219 +int BpGetEthernetMacInfo( PETHERNET_MAC_INFO pEnetInfos, int nNumEnetInfos )
2220 +{
2221 + int i, nRet;
2222 +
2223 + if( g_pCurrentBp )
2224 + {
2225 + for( i = 0; i < nNumEnetInfos; i++, pEnetInfos++ )
2226 + {
2227 + if( i < BP_MAX_ENET_MACS )
2228 + {
2229 + unsigned char *src = (unsigned char *)
2230 + &g_pCurrentBp->EnetMacInfos[i];
2231 + unsigned char *dest = (unsigned char *) pEnetInfos;
2232 + int len = sizeof(ETHERNET_MAC_INFO);
2233 + while( len-- )
2234 + *dest++ = *src++;
2235 + }
2236 + else
2237 + pEnetInfos->ucPhyType = BP_ENET_NO_PHY;
2238 + }
2239 +
2240 + nRet = BP_SUCCESS;
2241 + }
2242 + else
2243 + {
2244 + for( i = 0; i < nNumEnetInfos; i++, pEnetInfos++ )
2245 + pEnetInfos->ucPhyType = BP_ENET_NO_PHY;
2246 +
2247 + nRet = BP_BOARD_ID_NOT_SET;
2248 + }
2249 +
2250 + return( nRet );
2251 +} /* BpGetEthernetMacInfo */
2252 +
2253 +/**************************************************************************
2254 + * Name : BpGetSdramSize
2255 + *
2256 + * Description: This function returns a constant that describees the board's
2257 + * SDRAM type and size.
2258 + *
2259 + * Parameters : [OUT] pulSdramSize - Address of short word that the SDRAM size
2260 + * is returned in.
2261 + *
2262 + * Returns : BP_SUCCESS - Success, value is returned.
2263 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2264 + ***************************************************************************/
2265 +int BpGetSdramSize( unsigned long *pulSdramSize )
2266 +{
2267 + int nRet;
2268 +
2269 + if( g_pCurrentBp )
2270 + {
2271 + *pulSdramSize = g_pCurrentBp->usSdramSize;
2272 + nRet = BP_SUCCESS;
2273 + }
2274 + else
2275 + {
2276 + *pulSdramSize = BP_NOT_DEFINED;
2277 + nRet = BP_BOARD_ID_NOT_SET;
2278 + }
2279 +
2280 + return( nRet );
2281 +} /* BpGetSdramSize */
2282 +
2283 +/**************************************************************************
2284 + * Name : BpGetPsiSize
2285 + *
2286 + * Description: This function returns the persistent storage size in K bytes.
2287 + *
2288 + * Parameters : [OUT] pulPsiSize - Address of short word that the persistent
2289 + * storage size is returned in.
2290 + *
2291 + * Returns : BP_SUCCESS - Success, value is returned.
2292 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2293 + ***************************************************************************/
2294 +int BpGetPsiSize( unsigned long *pulPsiSize )
2295 +{
2296 + int nRet;
2297 +
2298 + if( g_pCurrentBp )
2299 + {
2300 + *pulPsiSize = g_pCurrentBp->usPsiSize;
2301 + nRet = BP_SUCCESS;
2302 + }
2303 + else
2304 + {
2305 + *pulPsiSize = BP_NOT_DEFINED;
2306 + nRet = BP_BOARD_ID_NOT_SET;
2307 + }
2308 +
2309 + return( nRet );
2310 +} /* BpGetPsiSize */
2311 +
2312 +/**************************************************************************
2313 + * Name : BpGetRj11InnerOuterPairGpios
2314 + *
2315 + * Description: This function returns the GPIO pin assignments for changing
2316 + * between the RJ11 inner pair and RJ11 outer pair.
2317 + *
2318 + * Parameters : [OUT] pusInner - Address of short word that the RJ11 inner pair
2319 + * GPIO pin is returned in.
2320 + * [OUT] pusOuter - Address of short word that the RJ11 outer pair
2321 + * GPIO pin is returned in.
2322 + *
2323 + * Returns : BP_SUCCESS - Success, values are returned.
2324 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2325 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2326 + * for the board.
2327 + ***************************************************************************/
2328 +int BpGetRj11InnerOuterPairGpios( unsigned short *pusInner,
2329 + unsigned short *pusOuter )
2330 +{
2331 + int nRet;
2332 +
2333 + if( g_pCurrentBp )
2334 + {
2335 + *pusInner = g_pCurrentBp->usGpioRj11InnerPair;
2336 + *pusOuter = g_pCurrentBp->usGpioRj11OuterPair;
2337 +
2338 + if( g_pCurrentBp->usGpioRj11InnerPair != BP_NOT_DEFINED &&
2339 + g_pCurrentBp->usGpioRj11OuterPair != BP_NOT_DEFINED )
2340 + {
2341 + nRet = BP_SUCCESS;
2342 + }
2343 + else
2344 + {
2345 + nRet = BP_VALUE_NOT_DEFINED;
2346 + }
2347 + }
2348 + else
2349 + {
2350 + *pusInner = *pusOuter = BP_NOT_DEFINED;
2351 + nRet = BP_BOARD_ID_NOT_SET;
2352 + }
2353 +
2354 + return( nRet );
2355 +} /* BpGetRj11InnerOuterPairGpios */
2356 +
2357 +/**************************************************************************
2358 + * Name : BpGetPressAndHoldResetGpio
2359 + *
2360 + * Description: This function returns the GPIO pin assignment for the press
2361 + * and hold reset button.
2362 + *
2363 + * Parameters : [OUT] pusValue - Address of short word that the press and hold
2364 + * reset button GPIO pin is returned in.
2365 + *
2366 + * Returns : BP_SUCCESS - Success, value is returned.
2367 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2368 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2369 + * for the board.
2370 + ***************************************************************************/
2371 +int BpGetPressAndHoldResetGpio( unsigned short *pusValue )
2372 +{
2373 + int nRet;
2374 +
2375 + if( g_pCurrentBp )
2376 + {
2377 + *pusValue = g_pCurrentBp->usGpioPressAndHoldReset;
2378 +
2379 + if( g_pCurrentBp->usGpioPressAndHoldReset != BP_NOT_DEFINED )
2380 + {
2381 + nRet = BP_SUCCESS;
2382 + }
2383 + else
2384 + {
2385 + nRet = BP_VALUE_NOT_DEFINED;
2386 + }
2387 + }
2388 + else
2389 + {
2390 + *pusValue = BP_NOT_DEFINED;
2391 + nRet = BP_BOARD_ID_NOT_SET;
2392 + }
2393 +
2394 + return( nRet );
2395 +} /* BpGetPressAndHoldResetGpio */
2396 +
2397 +/**************************************************************************
2398 + * Name : BpGetVoipResetGpio
2399 + *
2400 + * Description: This function returns the GPIO pin assignment for the VOIP
2401 + * Reset operation.
2402 + *
2403 + * Parameters : [OUT] pusValue - Address of short word that the VOIP reset
2404 + * GPIO pin is returned in.
2405 + * [IN] dspNum - Address of the DSP to query.
2406 + *
2407 + * Returns : BP_SUCCESS - Success, value is returned.
2408 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2409 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2410 + * for the board.
2411 + ***************************************************************************/
2412 +int BpGetVoipResetGpio( unsigned char dspNum, unsigned short *pusValue )
2413 +{
2414 + int nRet;
2415 +
2416 + if( g_pCurrentBp )
2417 + {
2418 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
2419 +
2420 + if( pDspInfo )
2421 + {
2422 + *pusValue = pDspInfo->usGpioVoipReset;
2423 +
2424 + if( *pusValue != BP_NOT_DEFINED ||
2425 + *pusValue == BP_UNEQUIPPED )
2426 + {
2427 + nRet = BP_SUCCESS;
2428 + }
2429 + else
2430 + {
2431 + nRet = BP_VALUE_NOT_DEFINED;
2432 + }
2433 + }
2434 + else
2435 + {
2436 + *pusValue = BP_NOT_DEFINED;
2437 + nRet = BP_BOARD_ID_NOT_FOUND;
2438 + }
2439 + }
2440 + else
2441 + {
2442 + *pusValue = BP_NOT_DEFINED;
2443 + nRet = BP_BOARD_ID_NOT_SET;
2444 + }
2445 +
2446 + return( nRet );
2447 +} /* BpGetVoipResetGpio */
2448 +
2449 +/**************************************************************************
2450 + * Name : BpGetVoipIntrGpio
2451 + *
2452 + * Description: This function returns the GPIO pin assignment for VoIP interrupt.
2453 + *
2454 + * Parameters : [OUT] pusValue - Address of short word that the VOIP interrupt
2455 + * GPIO pin is returned in.
2456 + * [IN] dspNum - Address of the DSP to query.
2457 + *
2458 + * Returns : BP_SUCCESS - Success, value is returned.
2459 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2460 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2461 + * for the board.
2462 + ***************************************************************************/
2463 +int BpGetVoipIntrGpio( unsigned char dspNum, unsigned short *pusValue )
2464 +{
2465 + int nRet;
2466 +
2467 + if( g_pCurrentBp )
2468 + {
2469 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
2470 +
2471 + if( pDspInfo )
2472 + {
2473 + *pusValue = pDspInfo->usGpioVoipIntr;
2474 +
2475 + if( *pusValue != BP_NOT_DEFINED )
2476 + {
2477 + nRet = BP_SUCCESS;
2478 + }
2479 + else
2480 + {
2481 + nRet = BP_VALUE_NOT_DEFINED;
2482 + }
2483 + }
2484 + else
2485 + {
2486 + *pusValue = BP_NOT_DEFINED;
2487 + nRet = BP_BOARD_ID_NOT_FOUND;
2488 + }
2489 + }
2490 + else
2491 + {
2492 + *pusValue = BP_NOT_DEFINED;
2493 + nRet = BP_BOARD_ID_NOT_SET;
2494 + }
2495 +
2496 + return( nRet );
2497 +} /* BpGetVoipIntrGpio */
2498 +
2499 +/**************************************************************************
2500 + * Name : BpGetPcmciaResetGpio
2501 + *
2502 + * Description: This function returns the GPIO pin assignment for the PCMCIA
2503 + * Reset operation.
2504 + *
2505 + * Parameters : [OUT] pusValue - Address of short word that the PCMCIA reset
2506 + * GPIO pin is returned in.
2507 + *
2508 + * Returns : BP_SUCCESS - Success, value is returned.
2509 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2510 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2511 + * for the board.
2512 + ***************************************************************************/
2513 +int BpGetPcmciaResetGpio( unsigned short *pusValue )
2514 +{
2515 + int nRet;
2516 +
2517 + if( g_pCurrentBp )
2518 + {
2519 + *pusValue = g_pCurrentBp->usGpioPcmciaReset;
2520 +
2521 + if( g_pCurrentBp->usGpioPcmciaReset != BP_NOT_DEFINED )
2522 + {
2523 + nRet = BP_SUCCESS;
2524 + }
2525 + else
2526 + {
2527 + nRet = BP_VALUE_NOT_DEFINED;
2528 + }
2529 + }
2530 + else
2531 + {
2532 + *pusValue = BP_NOT_DEFINED;
2533 + nRet = BP_BOARD_ID_NOT_SET;
2534 + }
2535 +
2536 + return( nRet );
2537 +} /* BpGetPcmciaResetGpio */
2538 +
2539 +/**************************************************************************
2540 + * Name : BpGetUartRtsCtsGpios
2541 + *
2542 + * Description: This function returns the GPIO pin assignments for RTS and CTS
2543 + * UART signals.
2544 + *
2545 + * Parameters : [OUT] pusRts - Address of short word that the UART RTS GPIO
2546 + * pin is returned in.
2547 + * [OUT] pusCts - Address of short word that the UART CTS GPIO
2548 + * pin is returned in.
2549 + *
2550 + * Returns : BP_SUCCESS - Success, values are returned.
2551 + * BP_BOARD_ID_NOT_SET - Error, board id input string does not
2552 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2553 + * for the board.
2554 + ***************************************************************************/
2555 +int BpGetRtsCtsUartGpios( unsigned short *pusRts, unsigned short *pusCts )
2556 +{
2557 + int nRet;
2558 +
2559 + if( g_pCurrentBp )
2560 + {
2561 + *pusRts = g_pCurrentBp->usGpioUartRts;
2562 + *pusCts = g_pCurrentBp->usGpioUartCts;
2563 +
2564 + if( g_pCurrentBp->usGpioUartRts != BP_NOT_DEFINED &&
2565 + g_pCurrentBp->usGpioUartCts != BP_NOT_DEFINED )
2566 + {
2567 + nRet = BP_SUCCESS;
2568 + }
2569 + else
2570 + {
2571 + nRet = BP_VALUE_NOT_DEFINED;
2572 + }
2573 + }
2574 + else
2575 + {
2576 + *pusRts = *pusCts = BP_NOT_DEFINED;
2577 + nRet = BP_BOARD_ID_NOT_SET;
2578 + }
2579 +
2580 + return( nRet );
2581 +} /* BpGetUartRtsCtsGpios */
2582 +
2583 +/**************************************************************************
2584 + * Name : BpGetAdslLedGpio
2585 + *
2586 + * Description: This function returns the GPIO pin assignment for the ADSL
2587 + * LED.
2588 + *
2589 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
2590 + * GPIO pin is returned in.
2591 + *
2592 + * Returns : BP_SUCCESS - Success, value is returned.
2593 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2594 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2595 + * for the board.
2596 + ***************************************************************************/
2597 +int BpGetAdslLedGpio( unsigned short *pusValue )
2598 +{
2599 + int nRet;
2600 +
2601 + if( g_pCurrentBp )
2602 + {
2603 + *pusValue = g_pCurrentBp->usGpioLedAdsl;
2604 +
2605 + if( g_pCurrentBp->usGpioLedAdsl != BP_NOT_DEFINED )
2606 + {
2607 + nRet = BP_SUCCESS;
2608 + }
2609 + else
2610 + {
2611 + nRet = BP_VALUE_NOT_DEFINED;
2612 + }
2613 + }
2614 + else
2615 + {
2616 + *pusValue = BP_NOT_DEFINED;
2617 + nRet = BP_BOARD_ID_NOT_SET;
2618 + }
2619 +
2620 + return( nRet );
2621 +} /* BpGetAdslLedGpio */
2622 +
2623 +/**************************************************************************
2624 + * Name : BpGetAdslFailLedGpio
2625 + *
2626 + * Description: This function returns the GPIO pin assignment for the ADSL
2627 + * LED that is used when there is a DSL connection failure.
2628 + *
2629 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
2630 + * GPIO pin is returned in.
2631 + *
2632 + * Returns : BP_SUCCESS - Success, value is returned.
2633 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2634 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2635 + * for the board.
2636 + ***************************************************************************/
2637 +int BpGetAdslFailLedGpio( unsigned short *pusValue )
2638 +{
2639 + int nRet;
2640 +
2641 + if( g_pCurrentBp )
2642 + {
2643 + *pusValue = g_pCurrentBp->usGpioLedAdslFail;
2644 +
2645 + if( g_pCurrentBp->usGpioLedAdslFail != BP_NOT_DEFINED )
2646 + {
2647 + nRet = BP_SUCCESS;
2648 + }
2649 + else
2650 + {
2651 + nRet = BP_VALUE_NOT_DEFINED;
2652 + }
2653 + }
2654 + else
2655 + {
2656 + *pusValue = BP_NOT_DEFINED;
2657 + nRet = BP_BOARD_ID_NOT_SET;
2658 + }
2659 +
2660 + return( nRet );
2661 +} /* BpGetAdslFailLedGpio */
2662 +
2663 +/**************************************************************************
2664 + * Name : BpGetWirelessLedGpio
2665 + *
2666 + * Description: This function returns the GPIO pin assignment for the Wireless
2667 + * LED.
2668 + *
2669 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
2670 + * GPIO pin is returned in.
2671 + *
2672 + * Returns : BP_SUCCESS - Success, value is returned.
2673 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2674 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2675 + * for the board.
2676 + ***************************************************************************/
2677 +int BpGetWirelessLedGpio( unsigned short *pusValue )
2678 +{
2679 + int nRet;
2680 +
2681 + if( g_pCurrentBp )
2682 + {
2683 + *pusValue = g_pCurrentBp->usGpioLedWireless;
2684 +
2685 + if( g_pCurrentBp->usGpioLedWireless != BP_NOT_DEFINED )
2686 + {
2687 + nRet = BP_SUCCESS;
2688 + }
2689 + else
2690 + {
2691 + nRet = BP_VALUE_NOT_DEFINED;
2692 + }
2693 + }
2694 + else
2695 + {
2696 + *pusValue = BP_NOT_DEFINED;
2697 + nRet = BP_BOARD_ID_NOT_SET;
2698 + }
2699 +
2700 + return( nRet );
2701 +} /* BpGetWirelessLedGpio */
2702 +
2703 +/**************************************************************************
2704 + * Name : BpGetWirelessAntInUse
2705 + *
2706 + * Description: This function returns the antennas in use for wireless
2707 + *
2708 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Antenna
2709 + * is in use.
2710 + *
2711 + * Returns : BP_SUCCESS - Success, value is returned.
2712 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2713 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2714 + * for the board.
2715 + ***************************************************************************/
2716 +int BpGetWirelessAntInUse( unsigned short *pusValue )
2717 +{
2718 + int nRet;
2719 +
2720 + if( g_pCurrentBp )
2721 + {
2722 + *pusValue = g_pCurrentBp->usAntInUseWireless;
2723 +
2724 + if( g_pCurrentBp->usAntInUseWireless != BP_NOT_DEFINED )
2725 + {
2726 + nRet = BP_SUCCESS;
2727 + }
2728 + else
2729 + {
2730 + nRet = BP_VALUE_NOT_DEFINED;
2731 + }
2732 + }
2733 + else
2734 + {
2735 + *pusValue = BP_NOT_DEFINED;
2736 + nRet = BP_BOARD_ID_NOT_SET;
2737 + }
2738 +
2739 + return( nRet );
2740 +} /* BpGetWirelessAntInUse */
2741 +
2742 +/**************************************************************************
2743 + * Name : BpGetWirelessSesBtnGpio
2744 + *
2745 + * Description: This function returns the GPIO pin assignment for the Wireless
2746 + * Ses Button.
2747 + *
2748 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
2749 + * GPIO pin is returned in.
2750 + *
2751 + * Returns : BP_SUCCESS - Success, value is returned.
2752 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2753 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2754 + * for the board.
2755 + ***************************************************************************/
2756 +int BpGetWirelessSesBtnGpio( unsigned short *pusValue )
2757 +{
2758 + int nRet;
2759 +
2760 + if( g_pCurrentBp )
2761 + {
2762 + *pusValue = g_pCurrentBp->usGpioSesBtnWireless;
2763 +
2764 + if( g_pCurrentBp->usGpioSesBtnWireless != BP_NOT_DEFINED )
2765 + {
2766 + nRet = BP_SUCCESS;
2767 + }
2768 + else
2769 + {
2770 + nRet = BP_VALUE_NOT_DEFINED;
2771 + }
2772 + }
2773 + else
2774 + {
2775 + *pusValue = BP_NOT_DEFINED;
2776 + nRet = BP_BOARD_ID_NOT_SET;
2777 + }
2778 +
2779 + return( nRet );
2780 +} /* BpGetWirelessSesBtnGpio */
2781 +
2782 +/**************************************************************************
2783 + * Name : BpGetWirelessSesExtIntr
2784 + *
2785 + * Description: This function returns the external interrupt number for the
2786 + * Wireless Ses Button.
2787 + *
2788 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
2789 + * external interrup is returned in.
2790 + *
2791 + * Returns : BP_SUCCESS - Success, value is returned.
2792 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2793 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2794 + * for the board.
2795 + ***************************************************************************/
2796 +int BpGetWirelessSesExtIntr( unsigned short *pusValue )
2797 +{
2798 + int nRet;
2799 +
2800 + if( g_pCurrentBp )
2801 + {
2802 + *pusValue = g_pCurrentBp->usExtIntrSesBtnWireless;
2803 +
2804 + if( g_pCurrentBp->usExtIntrSesBtnWireless != BP_NOT_DEFINED )
2805 + {
2806 + nRet = BP_SUCCESS;
2807 + }
2808 + else
2809 + {
2810 + nRet = BP_VALUE_NOT_DEFINED;
2811 + }
2812 + }
2813 + else
2814 + {
2815 + *pusValue = BP_NOT_DEFINED;
2816 + nRet = BP_BOARD_ID_NOT_SET;
2817 + }
2818 +
2819 + return( nRet );
2820 +
2821 +} /* BpGetWirelessSesExtIntr */
2822 +
2823 +/**************************************************************************
2824 + * Name : BpGetWirelessSesLedGpio
2825 + *
2826 + * Description: This function returns the GPIO pin assignment for the Wireless
2827 + * Ses Led.
2828 + *
2829 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
2830 + * Led GPIO pin is returned in.
2831 + *
2832 + * Returns : BP_SUCCESS - Success, value is returned.
2833 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2834 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2835 + * for the board.
2836 + ***************************************************************************/
2837 +int BpGetWirelessSesLedGpio( unsigned short *pusValue )
2838 +{
2839 + int nRet;
2840 +
2841 + if( g_pCurrentBp )
2842 + {
2843 + *pusValue = g_pCurrentBp->usGpioLedSesWireless;
2844 +
2845 + if( g_pCurrentBp->usGpioLedSesWireless != BP_NOT_DEFINED )
2846 + {
2847 + nRet = BP_SUCCESS;
2848 + }
2849 + else
2850 + {
2851 + nRet = BP_VALUE_NOT_DEFINED;
2852 + }
2853 + }
2854 + else
2855 + {
2856 + *pusValue = BP_NOT_DEFINED;
2857 + nRet = BP_BOARD_ID_NOT_SET;
2858 + }
2859 +
2860 + return( nRet );
2861 +
2862 +} /* BpGetWirelessSesLedGpio */
2863 +
2864 +/**************************************************************************
2865 + * Name : BpGetUsbLedGpio
2866 + *
2867 + * Description: This function returns the GPIO pin assignment for the USB
2868 + * LED.
2869 + *
2870 + * Parameters : [OUT] pusValue - Address of short word that the USB LED
2871 + * GPIO pin is returned in.
2872 + *
2873 + * Returns : BP_SUCCESS - Success, value is returned.
2874 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2875 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2876 + * for the board.
2877 + ***************************************************************************/
2878 +int BpGetUsbLedGpio( unsigned short *pusValue )
2879 +{
2880 + int nRet;
2881 +
2882 + if( g_pCurrentBp )
2883 + {
2884 + *pusValue = g_pCurrentBp->usGpioLedUsb;
2885 +
2886 + if( g_pCurrentBp->usGpioLedUsb != BP_NOT_DEFINED )
2887 + {
2888 + nRet = BP_SUCCESS;
2889 + }
2890 + else
2891 + {
2892 + nRet = BP_VALUE_NOT_DEFINED;
2893 + }
2894 + }
2895 + else
2896 + {
2897 + *pusValue = BP_NOT_DEFINED;
2898 + nRet = BP_BOARD_ID_NOT_SET;
2899 + }
2900 +
2901 + return( nRet );
2902 +} /* BpGetUsbLedGpio */
2903 +
2904 +/**************************************************************************
2905 + * Name : BpGetHpnaLedGpio
2906 + *
2907 + * Description: This function returns the GPIO pin assignment for the HPNA
2908 + * LED.
2909 + *
2910 + * Parameters : [OUT] pusValue - Address of short word that the HPNA LED
2911 + * GPIO pin is returned in.
2912 + *
2913 + * Returns : BP_SUCCESS - Success, value is returned.
2914 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2915 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2916 + * for the board.
2917 + ***************************************************************************/
2918 +int BpGetHpnaLedGpio( unsigned short *pusValue )
2919 +{
2920 + int nRet;
2921 +
2922 + if( g_pCurrentBp )
2923 + {
2924 + *pusValue = g_pCurrentBp->usGpioLedHpna;
2925 +
2926 + if( g_pCurrentBp->usGpioLedHpna != BP_NOT_DEFINED )
2927 + {
2928 + nRet = BP_SUCCESS;
2929 + }
2930 + else
2931 + {
2932 + nRet = BP_VALUE_NOT_DEFINED;
2933 + }
2934 + }
2935 + else
2936 + {
2937 + *pusValue = BP_NOT_DEFINED;
2938 + nRet = BP_BOARD_ID_NOT_SET;
2939 + }
2940 +
2941 + return( nRet );
2942 +} /* BpGetHpnaLedGpio */
2943 +
2944 +/**************************************************************************
2945 + * Name : BpGetWanDataLedGpio
2946 + *
2947 + * Description: This function returns the GPIO pin assignment for the WAN Data
2948 + * LED.
2949 + *
2950 + * Parameters : [OUT] pusValue - Address of short word that the WAN Data LED
2951 + * GPIO pin is returned in.
2952 + *
2953 + * Returns : BP_SUCCESS - Success, value is returned.
2954 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2955 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2956 + * for the board.
2957 + ***************************************************************************/
2958 +int BpGetWanDataLedGpio( unsigned short *pusValue )
2959 +{
2960 + int nRet;
2961 +
2962 + if( g_pCurrentBp )
2963 + {
2964 + *pusValue = g_pCurrentBp->usGpioLedWanData;
2965 +
2966 + if( g_pCurrentBp->usGpioLedWanData != BP_NOT_DEFINED )
2967 + {
2968 + nRet = BP_SUCCESS;
2969 + }
2970 + else
2971 + {
2972 + nRet = BP_VALUE_NOT_DEFINED;
2973 + }
2974 + }
2975 + else
2976 + {
2977 + *pusValue = BP_NOT_DEFINED;
2978 + nRet = BP_BOARD_ID_NOT_SET;
2979 + }
2980 +
2981 + return( nRet );
2982 +} /* BpGetWanDataLedGpio */
2983 +
2984 +/**************************************************************************
2985 + * Name : BpGetPppLedGpio
2986 + *
2987 + * Description: This function returns the GPIO pin assignment for the PPP
2988 + * LED.
2989 + *
2990 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
2991 + * GPIO pin is returned in.
2992 + *
2993 + * Returns : BP_SUCCESS - Success, value is returned.
2994 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2995 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
2996 + * for the board.
2997 + ***************************************************************************/
2998 +int BpGetPppLedGpio( unsigned short *pusValue )
2999 +{
3000 + int nRet;
3001 +
3002 + if( g_pCurrentBp )
3003 + {
3004 + *pusValue = g_pCurrentBp->usGpioLedPpp;
3005 +
3006 + if( g_pCurrentBp->usGpioLedPpp != BP_NOT_DEFINED )
3007 + {
3008 + nRet = BP_SUCCESS;
3009 + }
3010 + else
3011 + {
3012 + nRet = BP_VALUE_NOT_DEFINED;
3013 + }
3014 + }
3015 + else
3016 + {
3017 + *pusValue = BP_NOT_DEFINED;
3018 + nRet = BP_BOARD_ID_NOT_SET;
3019 + }
3020 +
3021 + return( nRet );
3022 +} /* BpGetPppLedGpio */
3023 +
3024 +/**************************************************************************
3025 + * Name : BpGetPppFailLedGpio
3026 + *
3027 + * Description: This function returns the GPIO pin assignment for the PPP
3028 + * LED that is used when there is a PPP connection failure.
3029 + *
3030 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
3031 + * GPIO pin is returned in.
3032 + *
3033 + * Returns : BP_SUCCESS - Success, value is returned.
3034 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3035 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3036 + * for the board.
3037 + ***************************************************************************/
3038 +int BpGetPppFailLedGpio( unsigned short *pusValue )
3039 +{
3040 + int nRet;
3041 +
3042 + if( g_pCurrentBp )
3043 + {
3044 + *pusValue = g_pCurrentBp->usGpioLedPppFail;
3045 +
3046 + if( g_pCurrentBp->usGpioLedPppFail != BP_NOT_DEFINED )
3047 + {
3048 + nRet = BP_SUCCESS;
3049 + }
3050 + else
3051 + {
3052 + nRet = BP_VALUE_NOT_DEFINED;
3053 + }
3054 + }
3055 + else
3056 + {
3057 + *pusValue = BP_NOT_DEFINED;
3058 + nRet = BP_BOARD_ID_NOT_SET;
3059 + }
3060 +
3061 + return( nRet );
3062 +} /* BpGetPppFailLedGpio */
3063 +
3064 +/**************************************************************************
3065 + * Name : BpGetBootloaderPowerOnLedGpio
3066 + *
3067 + * Description: This function returns the GPIO pin assignment for the power
3068 + * on LED that is set by the bootloader.
3069 + *
3070 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
3071 + * GPIO pin is returned in.
3072 + *
3073 + * Returns : BP_SUCCESS - Success, value is returned.
3074 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3075 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3076 + * for the board.
3077 + ***************************************************************************/
3078 +int BpGetBootloaderPowerOnLedGpio( unsigned short *pusValue )
3079 +{
3080 + int nRet;
3081 +
3082 + if( g_pCurrentBp )
3083 + {
3084 + *pusValue = g_pCurrentBp->usGpioLedBlPowerOn;
3085 +
3086 + if( g_pCurrentBp->usGpioLedBlPowerOn != BP_NOT_DEFINED )
3087 + {
3088 + nRet = BP_SUCCESS;
3089 + }
3090 + else
3091 + {
3092 + nRet = BP_VALUE_NOT_DEFINED;
3093 + }
3094 + }
3095 + else
3096 + {
3097 + *pusValue = BP_NOT_DEFINED;
3098 + nRet = BP_BOARD_ID_NOT_SET;
3099 + }
3100 +
3101 + return( nRet );
3102 +} /* BpGetBootloaderPowerOn */
3103 +
3104 +/**************************************************************************
3105 + * Name : BpGetBootloaderAlarmLedGpio
3106 + *
3107 + * Description: This function returns the GPIO pin assignment for the alarm
3108 + * LED that is set by the bootloader.
3109 + *
3110 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
3111 + * GPIO pin is returned in.
3112 + *
3113 + * Returns : BP_SUCCESS - Success, value is returned.
3114 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3115 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3116 + * for the board.
3117 + ***************************************************************************/
3118 +int BpGetBootloaderAlarmLedGpio( unsigned short *pusValue )
3119 +{
3120 + int nRet;
3121 +
3122 + if( g_pCurrentBp )
3123 + {
3124 + *pusValue = g_pCurrentBp->usGpioLedBlAlarm;
3125 +
3126 + if( g_pCurrentBp->usGpioLedBlAlarm != BP_NOT_DEFINED )
3127 + {
3128 + nRet = BP_SUCCESS;
3129 + }
3130 + else
3131 + {
3132 + nRet = BP_VALUE_NOT_DEFINED;
3133 + }
3134 + }
3135 + else
3136 + {
3137 + *pusValue = BP_NOT_DEFINED;
3138 + nRet = BP_BOARD_ID_NOT_SET;
3139 + }
3140 +
3141 + return( nRet );
3142 +} /* BpGetBootloaderAlarmLedGpio */
3143 +
3144 +/**************************************************************************
3145 + * Name : BpGetBootloaderResetCfgLedGpio
3146 + *
3147 + * Description: This function returns the GPIO pin assignment for the reset
3148 + * configuration LED that is set by the bootloader.
3149 + *
3150 + * Parameters : [OUT] pusValue - Address of short word that the reset
3151 + * configuration LED GPIO pin is returned in.
3152 + *
3153 + * Returns : BP_SUCCESS - Success, value is returned.
3154 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3155 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3156 + * for the board.
3157 + ***************************************************************************/
3158 +int BpGetBootloaderResetCfgLedGpio( unsigned short *pusValue )
3159 +{
3160 + int nRet;
3161 +
3162 + if( g_pCurrentBp )
3163 + {
3164 + *pusValue = g_pCurrentBp->usGpioLedBlResetCfg;
3165 +
3166 + if( g_pCurrentBp->usGpioLedBlResetCfg != BP_NOT_DEFINED )
3167 + {
3168 + nRet = BP_SUCCESS;
3169 + }
3170 + else
3171 + {
3172 + nRet = BP_VALUE_NOT_DEFINED;
3173 + }
3174 + }
3175 + else
3176 + {
3177 + *pusValue = BP_NOT_DEFINED;
3178 + nRet = BP_BOARD_ID_NOT_SET;
3179 + }
3180 +
3181 + return( nRet );
3182 +} /* BpGetBootloaderResetCfgLedGpio */
3183 +
3184 +/**************************************************************************
3185 + * Name : BpGetBootloaderStopLedGpio
3186 + *
3187 + * Description: This function returns the GPIO pin assignment for the break
3188 + * into bootloader LED that is set by the bootloader.
3189 + *
3190 + * Parameters : [OUT] pusValue - Address of short word that the break into
3191 + * bootloader LED GPIO pin is returned in.
3192 + *
3193 + * Returns : BP_SUCCESS - Success, value is returned.
3194 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3195 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3196 + * for the board.
3197 + ***************************************************************************/
3198 +int BpGetBootloaderStopLedGpio( unsigned short *pusValue )
3199 +{
3200 + int nRet;
3201 +
3202 + if( g_pCurrentBp )
3203 + {
3204 + *pusValue = g_pCurrentBp->usGpioLedBlStop;
3205 +
3206 + if( g_pCurrentBp->usGpioLedBlStop != BP_NOT_DEFINED )
3207 + {
3208 + nRet = BP_SUCCESS;
3209 + }
3210 + else
3211 + {
3212 + nRet = BP_VALUE_NOT_DEFINED;
3213 + }
3214 + }
3215 + else
3216 + {
3217 + *pusValue = BP_NOT_DEFINED;
3218 + nRet = BP_BOARD_ID_NOT_SET;
3219 + }
3220 +
3221 + return( nRet );
3222 +} /* BpGetBootloaderStopLedGpio */
3223 +
3224 +/**************************************************************************
3225 + * Name : BpGetVoipLedGpio
3226 + *
3227 + * Description: This function returns the GPIO pin assignment for the VOIP
3228 + * LED.
3229 + *
3230 + * Parameters : [OUT] pusValue - Address of short word that the VOIP LED
3231 + * GPIO pin is returned in.
3232 + *
3233 + * Returns : BP_SUCCESS - Success, value is returned.
3234 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3235 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3236 + * for the board.
3237 + *
3238 + * Note : The VoIP structure would allow for having one LED per DSP
3239 + * however, the board initialization function assumes only one
3240 + * LED per functionality (ie one LED for VoIP). Therefore in
3241 + * order to keep this tidy and simple we do not make usage of the
3242 + * one-LED-per-DSP function. Instead, we assume that the LED for
3243 + * VoIP is unique and associated with DSP 0 (always present on
3244 + * any VoIP platform). If changing this to a LED-per-DSP function
3245 + * then one need to update the board initialization driver in
3246 + * bcmdrivers\opensource\char\board\bcm963xx\impl1
3247 + ***************************************************************************/
3248 +int BpGetVoipLedGpio( unsigned short *pusValue )
3249 +{
3250 + int nRet;
3251 +
3252 + if( g_pCurrentBp )
3253 + {
3254 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( 0 );
3255 +
3256 + if( pDspInfo )
3257 + {
3258 + *pusValue = pDspInfo->usGpioLedVoip;
3259 +
3260 + if( *pusValue != BP_NOT_DEFINED )
3261 + {
3262 + nRet = BP_SUCCESS;
3263 + }
3264 + else
3265 + {
3266 + nRet = BP_VALUE_NOT_DEFINED;
3267 + }
3268 + }
3269 + else
3270 + {
3271 + *pusValue = BP_NOT_DEFINED;
3272 + nRet = BP_BOARD_ID_NOT_FOUND;
3273 + }
3274 + }
3275 + else
3276 + {
3277 + *pusValue = BP_NOT_DEFINED;
3278 + nRet = BP_BOARD_ID_NOT_SET;
3279 + }
3280 +
3281 + return( nRet );
3282 +} /* BpGetVoipLedGpio */
3283 +
3284 +/**************************************************************************
3285 + * Name : BpGetWirelessExtIntr
3286 + *
3287 + * Description: This function returns the Wireless external interrupt number.
3288 + *
3289 + * Parameters : [OUT] pulValue - Address of short word that the wireless
3290 + * external interrupt number is returned in.
3291 + *
3292 + * Returns : BP_SUCCESS - Success, value is returned.
3293 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3294 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3295 + * for the board.
3296 + ***************************************************************************/
3297 +int BpGetWirelessExtIntr( unsigned long *pulValue )
3298 +{
3299 + int nRet;
3300 +
3301 + if( g_pCurrentBp )
3302 + {
3303 + *pulValue = g_pCurrentBp->usExtIntrWireless;
3304 +
3305 + if( g_pCurrentBp->usExtIntrWireless != BP_NOT_DEFINED )
3306 + {
3307 + nRet = BP_SUCCESS;
3308 + }
3309 + else
3310 + {
3311 + nRet = BP_VALUE_NOT_DEFINED;
3312 + }
3313 + }
3314 + else
3315 + {
3316 + *pulValue = BP_NOT_DEFINED;
3317 + nRet = BP_BOARD_ID_NOT_SET;
3318 + }
3319 +
3320 + return( nRet );
3321 +} /* BpGetWirelessExtIntr */
3322 +
3323 +/**************************************************************************
3324 + * Name : BpGetAdslDyingGaspExtIntr
3325 + *
3326 + * Description: This function returns the ADSL Dying Gasp external interrupt
3327 + * number.
3328 + *
3329 + * Parameters : [OUT] pulValue - Address of short word that the ADSL Dying Gasp
3330 + * external interrupt number is returned in.
3331 + *
3332 + * Returns : BP_SUCCESS - Success, value is returned.
3333 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3334 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3335 + * for the board.
3336 + ***************************************************************************/
3337 +int BpGetAdslDyingGaspExtIntr( unsigned long *pulValue )
3338 +{
3339 + int nRet;
3340 +
3341 + if( g_pCurrentBp )
3342 + {
3343 + *pulValue = g_pCurrentBp->usExtIntrAdslDyingGasp;
3344 +
3345 + if( g_pCurrentBp->usExtIntrAdslDyingGasp != BP_NOT_DEFINED )
3346 + {
3347 + nRet = BP_SUCCESS;
3348 + }
3349 + else
3350 + {
3351 + nRet = BP_VALUE_NOT_DEFINED;
3352 + }
3353 + }
3354 + else
3355 + {
3356 + *pulValue = BP_NOT_DEFINED;
3357 + nRet = BP_BOARD_ID_NOT_SET;
3358 + }
3359 +
3360 + return( nRet );
3361 +} /* BpGetAdslDyingGaspExtIntr */
3362 +
3363 +/**************************************************************************
3364 + * Name : BpGetVoipExtIntr
3365 + *
3366 + * Description: This function returns the VOIP external interrupt number.
3367 + *
3368 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
3369 + * external interrupt number is returned in.
3370 + * [IN] dspNum - Address of the DSP to query.
3371 + *
3372 + * Returns : BP_SUCCESS - Success, value is returned.
3373 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3374 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3375 + * for the board.
3376 + ***************************************************************************/
3377 +int BpGetVoipExtIntr( unsigned char dspNum, unsigned long *pulValue )
3378 +{
3379 + int nRet;
3380 +
3381 + if( g_pCurrentBp )
3382 + {
3383 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
3384 +
3385 + if( pDspInfo )
3386 + {
3387 + *pulValue = pDspInfo->usExtIntrVoip;
3388 +
3389 + if( *pulValue != BP_NOT_DEFINED )
3390 + {
3391 + nRet = BP_SUCCESS;
3392 + }
3393 + else
3394 + {
3395 + nRet = BP_VALUE_NOT_DEFINED;
3396 + }
3397 + }
3398 + else
3399 + {
3400 + *pulValue = BP_NOT_DEFINED;
3401 + nRet = BP_BOARD_ID_NOT_FOUND;
3402 + }
3403 + }
3404 + else
3405 + {
3406 + *pulValue = BP_NOT_DEFINED;
3407 + nRet = BP_BOARD_ID_NOT_SET;
3408 + }
3409 +
3410 + return( nRet );
3411 +} /* BpGetVoipExtIntr */
3412 +
3413 +/**************************************************************************
3414 + * Name : BpGetHpnaExtIntr
3415 + *
3416 + * Description: This function returns the HPNA external interrupt number.
3417 + *
3418 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
3419 + * external interrupt number is returned in.
3420 + *
3421 + * Returns : BP_SUCCESS - Success, value is returned.
3422 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3423 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3424 + * for the board.
3425 + ***************************************************************************/
3426 +int BpGetHpnaExtIntr( unsigned long *pulValue )
3427 +{
3428 + int nRet;
3429 +
3430 + if( g_pCurrentBp )
3431 + {
3432 + *pulValue = g_pCurrentBp->usExtIntrHpna;
3433 +
3434 + if( g_pCurrentBp->usExtIntrHpna != BP_NOT_DEFINED )
3435 + {
3436 + nRet = BP_SUCCESS;
3437 + }
3438 + else
3439 + {
3440 + nRet = BP_VALUE_NOT_DEFINED;
3441 + }
3442 + }
3443 + else
3444 + {
3445 + *pulValue = BP_NOT_DEFINED;
3446 + nRet = BP_BOARD_ID_NOT_SET;
3447 + }
3448 +
3449 + return( nRet );
3450 +} /* BpGetHpnaExtIntr */
3451 +
3452 +/**************************************************************************
3453 + * Name : BpGetHpnaChipSelect
3454 + *
3455 + * Description: This function returns the HPNA chip select number.
3456 + *
3457 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
3458 + * chip select number is returned in.
3459 + *
3460 + * Returns : BP_SUCCESS - Success, value is returned.
3461 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3462 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3463 + * for the board.
3464 + ***************************************************************************/
3465 +int BpGetHpnaChipSelect( unsigned long *pulValue )
3466 +{
3467 + int nRet;
3468 +
3469 + if( g_pCurrentBp )
3470 + {
3471 + *pulValue = g_pCurrentBp->usCsHpna;
3472 +
3473 + if( g_pCurrentBp->usCsHpna != BP_NOT_DEFINED )
3474 + {
3475 + nRet = BP_SUCCESS;
3476 + }
3477 + else
3478 + {
3479 + nRet = BP_VALUE_NOT_DEFINED;
3480 + }
3481 + }
3482 + else
3483 + {
3484 + *pulValue = BP_NOT_DEFINED;
3485 + nRet = BP_BOARD_ID_NOT_SET;
3486 + }
3487 +
3488 + return( nRet );
3489 +} /* BpGetHpnaChipSelect */
3490 +
3491 +/**************************************************************************
3492 + * Name : BpGetVoipChipSelect
3493 + *
3494 + * Description: This function returns the VOIP chip select number.
3495 + *
3496 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
3497 + * chip select number is returned in.
3498 + * [IN] dspNum - Address of the DSP to query.
3499 + *
3500 + * Returns : BP_SUCCESS - Success, value is returned.
3501 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3502 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3503 + * for the board.
3504 + ***************************************************************************/
3505 +int BpGetVoipChipSelect( unsigned char dspNum, unsigned long *pulValue )
3506 +{
3507 + int nRet;
3508 +
3509 + if( g_pCurrentBp )
3510 + {
3511 + VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
3512 +
3513 + if( pDspInfo )
3514 + {
3515 + *pulValue = pDspInfo->usCsVoip;
3516 +
3517 + if( *pulValue != BP_NOT_DEFINED )
3518 + {
3519 + nRet = BP_SUCCESS;
3520 + }
3521 + else
3522 + {
3523 + nRet = BP_VALUE_NOT_DEFINED;
3524 + }
3525 + }
3526 + else
3527 + {
3528 + *pulValue = BP_NOT_DEFINED;
3529 + nRet = BP_BOARD_ID_NOT_FOUND;
3530 + }
3531 + }
3532 + else
3533 + {
3534 + *pulValue = BP_NOT_DEFINED;
3535 + nRet = BP_BOARD_ID_NOT_SET;
3536 + }
3537 +
3538 + return( nRet );
3539 +} /* BpGetVoipChipSelect */
3540 +
3541 diff -urN linux.old/arch/mips/bcm963xx/boardparms.h linux.dev/arch/mips/bcm963xx/boardparms.h
3542 --- linux.old/arch/mips/bcm963xx/boardparms.h 1970-01-01 01:00:00.000000000 +0100
3543 +++ linux.dev/arch/mips/bcm963xx/boardparms.h 2006-08-25 00:39:38.000000000 +0200
3544 @@ -0,0 +1,758 @@
3545 +/*
3546 +<:copyright-gpl
3547 +
3548 + Copyright 2003 Broadcom Corp. All Rights Reserved.
3549 +
3550 + This program is free software; you can distribute it and/or modify it
3551 + under the terms of the GNU General Public License (Version 2) as
3552 + published by the Free Software Foundation.
3553 +
3554 + This program is distributed in the hope it will be useful, but WITHOUT
3555 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
3556 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
3557 + for more details.
3558 +
3559 + You should have received a copy of the GNU General Public License along
3560 + with this program; if not, write to the Free Software Foundation, Inc.,
3561 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
3562 +
3563 +:>
3564 +*/
3565 +/**************************************************************************
3566 + * File Name : boardparms.h
3567 + *
3568 + * Description: This file contains definitions and function prototypes for
3569 + * the BCM63xx board parameter access functions.
3570 + *
3571 + * Updates : 07/14/2003 Created.
3572 + ***************************************************************************/
3573 +
3574 +#if !defined(_BOARDPARMS_H)
3575 +#define _BOARDPARMS_H
3576 +
3577 +/* Return codes. */
3578 +#define BP_SUCCESS 0
3579 +#define BP_BOARD_ID_NOT_FOUND 1
3580 +#define BP_VALUE_NOT_DEFINED 2
3581 +#define BP_BOARD_ID_NOT_SET 3
3582 +
3583 +/* Values for BpGetSdramSize. */
3584 +#define BP_MEMORY_8MB_1_CHIP 0
3585 +#define BP_MEMORY_16MB_1_CHIP 1
3586 +#define BP_MEMORY_32MB_1_CHIP 2
3587 +#define BP_MEMORY_64MB_2_CHIP 3
3588 +#define BP_MEMORY_32MB_2_CHIP 4
3589 +#define BP_MEMORY_16MB_2_CHIP 5
3590 +
3591 +/* Values for EthernetMacInfo PhyType. */
3592 +#define BP_ENET_NO_PHY 0
3593 +#define BP_ENET_INTERNAL_PHY 1
3594 +#define BP_ENET_EXTERNAL_PHY 2
3595 +#define BP_ENET_EXTERNAL_SWITCH 3
3596 +
3597 +/* Values for EthernetMacInfo Configuration type. */
3598 +#define BP_ENET_CONFIG_MDIO 0 /* Internal PHY, External PHY, Switch+(no GPIO, no SPI, no MDIO Pseudo phy */
3599 +#define BP_ENET_CONFIG_GPIO 1 /* Bcm96345GW board + Bcm5325M/E */
3600 +#define BP_ENET_CONFIG_MDIO_PSEUDO_PHY 2 /* Bcm96348GW board + Bcm5325E */
3601 +#define BP_ENET_CONFIG_SPI_SSB_0 3 /* Bcm96348GW board + Bcm5325M/E */
3602 +#define BP_ENET_CONFIG_SPI_SSB_1 4 /* Bcm96348GW board + Bcm5325M/E */
3603 +#define BP_ENET_CONFIG_SPI_SSB_2 5 /* Bcm96348GW board + Bcm5325M/E */
3604 +#define BP_ENET_CONFIG_SPI_SSB_3 6 /* Bcm96348GW board + Bcm5325M/E */
3605 +
3606 +/* Values for EthernetMacInfo Reverse MII. */
3607 +#define BP_ENET_NO_REVERSE_MII 0
3608 +#define BP_ENET_REVERSE_MII 1
3609 +
3610 +/* Values for VoIPDSPInfo DSPType. */
3611 +#define BP_VOIP_NO_DSP 0
3612 +#define BP_VOIP_DSP 1
3613 +
3614 +
3615 +/* Values for GPIO pin assignments (AH = Active High, AL = Active Low). */
3616 +#define BP_ACTIVE_MASK 0x8000
3617 +#define BP_ACTIVE_HIGH 0x0000
3618 +#define BP_ACTIVE_LOW 0x8000
3619 +#define BP_GPIO_0_AH (0 | BP_ACTIVE_HIGH)
3620 +#define BP_GPIO_0_AL (0 | BP_ACTIVE_LOW)
3621 +#define BP_GPIO_1_AH (1 | BP_ACTIVE_HIGH)
3622 +#define BP_GPIO_1_AL (1 | BP_ACTIVE_LOW)
3623 +#define BP_GPIO_2_AH (2 | BP_ACTIVE_HIGH)
3624 +#define BP_GPIO_2_AL (2 | BP_ACTIVE_LOW)
3625 +#define BP_GPIO_3_AH (3 | BP_ACTIVE_HIGH)
3626 +#define BP_GPIO_3_AL (3 | BP_ACTIVE_LOW)
3627 +#define BP_GPIO_4_AH (4 | BP_ACTIVE_HIGH)
3628 +#define BP_GPIO_4_AL (4 | BP_ACTIVE_LOW)
3629 +#define BP_GPIO_5_AH (5 | BP_ACTIVE_HIGH)
3630 +#define BP_GPIO_5_AL (5 | BP_ACTIVE_LOW)
3631 +#define BP_GPIO_6_AH (6 | BP_ACTIVE_HIGH)
3632 +#define BP_GPIO_6_AL (6 | BP_ACTIVE_LOW)
3633 +#define BP_GPIO_7_AH (7 | BP_ACTIVE_HIGH)
3634 +#define BP_GPIO_7_AL (7 | BP_ACTIVE_LOW)
3635 +#define BP_GPIO_8_AH (8 | BP_ACTIVE_HIGH)
3636 +#define BP_GPIO_8_AL (8 | BP_ACTIVE_LOW)
3637 +#define BP_GPIO_9_AH (9 | BP_ACTIVE_HIGH)
3638 +#define BP_GPIO_9_AL (9 | BP_ACTIVE_LOW)
3639 +#define BP_GPIO_10_AH (10 | BP_ACTIVE_HIGH)
3640 +#define BP_GPIO_10_AL (10 | BP_ACTIVE_LOW)
3641 +#define BP_GPIO_11_AH (11 | BP_ACTIVE_HIGH)
3642 +#define BP_GPIO_11_AL (11 | BP_ACTIVE_LOW)
3643 +#define BP_GPIO_12_AH (12 | BP_ACTIVE_HIGH)
3644 +#define BP_GPIO_12_AL (12 | BP_ACTIVE_LOW)
3645 +#define BP_GPIO_13_AH (13 | BP_ACTIVE_HIGH)
3646 +#define BP_GPIO_13_AL (13 | BP_ACTIVE_LOW)
3647 +#define BP_GPIO_14_AH (14 | BP_ACTIVE_HIGH)
3648 +#define BP_GPIO_14_AL (14 | BP_ACTIVE_LOW)
3649 +#define BP_GPIO_15_AH (15 | BP_ACTIVE_HIGH)
3650 +#define BP_GPIO_15_AL (15 | BP_ACTIVE_LOW)
3651 +#define BP_GPIO_16_AH (16 | BP_ACTIVE_HIGH)
3652 +#define BP_GPIO_16_AL (16 | BP_ACTIVE_LOW)
3653 +#define BP_GPIO_17_AH (17 | BP_ACTIVE_HIGH)
3654 +#define BP_GPIO_17_AL (17 | BP_ACTIVE_LOW)
3655 +#define BP_GPIO_18_AH (18 | BP_ACTIVE_HIGH)
3656 +#define BP_GPIO_18_AL (18 | BP_ACTIVE_LOW)
3657 +#define BP_GPIO_19_AH (19 | BP_ACTIVE_HIGH)
3658 +#define BP_GPIO_19_AL (19 | BP_ACTIVE_LOW)
3659 +#define BP_GPIO_20_AH (20 | BP_ACTIVE_HIGH)
3660 +#define BP_GPIO_20_AL (20 | BP_ACTIVE_LOW)
3661 +#define BP_GPIO_21_AH (21 | BP_ACTIVE_HIGH)
3662 +#define BP_GPIO_21_AL (21 | BP_ACTIVE_LOW)
3663 +#define BP_GPIO_22_AH (22 | BP_ACTIVE_HIGH)
3664 +#define BP_GPIO_22_AL (22 | BP_ACTIVE_LOW)
3665 +#define BP_GPIO_23_AH (23 | BP_ACTIVE_HIGH)
3666 +#define BP_GPIO_23_AL (23 | BP_ACTIVE_LOW)
3667 +#define BP_GPIO_24_AH (24 | BP_ACTIVE_HIGH)
3668 +#define BP_GPIO_24_AL (24 | BP_ACTIVE_LOW)
3669 +#define BP_GPIO_25_AH (25 | BP_ACTIVE_HIGH)
3670 +#define BP_GPIO_25_AL (25 | BP_ACTIVE_LOW)
3671 +#define BP_GPIO_26_AH (26 | BP_ACTIVE_HIGH)
3672 +#define BP_GPIO_26_AL (26 | BP_ACTIVE_LOW)
3673 +#define BP_GPIO_27_AH (27 | BP_ACTIVE_HIGH)
3674 +#define BP_GPIO_27_AL (27 | BP_ACTIVE_LOW)
3675 +#define BP_GPIO_28_AH (28 | BP_ACTIVE_HIGH)
3676 +#define BP_GPIO_28_AL (28 | BP_ACTIVE_LOW)
3677 +#define BP_GPIO_29_AH (29 | BP_ACTIVE_HIGH)
3678 +#define BP_GPIO_29_AL (29 | BP_ACTIVE_LOW)
3679 +#define BP_GPIO_30_AH (30 | BP_ACTIVE_HIGH)
3680 +#define BP_GPIO_30_AL (30 | BP_ACTIVE_LOW)
3681 +#define BP_GPIO_31_AH (31 | BP_ACTIVE_HIGH)
3682 +#define BP_GPIO_31_AL (31 | BP_ACTIVE_LOW)
3683 +#define BP_GPIO_32_AH (32 | BP_ACTIVE_HIGH)
3684 +#define BP_GPIO_32_AL (32 | BP_ACTIVE_LOW)
3685 +#define BP_GPIO_33_AH (33 | BP_ACTIVE_HIGH)
3686 +#define BP_GPIO_33_AL (33 | BP_ACTIVE_LOW)
3687 +#define BP_GPIO_34_AH (34 | BP_ACTIVE_HIGH)
3688 +#define BP_GPIO_34_AL (34 | BP_ACTIVE_LOW)
3689 +#define BP_GPIO_35_AH (35 | BP_ACTIVE_HIGH)
3690 +#define BP_GPIO_35_AL (35 | BP_ACTIVE_LOW)
3691 +#define BP_GPIO_36_AH (36 | BP_ACTIVE_HIGH)
3692 +#define BP_GPIO_36_AL (36 | BP_ACTIVE_LOW)
3693 +
3694 +/* Values for external interrupt assignments. */
3695 +#define BP_EXT_INTR_0 0
3696 +#define BP_EXT_INTR_1 1
3697 +#define BP_EXT_INTR_2 2
3698 +#define BP_EXT_INTR_3 3
3699 +
3700 +/* Values for chip select assignments. */
3701 +#define BP_CS_0 0
3702 +#define BP_CS_1 1
3703 +#define BP_CS_2 2
3704 +#define BP_CS_3 3
3705 +
3706 +/* Value for GPIO and external interrupt fields that are not used. */
3707 +#define BP_NOT_DEFINED 0xffff
3708 +#define BP_HW_DEFINED 0xfff0
3709 +#define BP_UNEQUIPPED 0xfff1
3710 +
3711 +/* Maximum size of the board id string. */
3712 +#define BP_BOARD_ID_LEN 16
3713 +
3714 +/* Maximum number of Ethernet MACs. */
3715 +#define BP_MAX_ENET_MACS 2
3716 +
3717 +/* Maximum number of VoIP DSPs. */
3718 +#define BP_MAX_VOIP_DSP 2
3719 +
3720 +/* Wireless Antenna Settings. */
3721 +#define BP_WLAN_ANT_MAIN 0
3722 +#define BP_WLAN_ANT_AUX 1
3723 +#define BP_WLAN_ANT_BOTH 3
3724 +
3725 +#if !defined(__ASSEMBLER__)
3726 +
3727 +/* Information about an Ethernet MAC. If ucPhyType is BP_ENET_NO_PHY,
3728 + * then the other fields are not valid.
3729 + */
3730 +typedef struct EthernetMacInfo
3731 +{
3732 + unsigned char ucPhyType; /* BP_ENET_xxx */
3733 + unsigned char ucPhyAddress; /* 0 to 31 */
3734 + unsigned short usGpioPhySpiSck; /* GPIO pin or not defined */
3735 + unsigned short usGpioPhySpiSs; /* GPIO pin or not defined */
3736 + unsigned short usGpioPhySpiMosi; /* GPIO pin or not defined */
3737 + unsigned short usGpioPhySpiMiso; /* GPIO pin or not defined */
3738 + unsigned short usGpioPhyReset; /* GPIO pin or not defined (96348LV) */
3739 + unsigned short numSwitchPorts; /* Number of PHY ports */
3740 + unsigned short usConfigType; /* Configuration type */
3741 + unsigned short usReverseMii; /* Reverse MII */
3742 +} ETHERNET_MAC_INFO, *PETHERNET_MAC_INFO;
3743 +
3744 +
3745 +/* Information about VoIP DSPs. If ucDspType is BP_VOIP_NO_DSP,
3746 + * then the other fields are not valid.
3747 + */
3748 +typedef struct VoIPDspInfo
3749 +{
3750 + unsigned char ucDspType;
3751 + unsigned char ucDspAddress;
3752 + unsigned short usExtIntrVoip;
3753 + unsigned short usGpioVoipReset;
3754 + unsigned short usGpioVoipIntr;
3755 + unsigned short usGpioLedVoip;
3756 + unsigned short usCsVoip;
3757 +
3758 +} VOIP_DSP_INFO;
3759 +
3760 +
3761 +/**************************************************************************
3762 + * Name : BpSetBoardId
3763 + *
3764 + * Description: This function find the BOARD_PARAMETERS structure for the
3765 + * specified board id string and assigns it to a global, static
3766 + * variable.
3767 + *
3768 + * Parameters : [IN] pszBoardId - Board id string that is saved into NVRAM.
3769 + *
3770 + * Returns : BP_SUCCESS - Success, value is returned.
3771 + * BP_BOARD_ID_NOT_FOUND - Error, board id input string does not
3772 + * have a board parameters configuration record.
3773 + ***************************************************************************/
3774 +int BpSetBoardId( char *pszBoardId );
3775 +
3776 +/**************************************************************************
3777 + * Name : BpGetBoardIds
3778 + *
3779 + * Description: This function returns all of the supported board id strings.
3780 + *
3781 + * Parameters : [OUT] pszBoardIds - Address of a buffer that the board id
3782 + * strings are returned in. Each id starts at BP_BOARD_ID_LEN
3783 + * boundary.
3784 + * [IN] nBoardIdsSize - Number of BP_BOARD_ID_LEN elements that
3785 + * were allocated in pszBoardIds.
3786 + *
3787 + * Returns : Number of board id strings returned.
3788 + ***************************************************************************/
3789 +int BpGetBoardIds( char *pszBoardIds, int nBoardIdsSize );
3790 +
3791 +/**************************************************************************
3792 + * Name : BpGetEthernetMacInfo
3793 + *
3794 + * Description: This function returns all of the supported board id strings.
3795 + *
3796 + * Parameters : [OUT] pEnetInfos - Address of an array of ETHERNET_MAC_INFO
3797 + * buffers.
3798 + * [IN] nNumEnetInfos - Number of ETHERNET_MAC_INFO elements that
3799 + * are pointed to by pEnetInfos.
3800 + *
3801 + * Returns : BP_SUCCESS - Success, value is returned.
3802 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3803 + ***************************************************************************/
3804 +int BpGetEthernetMacInfo( PETHERNET_MAC_INFO pEnetInfos, int nNumEnetInfos );
3805 +
3806 +/**************************************************************************
3807 + * Name : BpGetSdramSize
3808 + *
3809 + * Description: This function returns a constant that describees the board's
3810 + * SDRAM type and size.
3811 + *
3812 + * Parameters : [OUT] pulSdramSize - Address of short word that the SDRAM size
3813 + * is returned in.
3814 + *
3815 + * Returns : BP_SUCCESS - Success, value is returned.
3816 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3817 + ***************************************************************************/
3818 +int BpGetSdramSize( unsigned long *pulSdramSize );
3819 +
3820 +/**************************************************************************
3821 + * Name : BpGetPsiSize
3822 + *
3823 + * Description: This function returns the persistent storage size in K bytes.
3824 + *
3825 + * Parameters : [OUT] pulPsiSize - Address of short word that the persistent
3826 + * storage size is returned in.
3827 + *
3828 + * Returns : BP_SUCCESS - Success, value is returned.
3829 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3830 + ***************************************************************************/
3831 +int BpGetPsiSize( unsigned long *pulPsiSize );
3832 +
3833 +/**************************************************************************
3834 + * Name : BpGetRj11InnerOuterPairGpios
3835 + *
3836 + * Description: This function returns the GPIO pin assignments for changing
3837 + * between the RJ11 inner pair and RJ11 outer pair.
3838 + *
3839 + * Parameters : [OUT] pusInner - Address of short word that the RJ11 inner pair
3840 + * GPIO pin is returned in.
3841 + * [OUT] pusOuter - Address of short word that the RJ11 outer pair
3842 + * GPIO pin is returned in.
3843 + *
3844 + * Returns : BP_SUCCESS - Success, values are returned.
3845 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3846 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3847 + * for the board.
3848 + ***************************************************************************/
3849 +int BpGetRj11InnerOuterPairGpios( unsigned short *pusInner,
3850 + unsigned short *pusOuter );
3851 +
3852 +/**************************************************************************
3853 + * Name : BpGetPressAndHoldResetGpio
3854 + *
3855 + * Description: This function returns the GPIO pin assignment for the press
3856 + * and hold reset button.
3857 + *
3858 + * Parameters : [OUT] pusValue - Address of short word that the press and hold
3859 + * reset button GPIO pin is returned in.
3860 + *
3861 + * Returns : BP_SUCCESS - Success, value is returned.
3862 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3863 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3864 + * for the board.
3865 + ***************************************************************************/
3866 +int BpGetPressAndHoldResetGpio( unsigned short *pusValue );
3867 +
3868 +/**************************************************************************
3869 + * Name : BpGetVoipResetGpio
3870 + *
3871 + * Description: This function returns the GPIO pin assignment for the VOIP
3872 + * Reset operation.
3873 + *
3874 + * Parameters : [OUT] pusValue - Address of short word that the VOIP reset
3875 + * GPIO pin is returned in.
3876 + * [IN] dspNum - Address of the DSP to query.
3877 + *
3878 + * Returns : BP_SUCCESS - Success, value is returned.
3879 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3880 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3881 + * for the board.
3882 + ***************************************************************************/
3883 +int BpGetVoipResetGpio( unsigned char dspNum, unsigned short *pusValue );
3884 +
3885 +/**************************************************************************
3886 + * Name : BpGetVoipIntrGpio
3887 + *
3888 + * Description: This function returns the GPIO pin assignment for VoIP interrupt.
3889 + *
3890 + * Parameters : [OUT] pusValue - Address of short word that the VOIP interrupt
3891 + * GPIO pin is returned in.
3892 + * [IN] dspNum - Address of the DSP to query.
3893 + *
3894 + * Returns : BP_SUCCESS - Success, value is returned.
3895 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3896 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3897 + * for the board.
3898 + ***************************************************************************/
3899 +int BpGetVoipIntrGpio( unsigned char dspNum, unsigned short *pusValue );
3900 +
3901 +/**************************************************************************
3902 + * Name : BpGetPcmciaResetGpio
3903 + *
3904 + * Description: This function returns the GPIO pin assignment for the PCMCIA
3905 + * Reset operation.
3906 + *
3907 + * Parameters : [OUT] pusValue - Address of short word that the PCMCIA reset
3908 + * GPIO pin is returned in.
3909 + *
3910 + * Returns : BP_SUCCESS - Success, value is returned.
3911 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3912 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3913 + * for the board.
3914 + ***************************************************************************/
3915 +int BpGetPcmciaResetGpio( unsigned short *pusValue );
3916 +
3917 +/**************************************************************************
3918 + * Name : BpGetUartRtsCtsGpios
3919 + *
3920 + * Description: This function returns the GPIO pin assignments for RTS and CTS
3921 + * UART signals.
3922 + *
3923 + * Parameters : [OUT] pusRts - Address of short word that the UART RTS GPIO
3924 + * pin is returned in.
3925 + * [OUT] pusCts - Address of short word that the UART CTS GPIO
3926 + * pin is returned in.
3927 + *
3928 + * Returns : BP_SUCCESS - Success, values are returned.
3929 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3930 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3931 + * for the board.
3932 + ***************************************************************************/
3933 +int BpGetRtsCtsUartGpios( unsigned short *pusRts, unsigned short *pusCts );
3934 +
3935 +/**************************************************************************
3936 + * Name : BpGetAdslLedGpio
3937 + *
3938 + * Description: This function returns the GPIO pin assignment for the ADSL
3939 + * LED.
3940 + *
3941 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
3942 + * GPIO pin is returned in.
3943 + *
3944 + * Returns : BP_SUCCESS - Success, value is returned.
3945 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3946 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3947 + * for the board.
3948 + ***************************************************************************/
3949 +int BpGetAdslLedGpio( unsigned short *pusValue );
3950 +
3951 +/**************************************************************************
3952 + * Name : BpGetAdslFailLedGpio
3953 + *
3954 + * Description: This function returns the GPIO pin assignment for the ADSL
3955 + * LED that is used when there is a DSL connection failure.
3956 + *
3957 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
3958 + * GPIO pin is returned in.
3959 + *
3960 + * Returns : BP_SUCCESS - Success, value is returned.
3961 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3962 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3963 + * for the board.
3964 + ***************************************************************************/
3965 +int BpGetAdslFailLedGpio( unsigned short *pusValue );
3966 +
3967 +/**************************************************************************
3968 + * Name : BpGetWirelessLedGpio
3969 + *
3970 + * Description: This function returns the GPIO pin assignment for the Wireless
3971 + * LED.
3972 + *
3973 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
3974 + * GPIO pin is returned in.
3975 + *
3976 + * Returns : BP_SUCCESS - Success, value is returned.
3977 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3978 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3979 + * for the board.
3980 + ***************************************************************************/
3981 +int BpGetWirelessLedGpio( unsigned short *pusValue );
3982 +
3983 +/**************************************************************************
3984 + * Name : BpGetWirelessAntInUse
3985 + *
3986 + * Description: This function returns the antennas in use for wireless
3987 + *
3988 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Antenna
3989 + * is in use.
3990 + *
3991 + * Returns : BP_SUCCESS - Success, value is returned.
3992 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3993 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
3994 + * for the board.
3995 + ***************************************************************************/
3996 +int BpGetWirelessAntInUse( unsigned short *pusValue );
3997 +
3998 +/**************************************************************************
3999 + * Name : BpGetWirelessSesBtnGpio
4000 + *
4001 + * Description: This function returns the GPIO pin assignment for the Wireless
4002 + * Ses Button.
4003 + *
4004 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
4005 + * Button GPIO pin is returned in.
4006 + *
4007 + * Returns : BP_SUCCESS - Success, value is returned.
4008 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4009 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4010 + * for the board.
4011 + ***************************************************************************/
4012 +int BpGetWirelessSesBtnGpio( unsigned short *pusValue );
4013 +
4014 +/**************************************************************************
4015 + * Name : BpGetWirelessSesExtIntr
4016 + *
4017 + * Description: This function returns the external interrupt number for the
4018 + * Wireless Ses Button.
4019 + *
4020 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
4021 + * external interrup is returned in.
4022 + *
4023 + * Returns : BP_SUCCESS - Success, value is returned.
4024 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4025 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4026 + * for the board.
4027 + ***************************************************************************/
4028 +int BpGetWirelessSesExtIntr( unsigned short *pusValue );
4029 +
4030 +/**************************************************************************
4031 + * Name : BpGetWirelessSesLedGpio
4032 + *
4033 + * Description: This function returns the GPIO pin assignment for the Wireless
4034 + * Ses Led.
4035 + *
4036 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
4037 + * Led GPIO pin is returned in.
4038 + *
4039 + * Returns : BP_SUCCESS - Success, value is returned.
4040 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4041 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4042 + * for the board.
4043 + ***************************************************************************/
4044 +int BpGetWirelessSesLedGpio( unsigned short *pusValue );
4045 +
4046 +/**************************************************************************
4047 + * Name : BpGetUsbLedGpio
4048 + *
4049 + * Description: This function returns the GPIO pin assignment for the USB
4050 + * LED.
4051 + *
4052 + * Parameters : [OUT] pusValue - Address of short word that the USB LED
4053 + * GPIO pin is returned in.
4054 + *
4055 + * Returns : BP_SUCCESS - Success, value is returned.
4056 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4057 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4058 + * for the board.
4059 + ***************************************************************************/
4060 +int BpGetUsbLedGpio( unsigned short *pusValue );
4061 +
4062 +/**************************************************************************
4063 + * Name : BpGetHpnaLedGpio
4064 + *
4065 + * Description: This function returns the GPIO pin assignment for the HPNA
4066 + * LED.
4067 + *
4068 + * Parameters : [OUT] pusValue - Address of short word that the HPNA LED
4069 + * GPIO pin is returned in.
4070 + *
4071 + * Returns : BP_SUCCESS - Success, value is returned.
4072 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4073 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4074 + * for the board.
4075 + ***************************************************************************/
4076 +int BpGetHpnaLedGpio( unsigned short *pusValue );
4077 +
4078 +/**************************************************************************
4079 + * Name : BpGetWanDataLedGpio
4080 + *
4081 + * Description: This function returns the GPIO pin assignment for the WAN Data
4082 + * LED.
4083 + *
4084 + * Parameters : [OUT] pusValue - Address of short word that the WAN Data LED
4085 + * GPIO pin is returned in.
4086 + *
4087 + * Returns : BP_SUCCESS - Success, value is returned.
4088 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4089 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4090 + * for the board.
4091 + ***************************************************************************/
4092 +int BpGetWanDataLedGpio( unsigned short *pusValue );
4093 +
4094 +/**************************************************************************
4095 + * Name : BpGetPppLedGpio
4096 + *
4097 + * Description: This function returns the GPIO pin assignment for the PPP
4098 + * LED.
4099 + *
4100 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
4101 + * GPIO pin is returned in.
4102 + *
4103 + * Returns : BP_SUCCESS - Success, value is returned.
4104 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4105 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4106 + * for the board.
4107 + ***************************************************************************/
4108 +int BpGetPppLedGpio( unsigned short *pusValue );
4109 +
4110 +/**************************************************************************
4111 + * Name : BpGetPppFailLedGpio
4112 + *
4113 + * Description: This function returns the GPIO pin assignment for the PPP
4114 + * LED that is used when there is a PPP connection failure.
4115 + *
4116 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
4117 + * GPIO pin is returned in.
4118 + *
4119 + * Returns : BP_SUCCESS - Success, value is returned.
4120 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4121 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4122 + * for the board.
4123 + ***************************************************************************/
4124 +int BpGetPppFailLedGpio( unsigned short *pusValue );
4125 +
4126 +/**************************************************************************
4127 + * Name : BpGetVoipLedGpio
4128 + *
4129 + * Description: This function returns the GPIO pin assignment for the VOIP
4130 + * LED.
4131 + *
4132 + * Parameters : [OUT] pusValue - Address of short word that the VOIP LED
4133 + * GPIO pin is returned in.
4134 + *
4135 + * Returns : BP_SUCCESS - Success, value is returned.
4136 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4137 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4138 + * for the board.
4139 + ***************************************************************************/
4140 +int BpGetVoipLedGpio( unsigned short *pusValue );
4141 +
4142 +/**************************************************************************
4143 + * Name : BpGetBootloaderPowerOnLedGpio
4144 + *
4145 + * Description: This function returns the GPIO pin assignment for the power
4146 + * on LED that is set by the bootloader.
4147 + *
4148 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
4149 + * GPIO pin is returned in.
4150 + *
4151 + * Returns : BP_SUCCESS - Success, value is returned.
4152 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4153 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4154 + * for the board.
4155 + ***************************************************************************/
4156 +int BpGetBootloaderPowerOnLedGpio( unsigned short *pusValue );
4157 +
4158 +/**************************************************************************
4159 + * Name : BpGetBootloaderAlarmLedGpio
4160 + *
4161 + * Description: This function returns the GPIO pin assignment for the alarm
4162 + * LED that is set by the bootloader.
4163 + *
4164 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
4165 + * GPIO pin is returned in.
4166 + *
4167 + * Returns : BP_SUCCESS - Success, value is returned.
4168 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4169 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4170 + * for the board.
4171 + ***************************************************************************/
4172 +int BpGetBootloaderAlarmLedGpio( unsigned short *pusValue );
4173 +
4174 +/**************************************************************************
4175 + * Name : BpGetBootloaderResetCfgLedGpio
4176 + *
4177 + * Description: This function returns the GPIO pin assignment for the reset
4178 + * configuration LED that is set by the bootloader.
4179 + *
4180 + * Parameters : [OUT] pusValue - Address of short word that the reset
4181 + * configuration LED GPIO pin is returned in.
4182 + *
4183 + * Returns : BP_SUCCESS - Success, value is returned.
4184 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4185 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4186 + * for the board.
4187 + ***************************************************************************/
4188 +int BpGetBootloaderResetCfgLedGpio( unsigned short *pusValue );
4189 +
4190 +/**************************************************************************
4191 + * Name : BpGetBootloaderStopLedGpio
4192 + *
4193 + * Description: This function returns the GPIO pin assignment for the break
4194 + * into bootloader LED that is set by the bootloader.
4195 + *
4196 + * Parameters : [OUT] pusValue - Address of short word that the break into
4197 + * bootloader LED GPIO pin is returned in.
4198 + *
4199 + * Returns : BP_SUCCESS - Success, value is returned.
4200 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4201 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4202 + * for the board.
4203 + ***************************************************************************/
4204 +int BpGetBootloaderStopLedGpio( unsigned short *pusValue );
4205 +
4206 +/**************************************************************************
4207 + * Name : BpGetWirelessExtIntr
4208 + *
4209 + * Description: This function returns the Wireless external interrupt number.
4210 + *
4211 + * Parameters : [OUT] pulValue - Address of short word that the wireless
4212 + * external interrupt number is returned in.
4213 + *
4214 + * Returns : BP_SUCCESS - Success, value is returned.
4215 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4216 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4217 + * for the board.
4218 + ***************************************************************************/
4219 +int BpGetWirelessExtIntr( unsigned long *pulValue );
4220 +
4221 +/**************************************************************************
4222 + * Name : BpGetAdslDyingGaspExtIntr
4223 + *
4224 + * Description: This function returns the ADSL Dying Gasp external interrupt
4225 + * number.
4226 + *
4227 + * Parameters : [OUT] pulValue - Address of short word that the ADSL Dying Gasp
4228 + * external interrupt number is returned in.
4229 + *
4230 + * Returns : BP_SUCCESS - Success, value is returned.
4231 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4232 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4233 + * for the board.
4234 + ***************************************************************************/
4235 +int BpGetAdslDyingGaspExtIntr( unsigned long *pulValue );
4236 +
4237 +/**************************************************************************
4238 + * Name : BpGetVoipExtIntr
4239 + *
4240 + * Description: This function returns the VOIP external interrupt number.
4241 + *
4242 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
4243 + * external interrupt number is returned in.
4244 + * [IN] dspNum - Address of the DSP to query.
4245 + *
4246 + * Returns : BP_SUCCESS - Success, value is returned.
4247 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4248 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4249 + * for the board.
4250 + ***************************************************************************/
4251 +int BpGetVoipExtIntr( unsigned char dspNum, unsigned long *pulValue );
4252 +
4253 +/**************************************************************************
4254 + * Name : BpGetHpnaExtIntr
4255 + *
4256 + * Description: This function returns the HPNA external interrupt number.
4257 + *
4258 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
4259 + * external interrupt number is returned in.
4260 + *
4261 + * Returns : BP_SUCCESS - Success, value is returned.
4262 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4263 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4264 + * for the board.
4265 + ***************************************************************************/
4266 +int BpGetHpnaExtIntr( unsigned long *pulValue );
4267 +
4268 +/**************************************************************************
4269 + * Name : BpGetHpnaChipSelect
4270 + *
4271 + * Description: This function returns the HPNA chip select number.
4272 + *
4273 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
4274 + * chip select number is returned in.
4275 + *
4276 + * Returns : BP_SUCCESS - Success, value is returned.
4277 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4278 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4279 + * for the board.
4280 + ***************************************************************************/
4281 +int BpGetHpnaChipSelect( unsigned long *pulValue );
4282 +
4283 +/**************************************************************************
4284 + * Name : BpGetVoipChipSelect
4285 + *
4286 + * Description: This function returns the VOIP chip select number.
4287 + *
4288 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
4289 + * chip select number is returned in.
4290 + * [IN] dspNum - Address of the DSP to query.
4291 + *
4292 + * Returns : BP_SUCCESS - Success, value is returned.
4293 + * BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4294 + * BP_VALUE_NOT_DEFINED - At least one return value is not defined
4295 + * for the board.
4296 + ***************************************************************************/
4297 +int BpGetVoipChipSelect( unsigned char dspNum, unsigned long *pulValue );
4298 +
4299 +#endif /* __ASSEMBLER__ */
4300 +
4301 +#endif /* _BOARDPARMS_H */
4302 +
4303 diff -urN linux.old/arch/mips/bcm963xx/include/6338_intr.h linux.dev/arch/mips/bcm963xx/include/6338_intr.h
4304 --- linux.old/arch/mips/bcm963xx/include/6338_intr.h 1970-01-01 01:00:00.000000000 +0100
4305 +++ linux.dev/arch/mips/bcm963xx/include/6338_intr.h 2006-08-25 00:39:38.000000000 +0200
4306 @@ -0,0 +1,64 @@
4307 +/*
4308 +<:copyright-gpl
4309 + Copyright 2003 Broadcom Corp. All Rights Reserved.
4310 +
4311 + This program is free software; you can distribute it and/or modify it
4312 + under the terms of the GNU General Public License (Version 2) as
4313 + published by the Free Software Foundation.
4314 +
4315 + This program is distributed in the hope it will be useful, but WITHOUT
4316 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4317 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
4318 + for more details.
4319 +
4320 + You should have received a copy of the GNU General Public License along
4321 + with this program; if not, write to the Free Software Foundation, Inc.,
4322 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4323 +:>
4324 +*/
4325 +
4326 +#ifndef __6338_INTR_H
4327 +#define __6338_INTR_H
4328 +
4329 +/*=====================================================================*/
4330 +/* BCM6338 External Interrupt Level Assignments */
4331 +/*=====================================================================*/
4332 +#define INTERRUPT_ID_EXTERNAL_0 3
4333 +#define INTERRUPT_ID_EXTERNAL_1 4
4334 +#define INTERRUPT_ID_EXTERNAL_2 5
4335 +#define INTERRUPT_ID_EXTERNAL_3 6
4336 +
4337 +/*=====================================================================*/
4338 +/* BCM6338 Timer Interrupt Level Assignments */
4339 +/*=====================================================================*/
4340 +#define MIPS_TIMER_INT 7
4341 +
4342 +/*=====================================================================*/
4343 +/* Peripheral ISR Table Offset */
4344 +/*=====================================================================*/
4345 +#define INTERNAL_ISR_TABLE_OFFSET 8
4346 +
4347 +/*=====================================================================*/
4348 +/* Logical Peripheral Interrupt IDs */
4349 +/*=====================================================================*/
4350 +
4351 +#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
4352 +#define INTERRUPT_ID_SPI (INTERNAL_ISR_TABLE_OFFSET + 1)
4353 +#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
4354 +#define INTERRUPT_ID_DG (INTERNAL_ISR_TABLE_OFFSET + 4)
4355 +#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 5)
4356 +#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 6)
4357 +#define INTERRUPT_ID_USBS (INTERNAL_ISR_TABLE_OFFSET + 7)
4358 +#define INTERRUPT_ID_EMAC1 (INTERNAL_ISR_TABLE_OFFSET + 8)
4359 +#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 9)
4360 +#define INTERRUPT_ID_SDRAM (INTERNAL_ISR_TABLE_OFFSET + 10)
4361 +#define INTERRUPT_ID_USB_CNTL_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 11)
4362 +#define INTERRUPT_ID_USB_CNTL_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 12)
4363 +#define INTERRUPT_ID_USB_BULK_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 13)
4364 +#define INTERRUPT_ID_USB_BULK_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 14)
4365 +#define INTERRUPT_ID_EMAC1_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 15)
4366 +#define INTERRUPT_ID_EMAC1_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 16)
4367 +#define INTERRUPT_ID_SDIO (INTERNAL_ISR_TABLE_OFFSET + 17)
4368 +
4369 +#endif /* __BCM6338_H */
4370 +
4371 diff -urN linux.old/arch/mips/bcm963xx/include/6338_map_part.h linux.dev/arch/mips/bcm963xx/include/6338_map_part.h
4372 --- linux.old/arch/mips/bcm963xx/include/6338_map_part.h 1970-01-01 01:00:00.000000000 +0100
4373 +++ linux.dev/arch/mips/bcm963xx/include/6338_map_part.h 2006-08-25 00:39:38.000000000 +0200
4374 @@ -0,0 +1,334 @@
4375 +/*
4376 +<:copyright-gpl
4377 + Copyright 2004 Broadcom Corp. All Rights Reserved.
4378 +
4379 + This program is free software; you can distribute it and/or modify it
4380 + under the terms of the GNU General Public License (Version 2) as
4381 + published by the Free Software Foundation.
4382 +
4383 + This program is distributed in the hope it will be useful, but WITHOUT
4384 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4385 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
4386 + for more details.
4387 +
4388 + You should have received a copy of the GNU General Public License along
4389 + with this program; if not, write to the Free Software Foundation, Inc.,
4390 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4391 +:>
4392 +*/
4393 +
4394 +#ifndef __BCM6338_MAP_H
4395 +#define __BCM6338_MAP_H
4396 +
4397 +#include "bcmtypes.h"
4398 +
4399 +#define PERF_BASE 0xfffe0000
4400 +#define TIMR_BASE 0xfffe0200
4401 +#define UART_BASE 0xfffe0300
4402 +#define GPIO_BASE 0xfffe0400
4403 +#define SPI_BASE 0xfffe0c00
4404 +
4405 +typedef struct PerfControl {
4406 + uint32 RevID;
4407 + uint16 testControl;
4408 + uint16 blkEnables;
4409 +#define EMAC_CLK_EN 0x0010
4410 +#define USBS_CLK_EN 0x0010
4411 +#define SAR_CLK_EN 0x0020
4412 +
4413 +#define SPI_CLK_EN 0x0200
4414 +
4415 + uint32 pll_control;
4416 +#define SOFT_RESET 0x00000001
4417 +
4418 + uint32 IrqMask;
4419 + uint32 IrqStatus;
4420 +
4421 + uint32 ExtIrqCfg;
4422 +#define EI_SENSE_SHFT 0
4423 +#define EI_STATUS_SHFT 5
4424 +#define EI_CLEAR_SHFT 10
4425 +#define EI_MASK_SHFT 15
4426 +#define EI_INSENS_SHFT 20
4427 +#define EI_LEVEL_SHFT 25
4428 +
4429 + uint32 unused[4]; /* (18) */
4430 + uint32 BlockSoftReset; /* (28) */
4431 +#define BSR_SPI 0x00000001
4432 +#define BSR_EMAC 0x00000004
4433 +#define BSR_USBH 0x00000008
4434 +#define BSR_USBS 0x00000010
4435 +#define BSR_ADSL 0x00000020
4436 +#define BSR_DMAMEM 0x00000040
4437 +#define BSR_SAR 0x00000080
4438 +#define BSR_ACLC 0x00000100
4439 +#define BSR_ADSL_MIPS_PLL 0x00000400
4440 +#define BSR_ALL_BLOCKS \
4441 + (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
4442 + BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
4443 +} PerfControl;
4444 +
4445 +#define PERF ((volatile PerfControl * const) PERF_BASE)
4446 +
4447 +
4448 +typedef struct Timer {
4449 + uint16 unused0;
4450 + byte TimerMask;
4451 +#define TIMER0EN 0x01
4452 +#define TIMER1EN 0x02
4453 +#define TIMER2EN 0x04
4454 + byte TimerInts;
4455 +#define TIMER0 0x01
4456 +#define TIMER1 0x02
4457 +#define TIMER2 0x04
4458 +#define WATCHDOG 0x08
4459 + uint32 TimerCtl0;
4460 + uint32 TimerCtl1;
4461 + uint32 TimerCtl2;
4462 +#define TIMERENABLE 0x80000000
4463 +#define RSTCNTCLR 0x40000000
4464 + uint32 TimerCnt0;
4465 + uint32 TimerCnt1;
4466 + uint32 TimerCnt2;
4467 + uint32 WatchDogDefCount;
4468 +
4469 + /* Write 0xff00 0x00ff to Start timer
4470 + * Write 0xee00 0x00ee to Stop and re-load default count
4471 + * Read from this register returns current watch dog count
4472 + */
4473 + uint32 WatchDogCtl;
4474 +
4475 + /* Number of 40-MHz ticks for WD Reset pulse to last */
4476 + uint32 WDResetCount;
4477 +} Timer;
4478 +
4479 +#define TIMER ((volatile Timer * const) TIMR_BASE)
4480 +typedef struct UartChannel {
4481 + byte unused0;
4482 + byte control;
4483 +#define BRGEN 0x80 /* Control register bit defs */
4484 +#define TXEN 0x40
4485 +#define RXEN 0x20
4486 +#define LOOPBK 0x10
4487 +#define TXPARITYEN 0x08
4488 +#define TXPARITYEVEN 0x04
4489 +#define RXPARITYEN 0x02
4490 +#define RXPARITYEVEN 0x01
4491 +
4492 + byte config;
4493 +#define XMITBREAK 0x40
4494 +#define BITS5SYM 0x00
4495 +#define BITS6SYM 0x10
4496 +#define BITS7SYM 0x20
4497 +#define BITS8SYM 0x30
4498 +#define ONESTOP 0x07
4499 +#define TWOSTOP 0x0f
4500 + /* 4-LSBS represent STOP bits/char
4501 + * in 1/8 bit-time intervals. Zero
4502 + * represents 1/8 stop bit interval.
4503 + * Fifteen represents 2 stop bits.
4504 + */
4505 + byte fifoctl;
4506 +#define RSTTXFIFOS 0x80
4507 +#define RSTRXFIFOS 0x40
4508 + /* 5-bit TimeoutCnt is in low bits of this register.
4509 + * This count represents the number of characters
4510 + * idle times before setting receive Irq when below threshold
4511 + */
4512 + uint32 baudword;
4513 + /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
4514 + */
4515 +
4516 + byte txf_levl; /* Read-only fifo depth */
4517 + byte rxf_levl; /* Read-only fifo depth */
4518 + byte fifocfg; /* Upper 4-bits are TxThresh, Lower are
4519 + * RxThreshold. Irq can be asserted
4520 + * when rx fifo> thresh, txfifo<thresh
4521 + */
4522 + byte prog_out; /* Set value of DTR (Bit0), RTS (Bit1)
4523 + * if these bits are also enabled to GPIO_o
4524 + */
4525 +#define DTREN 0x01
4526 +#define RTSEN 0x02
4527 +
4528 + byte unused1;
4529 + byte DeltaIPEdgeNoSense; /* Low 4-bits, set corr bit to 1 to
4530 + * detect irq on rising AND falling
4531 + * edges for corresponding GPIO_i
4532 + * if enabled (edge insensitive)
4533 + */
4534 + byte DeltaIPConfig_Mask; /* Upper 4 bits: 1 for posedge sense
4535 + * 0 for negedge sense if
4536 + * not configured for edge
4537 + * insensitive (see above)
4538 + * Lower 4 bits: Mask to enable change
4539 + * detection IRQ for corresponding
4540 + * GPIO_i
4541 + */
4542 + byte DeltaIP_SyncIP; /* Upper 4 bits show which bits
4543 + * have changed (may set IRQ).
4544 + * read automatically clears bit
4545 + * Lower 4 bits are actual status
4546 + */
4547 +
4548 + uint16 intMask; /* Same Bit defs for Mask and status */
4549 + uint16 intStatus;
4550 +#define DELTAIP 0x0001
4551 +#define TXUNDERR 0x0002
4552 +#define TXOVFERR 0x0004
4553 +#define TXFIFOTHOLD 0x0008
4554 +#define TXREADLATCH 0x0010
4555 +#define TXFIFOEMT 0x0020
4556 +#define RXUNDERR 0x0040
4557 +#define RXOVFERR 0x0080
4558 +#define RXTIMEOUT 0x0100
4559 +#define RXFIFOFULL 0x0200
4560 +#define RXFIFOTHOLD 0x0400
4561 +#define RXFIFONE 0x0800
4562 +#define RXFRAMERR 0x1000
4563 +#define RXPARERR 0x2000
4564 +#define RXBRK 0x4000
4565 +
4566 + uint16 unused2;
4567 + uint16 Data; /* Write to TX, Read from RX */
4568 + /* bits 11:8 are BRK,PAR,FRM errors */
4569 +
4570 + uint32 unused3;
4571 + uint32 unused4;
4572 +} Uart;
4573 +
4574 +#define UART ((volatile Uart * const) UART_BASE)
4575 +
4576 +typedef struct GpioControl {
4577 + uint32 unused0;
4578 + uint32 GPIODir; /* bits 7:0 */
4579 + uint32 unused1;
4580 + uint32 GPIOio; /* bits 7:0 */
4581 + uint32 LEDCtrl;
4582 +#define LED3_STROBE 0x08000000
4583 +#define LED2_STROBE 0x04000000
4584 +#define LED1_STROBE 0x02000000
4585 +#define LED0_STROBE 0x01000000
4586 +#define LED_TEST 0x00010000
4587 +#define LED3_DISABLE_LINK_ACT 0x00008000
4588 +#define LED2_DISABLE_LINK_ACT 0x00004000
4589 +#define LED1_DISABLE_LINK_ACT 0x00002000
4590 +#define LED0_DISABLE_LINK_ACT 0x00001000
4591 +#define LED_INTERVAL_SET_MASK 0x00000f00
4592 +#define LED_INTERVAL_SET_320MS 0x00000500
4593 +#define LED_INTERVAL_SET_160MS 0x00000400
4594 +#define LED_INTERVAL_SET_80MS 0x00000300
4595 +#define LED_INTERVAL_SET_40MS 0x00000200
4596 +#define LED_INTERVAL_SET_20MS 0x00000100
4597 +#define LED3_ON 0x00000080
4598 +#define LED2_ON 0x00000040
4599 +#define LED1_ON 0x00000020
4600 +#define LED0_ON 0x00000010
4601 +#define LED3_ENABLE 0x00000008
4602 +#define LED2_ENABLE 0x00000004
4603 +#define LED1_ENABLE 0x00000002
4604 +#define LED0_ENABLE 0x00000001
4605 + uint32 SpiSlaveCfg;
4606 +#define SPI_SLAVE_RESET 0x00010000
4607 +#define SPI_RESTRICT 0x00000400
4608 +#define SPI_DELAY_DISABLE 0x00000200
4609 +#define SPI_PROBE_MUX_SEL_MASK 0x000001e0
4610 +#define SPI_SER_ADDR_CFG_MASK 0x0000000c
4611 +#define SPI_MODE 0x00000001
4612 + uint32 vRegConfig;
4613 +} GpioControl;
4614 +
4615 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
4616 +
4617 +/* Number to mask conversion macro used for GPIODir and GPIOio */
4618 +#define GPIO_NUM_MAX_BITS_MASK 0x0f
4619 +#define GPIO_NUM_TO_MASK(X) (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
4620 +
4621 +/*
4622 +** Spi Controller
4623 +*/
4624 +
4625 +typedef struct SpiControl {
4626 + uint16 spiCmd; /* (0x0): SPI command */
4627 +#define SPI_CMD_START_IMMEDIATE 3
4628 +
4629 +#define SPI_CMD_COMMAND_SHIFT 0
4630 +#define SPI_CMD_DEVICE_ID_SHIFT 4
4631 +#define SPI_CMD_PREPEND_BYTE_CNT_SHIFT 8
4632 +
4633 + byte spiIntStatus; /* (0x2): SPI interrupt status */
4634 + byte spiMaskIntStatus; /* (0x3): SPI masked interrupt status */
4635 +
4636 + byte spiIntMask; /* (0x4): SPI interrupt mask */
4637 +#define SPI_INTR_CMD_DONE 0x01
4638 +#define SPI_INTR_CLEAR_ALL 0x1f
4639 +
4640 + byte spiStatus; /* (0x5): SPI status */
4641 +
4642 + byte spiClkCfg; /* (0x6): SPI clock configuration */
4643 +
4644 + byte spiFillByte; /* (0x7): SPI fill byte */
4645 +
4646 + byte unused0;
4647 + byte spiMsgTail; /* (0x9): msgtail */
4648 + byte unused1;
4649 + byte spiRxTail; /* (0xB): rxtail */
4650 +
4651 + uint32 unused2[13]; /* (0x0c - 0x3c) reserved */
4652 +
4653 + byte spiMsgCtl; /* (0x40) control byte */
4654 +#define HALF_DUPLEX_W 1
4655 +#define HALF_DUPLEX_R 2
4656 +#define SPI_MSG_TYPE_SHIFT 6
4657 +#define SPI_BYTE_CNT_SHIFT 0
4658 + byte spiMsgData[63]; /* (0x41 - 0x7f) msg data */
4659 + byte spiRxDataFifo[64]; /* (0x80 - 0xbf) rx data */
4660 + byte unused3[64]; /* (0xc0 - 0xff) reserved */
4661 +} SpiControl;
4662 +
4663 +#define SPI ((volatile SpiControl * const) SPI_BASE)
4664 +
4665 +/*
4666 +** External Bus Interface
4667 +*/
4668 +typedef struct EbiChipSelect {
4669 + uint32 base; /* base address in upper 24 bits */
4670 +#define EBI_SIZE_8K 0
4671 +#define EBI_SIZE_16K 1
4672 +#define EBI_SIZE_32K 2
4673 +#define EBI_SIZE_64K 3
4674 +#define EBI_SIZE_128K 4
4675 +#define EBI_SIZE_256K 5
4676 +#define EBI_SIZE_512K 6
4677 +#define EBI_SIZE_1M 7
4678 +#define EBI_SIZE_2M 8
4679 +#define EBI_SIZE_4M 9
4680 +#define EBI_SIZE_8M 10
4681 +#define EBI_SIZE_16M 11
4682 +#define EBI_SIZE_32M 12
4683 +#define EBI_SIZE_64M 13
4684 +#define EBI_SIZE_128M 14
4685 +#define EBI_SIZE_256M 15
4686 + uint32 config;
4687 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
4688 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
4689 +#define EBI_WTST_SHIFT 1 /* .. for shifting wait states */
4690 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
4691 +#define EBI_WREN 0x00000020 /* enable posted writes */
4692 +#define EBI_POLARITY 0x00000040 /* .. set to invert something,
4693 + ** don't know what yet */
4694 +#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
4695 +#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
4696 +#define EBI_FIFO 0x00000200 /* .. use fifo */
4697 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
4698 +} EbiChipSelect;
4699 +
4700 +typedef struct MpiRegisters {
4701 + EbiChipSelect cs[1]; /* size chip select configuration */
4702 +} MpiRegisters;
4703 +
4704 +#define MPI ((volatile MpiRegisters * const) MPI_BASE)
4705 +
4706 +
4707 +#endif
4708 +
4709 diff -urN linux.old/arch/mips/bcm963xx/include/6345_intr.h linux.dev/arch/mips/bcm963xx/include/6345_intr.h
4710 --- linux.old/arch/mips/bcm963xx/include/6345_intr.h 1970-01-01 01:00:00.000000000 +0100
4711 +++ linux.dev/arch/mips/bcm963xx/include/6345_intr.h 2006-08-25 00:39:38.000000000 +0200
4712 @@ -0,0 +1,72 @@
4713 +/*
4714 +<:copyright-gpl
4715 + Copyright 2002 Broadcom Corp. All Rights Reserved.
4716 +
4717 + This program is free software; you can distribute it and/or modify it
4718 + under the terms of the GNU General Public License (Version 2) as
4719 + published by the Free Software Foundation.
4720 +
4721 + This program is distributed in the hope it will be useful, but WITHOUT
4722 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4723 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
4724 + for more details.
4725 +
4726 + You should have received a copy of the GNU General Public License along
4727 + with this program; if not, write to the Free Software Foundation, Inc.,
4728 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4729 +:>
4730 +*/
4731 +
4732 +#ifndef __6345_INTR_H
4733 +#define __6345_INTR_H
4734 +
4735 +
4736 +/*=====================================================================*/
4737 +/* BCM6345 External Interrupt Level Assignments */
4738 +/*=====================================================================*/
4739 +#define INTERRUPT_ID_EXTERNAL_0 3
4740 +#define INTERRUPT_ID_EXTERNAL_1 4
4741 +#define INTERRUPT_ID_EXTERNAL_2 5
4742 +#define INTERRUPT_ID_EXTERNAL_3 6
4743 +
4744 +/*=====================================================================*/
4745 +/* BCM6345 Timer Interrupt Level Assignments */
4746 +/*=====================================================================*/
4747 +#define MIPS_TIMER_INT 7
4748 +
4749 +/*=====================================================================*/
4750 +/* Peripheral ISR Table Offset */
4751 +/*=====================================================================*/
4752 +#define INTERNAL_ISR_TABLE_OFFSET 8
4753 +#define DMA_ISR_TABLE_OFFSET (INTERNAL_ISR_TABLE_OFFSET + 13)
4754 +
4755 +/*=====================================================================*/
4756 +/* Logical Peripheral Interrupt IDs */
4757 +/*=====================================================================*/
4758 +
4759 +/* Internal peripheral interrupt IDs */
4760 +#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
4761 +#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
4762 +#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 3)
4763 +#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 4)
4764 +#define INTERRUPT_ID_USB (INTERNAL_ISR_TABLE_OFFSET + 5)
4765 +#define INTERRUPT_ID_EMAC (INTERNAL_ISR_TABLE_OFFSET + 8)
4766 +#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 12)
4767 +
4768 +/* DMA channel interrupt IDs */
4769 +#define INTERRUPT_ID_EMAC_RX_CHAN (DMA_ISR_TABLE_OFFSET + EMAC_RX_CHAN)
4770 +#define INTERRUPT_ID_EMAC_TX_CHAN (DMA_ISR_TABLE_OFFSET + EMAC_TX_CHAN)
4771 +#define INTERRUPT_ID_EBI_RX_CHAN (DMA_ISR_TABLE_OFFSET + EBI_RX_CHAN)
4772 +#define INTERRUPT_ID_EBI_TX_CHAN (DMA_ISR_TABLE_OFFSET + EBI_TX_CHAN)
4773 +#define INTERRUPT_ID_RESERVED_RX_CHAN (DMA_ISR_TABLE_OFFSET + RESERVED_RX_CHAN)
4774 +#define INTERRUPT_ID_RESERVED_TX_CHAN (DMA_ISR_TABLE_OFFSET + RESERVED_TX_CHAN)
4775 +#define INTERRUPT_ID_USB_BULK_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_BULK_RX_CHAN)
4776 +#define INTERRUPT_ID_USB_BULK_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_BULK_TX_CHAN)
4777 +#define INTERRUPT_ID_USB_CNTL_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_CNTL_RX_CHAN)
4778 +#define INTERRUPT_ID_USB_CNTL_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_CNTL_TX_CHAN)
4779 +#define INTERRUPT_ID_USB_ISO_RX_CHAN (DMA_ISR_TABLE_OFFSET + USB_ISO_RX_CHAN)
4780 +#define INTERRUPT_ID_USB_ISO_TX_CHAN (DMA_ISR_TABLE_OFFSET + USB_ISO_TX_CHAN)
4781 +
4782 +
4783 +#endif /* __BCM6345_H */
4784 +
4785 diff -urN linux.old/arch/mips/bcm963xx/include/6345_map_part.h linux.dev/arch/mips/bcm963xx/include/6345_map_part.h
4786 --- linux.old/arch/mips/bcm963xx/include/6345_map_part.h 1970-01-01 01:00:00.000000000 +0100
4787 +++ linux.dev/arch/mips/bcm963xx/include/6345_map_part.h 2006-08-25 00:39:38.000000000 +0200
4788 @@ -0,0 +1,163 @@
4789 +/*
4790 +<:copyright-gpl
4791 + Copyright 2002 Broadcom Corp. All Rights Reserved.
4792 +
4793 + This program is free software; you can distribute it and/or modify it
4794 + under the terms of the GNU General Public License (Version 2) as
4795 + published by the Free Software Foundation.
4796 +
4797 + This program is distributed in the hope it will be useful, but WITHOUT
4798 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4799 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
4800 + for more details.
4801 +
4802 + You should have received a copy of the GNU General Public License along
4803 + with this program; if not, write to the Free Software Foundation, Inc.,
4804 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4805 +:>
4806 +*/
4807 +
4808 +#ifndef __BCM6345_MAP_H
4809 +#define __BCM6345_MAP_H
4810 +
4811 +
4812 +#include "bcmtypes.h"
4813 +#include "6345_intr.h"
4814 +
4815 +typedef struct IntControl {
4816 + uint32 RevID;
4817 + uint16 testControl;
4818 + uint16 blkEnables;
4819 +#define USB_CLK_EN 0x0100
4820 +#define EMAC_CLK_EN 0x0080
4821 +#define UART_CLK_EN 0x0008
4822 +#define CPU_CLK_EN 0x0001
4823 +
4824 + uint32 pll_control;
4825 +#define SOFT_RESET 0x00000001
4826 +
4827 + uint32 IrqMask;
4828 + uint32 IrqStatus;
4829 +
4830 + uint32 ExtIrqCfg;
4831 +#define EI_SENSE_SHFT 0
4832 +#define EI_STATUS_SHFT 4
4833 +#define EI_CLEAR_SHFT 8
4834 +#define EI_MASK_SHFT 12
4835 +#define EI_INSENS_SHFT 16
4836 +#define EI_LEVEL_SHFT 20
4837 +} IntControl;
4838 +
4839 +#define INTC_BASE 0xfffe0000
4840 +#define PERF ((volatile IntControl * const) INTC_BASE)
4841 +
4842 +#define TIMR_BASE 0xfffe0200
4843 +typedef struct Timer {
4844 + uint16 unused0;
4845 + byte TimerMask;
4846 +#define TIMER0EN 0x01
4847 +#define TIMER1EN 0x02
4848 +#define TIMER2EN 0x04
4849 + byte TimerInts;
4850 +#define TIMER0 0x01
4851 +#define TIMER1 0x02
4852 +#define TIMER2 0x04
4853 +#define WATCHDOG 0x08
4854 + uint32 TimerCtl0;
4855 + uint32 TimerCtl1;
4856 + uint32 TimerCtl2;
4857 +#define TIMERENABLE 0x80000000
4858 +#define RSTCNTCLR 0x40000000
4859 + uint32 TimerCnt0;
4860 + uint32 TimerCnt1;
4861 + uint32 TimerCnt2;
4862 + uint32 WatchDogDefCount;
4863 +
4864 + /* Write 0xff00 0x00ff to Start timer
4865 + * Write 0xee00 0x00ee to Stop and re-load default count
4866 + * Read from this register returns current watch dog count
4867 + */
4868 + uint32 WatchDogCtl;
4869 +
4870 + /* Number of 40-MHz ticks for WD Reset pulse to last */
4871 + uint32 WDResetCount;
4872 +} Timer;
4873 +
4874 +#define TIMER ((volatile Timer * const) TIMR_BASE)
4875 +
4876 +typedef struct UartChannel {
4877 + byte unused0;
4878 + byte control;
4879 +#define BRGEN 0x80 /* Control register bit defs */
4880 +#define TXEN 0x40
4881 +#define RXEN 0x20
4882 +#define TXPARITYEN 0x08
4883 +#define TXPARITYEVEN 0x04
4884 +#define RXPARITYEN 0x02
4885 +#define RXPARITYEVEN 0x01
4886 + byte config;
4887 +#define BITS5SYM 0x00
4888 +#define BITS6SYM 0x10
4889 +#define BITS7SYM 0x20
4890 +#define BITS8SYM 0x30
4891 +#define XMITBREAK 0x40
4892 +#define ONESTOP 0x07
4893 +#define TWOSTOP 0x0f
4894 +
4895 + byte fifoctl;
4896 +#define RSTTXFIFOS 0x80
4897 +#define RSTRXFIFOS 0x40
4898 + uint32 baudword;
4899 +
4900 + byte txf_levl;
4901 + byte rxf_levl;
4902 + byte fifocfg;
4903 + byte prog_out;
4904 +
4905 + byte unused1;
4906 + byte DeltaIPEdgeNoSense;
4907 + byte DeltaIPConfig_Mask;
4908 + byte DeltaIP_SyncIP;
4909 + uint16 intMask;
4910 + uint16 intStatus;
4911 +#define TXUNDERR 0x0002
4912 +#define TXOVFERR 0x0004
4913 +#define TXFIFOEMT 0x0020
4914 +#define RXOVFERR 0x0080
4915 +#define RXFIFONE 0x0800
4916 +#define RXFRAMERR 0x1000
4917 +#define RXPARERR 0x2000
4918 +#define RXBRK 0x4000
4919 +
4920 + uint16 unused2;
4921 + uint16 Data;
4922 + uint32 unused3;
4923 + uint32 unused4;
4924 +} Uart;
4925 +
4926 +#define UART_BASE 0xfffe0300
4927 +#define UART ((volatile Uart * const) UART_BASE)
4928 +
4929 +typedef struct GpioControl {
4930 + uint16 unused0;
4931 + byte unused1;
4932 + byte TBusSel;
4933 +
4934 + uint16 unused2;
4935 + uint16 GPIODir;
4936 + byte unused3;
4937 + byte Leds;
4938 + uint16 GPIOio;
4939 +
4940 + uint32 UartCtl;
4941 +} GpioControl;
4942 +
4943 +#define GPIO_BASE 0xfffe0400
4944 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
4945 +
4946 +#define GPIO_NUM_MAX_BITS_MASK 0x0f
4947 +#define GPIO_NUM_TO_MASK(X) (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
4948 +
4949 +
4950 +#endif
4951 +
4952 diff -urN linux.old/arch/mips/bcm963xx/include/6348_intr.h linux.dev/arch/mips/bcm963xx/include/6348_intr.h
4953 --- linux.old/arch/mips/bcm963xx/include/6348_intr.h 1970-01-01 01:00:00.000000000 +0100
4954 +++ linux.dev/arch/mips/bcm963xx/include/6348_intr.h 2006-08-25 00:39:38.000000000 +0200
4955 @@ -0,0 +1,74 @@
4956 +/*
4957 +<:copyright-gpl
4958 + Copyright 2003 Broadcom Corp. All Rights Reserved.
4959 +
4960 + This program is free software; you can distribute it and/or modify it
4961 + under the terms of the GNU General Public License (Version 2) as
4962 + published by the Free Software Foundation.
4963 +
4964 + This program is distributed in the hope it will be useful, but WITHOUT
4965 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4966 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
4967 + for more details.
4968 +
4969 + You should have received a copy of the GNU General Public License along
4970 + with this program; if not, write to the Free Software Foundation, Inc.,
4971 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4972 +:>
4973 +*/
4974 +
4975 +#ifndef __6348_INTR_H
4976 +#define __6348_INTR_H
4977 +
4978 +
4979 +/*=====================================================================*/
4980 +/* BCM6348 External Interrupt Level Assignments */
4981 +/*=====================================================================*/
4982 +#define INTERRUPT_ID_EXTERNAL_0 3
4983 +#define INTERRUPT_ID_EXTERNAL_1 4
4984 +#define INTERRUPT_ID_EXTERNAL_2 5
4985 +#define INTERRUPT_ID_EXTERNAL_3 6
4986 +
4987 +/*=====================================================================*/
4988 +/* BCM6348 Timer Interrupt Level Assignments */
4989 +/*=====================================================================*/
4990 +#define MIPS_TIMER_INT 7
4991 +
4992 +/*=====================================================================*/
4993 +/* Peripheral ISR Table Offset */
4994 +/*=====================================================================*/
4995 +#define INTERNAL_ISR_TABLE_OFFSET 8
4996 +
4997 +/*=====================================================================*/
4998 +/* Logical Peripheral Interrupt IDs */
4999 +/*=====================================================================*/
5000 +
5001 +#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
5002 +#define INTERRUPT_ID_SPI (INTERNAL_ISR_TABLE_OFFSET + 1)
5003 +#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 2)
5004 +#define INTERRUPT_ID_ADSL (INTERNAL_ISR_TABLE_OFFSET + 4)
5005 +#define INTERRUPT_ID_ATM (INTERNAL_ISR_TABLE_OFFSET + 5)
5006 +#define INTERRUPT_ID_USBS (INTERNAL_ISR_TABLE_OFFSET + 6)
5007 +#define INTERRUPT_ID_EMAC2 (INTERNAL_ISR_TABLE_OFFSET + 7)
5008 +#define INTERRUPT_ID_EMAC1 (INTERNAL_ISR_TABLE_OFFSET + 8)
5009 +#define INTERRUPT_ID_EPHY (INTERNAL_ISR_TABLE_OFFSET + 9)
5010 +#define INTERRUPT_ID_M2M (INTERNAL_ISR_TABLE_OFFSET + 10)
5011 +#define INTERRUPT_ID_ACLC (INTERNAL_ISR_TABLE_OFFSET + 11)
5012 +#define INTERRUPT_ID_USBH (INTERNAL_ISR_TABLE_OFFSET + 12)
5013 +#define INTERRUPT_ID_SDRAM (INTERNAL_ISR_TABLE_OFFSET + 13)
5014 +#define INTERRUPT_ID_USB_CNTL_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 14)
5015 +#define INTERRUPT_ID_USB_CNTL_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 15)
5016 +#define INTERRUPT_ID_USB_BULK_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 16)
5017 +#define INTERRUPT_ID_USB_BULK_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 17)
5018 +#define INTERRUPT_ID_USB_ISO_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 18)
5019 +#define INTERRUPT_ID_USB_ISO_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 19)
5020 +#define INTERRUPT_ID_EMAC1_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 20)
5021 +#define INTERRUPT_ID_EMAC1_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 21)
5022 +#define INTERRUPT_ID_EMAC2_RX_DMA (INTERNAL_ISR_TABLE_OFFSET + 22)
5023 +#define INTERRUPT_ID_EMAC2_TX_DMA (INTERNAL_ISR_TABLE_OFFSET + 23)
5024 +#define INTERRUPT_ID_MPI (INTERNAL_ISR_TABLE_OFFSET + 24)
5025 +#define INTERRUPT_ID_DG (INTERNAL_ISR_TABLE_OFFSET + 25)
5026 +
5027 +
5028 +#endif /* __BCM6348_H */
5029 +
5030 diff -urN linux.old/arch/mips/bcm963xx/include/6348_map_part.h linux.dev/arch/mips/bcm963xx/include/6348_map_part.h
5031 --- linux.old/arch/mips/bcm963xx/include/6348_map_part.h 1970-01-01 01:00:00.000000000 +0100
5032 +++ linux.dev/arch/mips/bcm963xx/include/6348_map_part.h 2006-08-25 00:39:38.000000000 +0200
5033 @@ -0,0 +1,500 @@
5034 +/*
5035 +<:copyright-gpl
5036 + Copyright 2002 Broadcom Corp. All Rights Reserved.
5037 +
5038 + This program is free software; you can distribute it and/or modify it
5039 + under the terms of the GNU General Public License (Version 2) as
5040 + published by the Free Software Foundation.
5041 +
5042 + This program is distributed in the hope it will be useful, but WITHOUT
5043 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5044 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5045 + for more details.
5046 +
5047 + You should have received a copy of the GNU General Public License along
5048 + with this program; if not, write to the Free Software Foundation, Inc.,
5049 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5050 +:>
5051 +*/
5052 +
5053 +#ifndef __BCM6348_MAP_H
5054 +#define __BCM6348_MAP_H
5055 +
5056 +#include "bcmtypes.h"
5057 +
5058 +#define PERF_BASE 0xfffe0000
5059 +#define TIMR_BASE 0xfffe0200
5060 +#define UART_BASE 0xfffe0300
5061 +#define GPIO_BASE 0xfffe0400
5062 +#define MPI_BASE 0xfffe2000 /* MPI control registers */
5063 +#define USB_HOST_BASE 0xfffe1b00 /* USB host registers */
5064 +#define USB_HOST_NON_OHCI 0xfffe1c00 /* USB host non-OHCI registers */
5065 +
5066 +typedef struct PerfControl {
5067 + uint32 RevID;
5068 + uint16 testControl;
5069 + uint16 blkEnables;
5070 +#define EMAC_CLK_EN 0x0010
5071 +#define SAR_CLK_EN 0x0020
5072 +#define USBS_CLK_EN 0x0040
5073 +#define USBH_CLK_EN 0x0100
5074 +
5075 + uint32 pll_control;
5076 +#define SOFT_RESET 0x00000001
5077 +
5078 + uint32 IrqMask;
5079 + uint32 IrqStatus;
5080 +
5081 + uint32 ExtIrqCfg;
5082 +#define EI_SENSE_SHFT 0
5083 +#define EI_STATUS_SHFT 5
5084 +#define EI_CLEAR_SHFT 10
5085 +#define EI_MASK_SHFT 15
5086 +#define EI_INSENS_SHFT 20
5087 +#define EI_LEVEL_SHFT 25
5088 +
5089 + uint32 unused[4]; /* (18) */
5090 + uint32 BlockSoftReset; /* (28) */
5091 +#define BSR_SPI 0x00000001
5092 +#define BSR_EMAC 0x00000004
5093 +#define BSR_USBH 0x00000008
5094 +#define BSR_USBS 0x00000010
5095 +#define BSR_ADSL 0x00000020
5096 +#define BSR_DMAMEM 0x00000040
5097 +#define BSR_SAR 0x00000080
5098 +#define BSR_ACLC 0x00000100
5099 +#define BSR_ADSL_MIPS_PLL 0x00000400
5100 +#define BSR_ALL_BLOCKS \
5101 + (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
5102 + BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
5103 + uint32 unused2[2]; /* (2c) */
5104 + uint32 PllStrap; /* (34) */
5105 +#define PLL_N1_SHFT 20
5106 +#define PLL_N1_MASK (7<<PLL_N1_SHFT)
5107 +#define PLL_N2_SHFT 15
5108 +#define PLL_N2_MASK (0x1f<<PLL_N2_SHFT)
5109 +#define PLL_M1_REF_SHFT 12
5110 +#define PLL_M1_REF_MASK (7<<PLL_M1_REF_SHFT)
5111 +#define PLL_M2_REF_SHFT 9
5112 +#define PLL_M2_REF_MASK (7<<PLL_M2_REF_SHFT)
5113 +#define PLL_M1_CPU_SHFT 6
5114 +#define PLL_M1_CPU_MASK (7<<PLL_M1_CPU_SHFT)
5115 +#define PLL_M1_BUS_SHFT 3
5116 +#define PLL_M1_BUS_MASK (7<<PLL_M1_BUS_SHFT)
5117 +#define PLL_M2_BUS_SHFT 0
5118 +#define PLL_M2_BUS_MASK (7<<PLL_M2_BUS_SHFT)
5119 +} PerfControl;
5120 +
5121 +#define PERF ((volatile PerfControl * const) PERF_BASE)
5122 +
5123 +typedef struct Timer {
5124 + uint16 unused0;
5125 + byte TimerMask;
5126 +#define TIMER0EN 0x01
5127 +#define TIMER1EN 0x02
5128 +#define TIMER2EN 0x04
5129 + byte TimerInts;
5130 +#define TIMER0 0x01
5131 +#define TIMER1 0x02
5132 +#define TIMER2 0x04
5133 +#define WATCHDOG 0x08
5134 + uint32 TimerCtl0;
5135 + uint32 TimerCtl1;
5136 + uint32 TimerCtl2;
5137 +#define TIMERENABLE 0x80000000
5138 +#define RSTCNTCLR 0x40000000
5139 + uint32 TimerCnt0;
5140 + uint32 TimerCnt1;
5141 + uint32 TimerCnt2;
5142 + uint32 WatchDogDefCount;
5143 +
5144 + /* Write 0xff00 0x00ff to Start timer
5145 + * Write 0xee00 0x00ee to Stop and re-load default count
5146 + * Read from this register returns current watch dog count
5147 + */
5148 + uint32 WatchDogCtl;
5149 +
5150 + /* Number of 40-MHz ticks for WD Reset pulse to last */
5151 + uint32 WDResetCount;
5152 +} Timer;
5153 +
5154 +#define TIMER ((volatile Timer * const) TIMR_BASE)
5155 +
5156 +typedef struct UartChannel {
5157 + byte unused0;
5158 + byte control;
5159 +#define BRGEN 0x80 /* Control register bit defs */
5160 +#define TXEN 0x40
5161 +#define RXEN 0x20
5162 +#define LOOPBK 0x10
5163 +#define TXPARITYEN 0x08
5164 +#define TXPARITYEVEN 0x04
5165 +#define RXPARITYEN 0x02
5166 +#define RXPARITYEVEN 0x01
5167 +
5168 + byte config;
5169 +#define XMITBREAK 0x40
5170 +#define BITS5SYM 0x00
5171 +#define BITS6SYM 0x10
5172 +#define BITS7SYM 0x20
5173 +#define BITS8SYM 0x30
5174 +#define ONESTOP 0x07
5175 +#define TWOSTOP 0x0f
5176 + /* 4-LSBS represent STOP bits/char
5177 + * in 1/8 bit-time intervals. Zero
5178 + * represents 1/8 stop bit interval.
5179 + * Fifteen represents 2 stop bits.
5180 + */
5181 + byte fifoctl;
5182 +#define RSTTXFIFOS 0x80
5183 +#define RSTRXFIFOS 0x40
5184 + /* 5-bit TimeoutCnt is in low bits of this register.
5185 + * This count represents the number of characters
5186 + * idle times before setting receive Irq when below threshold
5187 + */
5188 + uint32 baudword;
5189 + /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
5190 + */
5191 +
5192 + byte txf_levl; /* Read-only fifo depth */
5193 + byte rxf_levl; /* Read-only fifo depth */
5194 + byte fifocfg; /* Upper 4-bits are TxThresh, Lower are
5195 + * RxThreshold. Irq can be asserted
5196 + * when rx fifo> thresh, txfifo<thresh
5197 + */
5198 + byte prog_out; /* Set value of DTR (Bit0), RTS (Bit1)
5199 + * if these bits are also enabled to GPIO_o
5200 + */
5201 +#define DTREN 0x01
5202 +#define RTSEN 0x02
5203 +
5204 + byte unused1;
5205 + byte DeltaIPEdgeNoSense; /* Low 4-bits, set corr bit to 1 to
5206 + * detect irq on rising AND falling
5207 + * edges for corresponding GPIO_i
5208 + * if enabled (edge insensitive)
5209 + */
5210 + byte DeltaIPConfig_Mask; /* Upper 4 bits: 1 for posedge sense
5211 + * 0 for negedge sense if
5212 + * not configured for edge
5213 + * insensitive (see above)
5214 + * Lower 4 bits: Mask to enable change
5215 + * detection IRQ for corresponding
5216 + * GPIO_i
5217 + */
5218 + byte DeltaIP_SyncIP; /* Upper 4 bits show which bits
5219 + * have changed (may set IRQ).
5220 + * read automatically clears bit
5221 + * Lower 4 bits are actual status
5222 + */
5223 +
5224 + uint16 intMask; /* Same Bit defs for Mask and status */
5225 + uint16 intStatus;
5226 +#define DELTAIP 0x0001
5227 +#define TXUNDERR 0x0002
5228 +#define TXOVFERR 0x0004
5229 +#define TXFIFOTHOLD 0x0008
5230 +#define TXREADLATCH 0x0010
5231 +#define TXFIFOEMT 0x0020
5232 +#define RXUNDERR 0x0040
5233 +#define RXOVFERR 0x0080
5234 +#define RXTIMEOUT 0x0100
5235 +#define RXFIFOFULL 0x0200
5236 +#define RXFIFOTHOLD 0x0400
5237 +#define RXFIFONE 0x0800
5238 +#define RXFRAMERR 0x1000
5239 +#define RXPARERR 0x2000
5240 +#define RXBRK 0x4000
5241 +
5242 + uint16 unused2;
5243 + uint16 Data; /* Write to TX, Read from RX */
5244 + /* bits 11:8 are BRK,PAR,FRM errors */
5245 +
5246 + uint32 unused3;
5247 + uint32 unused4;
5248 +} Uart;
5249 +
5250 +#define UART ((volatile Uart * const) UART_BASE)
5251 +
5252 +typedef struct GpioControl {
5253 + uint32 GPIODir_high; /* bits 36:32 */
5254 + uint32 GPIODir; /* bits 31:00 */
5255 + uint32 GPIOio_high; /* bits 36:32 */
5256 + uint32 GPIOio; /* bits 31:00 */
5257 + uint32 LEDCtrl;
5258 +#define LED3_STROBE 0x08000000
5259 +#define LED2_STROBE 0x04000000
5260 +#define LED1_STROBE 0x02000000
5261 +#define LED0_STROBE 0x01000000
5262 +#define LED_TEST 0x00010000
5263 +#define LED3_DISABLE_LINK_ACT 0x00008000
5264 +#define LED2_DISABLE_LINK_ACT 0x00004000
5265 +#define LED1_DISABLE_LINK_ACT 0x00002000
5266 +#define LED0_DISABLE_LINK_ACT 0x00001000
5267 +#define LED_INTERVAL_SET_MASK 0x00000f00
5268 +#define LED_INTERVAL_SET_320MS 0x00000500
5269 +#define LED_INTERVAL_SET_160MS 0x00000400
5270 +#define LED_INTERVAL_SET_80MS 0x00000300
5271 +#define LED_INTERVAL_SET_40MS 0x00000200
5272 +#define LED_INTERVAL_SET_20MS 0x00000100
5273 +#define LED3_ON 0x00000080
5274 +#define LED2_ON 0x00000040
5275 +#define LED1_ON 0x00000020
5276 +#define LED0_ON 0x00000010
5277 +#define LED3_ENABLE 0x00000008
5278 +#define LED2_ENABLE 0x00000004
5279 +#define LED1_ENABLE 0x00000002
5280 +#define LED0_ENABLE 0x00000001
5281 + uint32 SpiSlaveCfg;
5282 +#define SPI_SLAVE_RESET 0x00010000
5283 +#define SPI_RESTRICT 0x00000400
5284 +#define SPI_DELAY_DISABLE 0x00000200
5285 +#define SPI_PROBE_MUX_SEL_MASK 0x000001e0
5286 +#define SPI_SER_ADDR_CFG_MASK 0x0000000c
5287 +#define SPI_MODE 0x00000001
5288 + uint32 GPIOMode;
5289 +#define GROUP4_DIAG 0x00090000
5290 +#define GROUP4_UTOPIA 0x00080000
5291 +#define GROUP4_LEGACY_LED 0x00030000
5292 +#define GROUP4_MII_SNOOP 0x00020000
5293 +#define GROUP4_EXT_EPHY 0x00010000
5294 +#define GROUP3_DIAG 0x00009000
5295 +#define GROUP3_UTOPIA 0x00008000
5296 +#define GROUP3_EXT_MII 0x00007000
5297 +#define GROUP2_DIAG 0x00000900
5298 +#define GROUP2_PCI 0x00000500
5299 +#define GROUP1_DIAG 0x00000090
5300 +#define GROUP1_UTOPIA 0x00000080
5301 +#define GROUP1_SPI_UART 0x00000060
5302 +#define GROUP1_SPI_MASTER 0x00000060
5303 +#define GROUP1_MII_PCCARD 0x00000040
5304 +#define GROUP1_MII_SNOOP 0x00000020
5305 +#define GROUP1_EXT_EPHY 0x00000010
5306 +#define GROUP0_DIAG 0x00000009
5307 +#define GROUP0_EXT_MII 0x00000007
5308 +
5309 +} GpioControl;
5310 +
5311 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
5312 +
5313 +/* Number to mask conversion macro used for GPIODir and GPIOio */
5314 +#define GPIO_NUM_TOTAL_BITS_MASK 0x3f
5315 +#define GPIO_NUM_MAX_BITS_MASK 0x1f
5316 +#define GPIO_NUM_TO_MASK(X) ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) < 32) ? (1 << ((X) & GPIO_NUM_MAX_BITS_MASK)) : (0) )
5317 +
5318 +/* Number to mask conversion macro used for GPIODir_high and GPIOio_high */
5319 +#define GPIO_NUM_MAX_BITS_MASK_HIGH 0x07
5320 +#define GPIO_NUM_TO_MASK_HIGH(X) ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) >= 32) ? (1 << ((X-32) & GPIO_NUM_MAX_BITS_MASK_HIGH)) : (0) )
5321 +
5322 +
5323 +/*
5324 +** External Bus Interface
5325 +*/
5326 +typedef struct EbiChipSelect {
5327 + uint32 base; /* base address in upper 24 bits */
5328 +#define EBI_SIZE_8K 0
5329 +#define EBI_SIZE_16K 1
5330 +#define EBI_SIZE_32K 2
5331 +#define EBI_SIZE_64K 3
5332 +#define EBI_SIZE_128K 4
5333 +#define EBI_SIZE_256K 5
5334 +#define EBI_SIZE_512K 6
5335 +#define EBI_SIZE_1M 7
5336 +#define EBI_SIZE_2M 8
5337 +#define EBI_SIZE_4M 9
5338 +#define EBI_SIZE_8M 10
5339 +#define EBI_SIZE_16M 11
5340 +#define EBI_SIZE_32M 12
5341 +#define EBI_SIZE_64M 13
5342 +#define EBI_SIZE_128M 14
5343 +#define EBI_SIZE_256M 15
5344 + uint32 config;
5345 +#define EBI_ENABLE 0x00000001 /* .. enable this range */
5346 +#define EBI_WAIT_STATES 0x0000000e /* .. mask for wait states */
5347 +#define EBI_WTST_SHIFT 1 /* .. for shifting wait states */
5348 +#define EBI_WORD_WIDE 0x00000010 /* .. 16-bit peripheral, else 8 */
5349 +#define EBI_WREN 0x00000020 /* enable posted writes */
5350 +#define EBI_POLARITY 0x00000040 /* .. set to invert something,
5351 + ** don't know what yet */
5352 +#define EBI_TS_TA_MODE 0x00000080 /* .. use TS/TA mode */
5353 +#define EBI_TS_SEL 0x00000100 /* .. drive tsize, not bs_b */
5354 +#define EBI_FIFO 0x00000200 /* .. use fifo */
5355 +#define EBI_RE 0x00000400 /* .. Reverse Endian */
5356 +} EbiChipSelect;
5357 +
5358 +typedef struct MpiRegisters {
5359 + EbiChipSelect cs[7]; /* size chip select configuration */
5360 +#define EBI_CS0_BASE 0
5361 +#define EBI_CS1_BASE 1
5362 +#define EBI_CS2_BASE 2
5363 +#define EBI_CS3_BASE 3
5364 +#define PCMCIA_COMMON_BASE 4
5365 +#define PCMCIA_ATTRIBUTE_BASE 5
5366 +#define PCMCIA_IO_BASE 6
5367 + uint32 unused0[2]; /* reserved */
5368 + uint32 ebi_control; /* ebi control */
5369 + uint32 unused1[4]; /* reserved */
5370 +#define EBI_ACCESS_TIMEOUT 0x000007FF
5371 + uint32 pcmcia_cntl1; /* pcmcia control 1 */
5372 +#define PCCARD_CARD_RESET 0x00040000
5373 +#define CARDBUS_ENABLE 0x00008000
5374 +#define PCMCIA_ENABLE 0x00004000
5375 +#define PCMCIA_GPIO_ENABLE 0x00002000
5376 +#define CARDBUS_IDSEL 0x00001F00
5377 +#define VS2_OEN 0x00000080
5378 +#define VS1_OEN 0x00000040
5379 +#define VS2_OUT 0x00000020
5380 +#define VS1_OUT 0x00000010
5381 +#define VS2_IN 0x00000008
5382 +#define VS1_IN 0x00000004
5383 +#define CD2_IN 0x00000002
5384 +#define CD1_IN 0x00000001
5385 +#define VS_MASK 0x0000000C
5386 +#define CD_MASK 0x00000003
5387 + uint32 unused2; /* reserved */
5388 + uint32 pcmcia_cntl2; /* pcmcia control 2 */
5389 +#define PCMCIA_BYTESWAP_DIS 0x00000002
5390 +#define PCMCIA_HALFWORD_EN 0x00000001
5391 +#define RW_ACTIVE_CNT_BIT 2
5392 +#define INACTIVE_CNT_BIT 8
5393 +#define CE_SETUP_CNT_BIT 16
5394 +#define CE_HOLD_CNT_BIT 24
5395 + uint32 unused3[40]; /* reserved */
5396 +
5397 + uint32 sp0range; /* PCI to internal system bus address space */
5398 + uint32 sp0remap;
5399 + uint32 sp0cfg;
5400 + uint32 sp1range;
5401 + uint32 sp1remap;
5402 + uint32 sp1cfg;
5403 +
5404 + uint32 EndianCfg;
5405 +
5406 + uint32 l2pcfgctl; /* internal system bus to PCI IO/Cfg control */
5407 +#define DIR_CFG_SEL 0x80000000 /* change from PCI I/O access to PCI config access */
5408 +#define DIR_CFG_USEREG 0x40000000 /* use this register info for PCI configuration access */
5409 +#define DEVICE_NUMBER 0x00007C00 /* device number for the PCI configuration access */
5410 +#define FUNC_NUMBER 0x00000300 /* function number for the PCI configuration access */
5411 +#define REG_NUMBER 0x000000FC /* register number for the PCI configuration access */
5412 +#define CONFIG_TYPE 0x00000003 /* configuration type for the PCI configuration access */
5413 +
5414 + uint32 l2pmrange1; /* internal system bus to PCI memory space */
5415 +#define PCI_SIZE_64K 0xFFFF0000
5416 +#define PCI_SIZE_128K 0xFFFE0000
5417 +#define PCI_SIZE_256K 0xFFFC0000
5418 +#define PCI_SIZE_512K 0xFFF80000
5419 +#define PCI_SIZE_1M 0xFFF00000
5420 +#define PCI_SIZE_2M 0xFFE00000
5421 +#define PCI_SIZE_4M 0xFFC00000
5422 +#define PCI_SIZE_8M 0xFF800000
5423 +#define PCI_SIZE_16M 0xFF000000
5424 +#define PCI_SIZE_32M 0xFE000000
5425 + uint32 l2pmbase1; /* kseg0 or kseg1 address & 0x1FFFFFFF */
5426 + uint32 l2pmremap1;
5427 +#define CARDBUS_MEM 0x00000004
5428 +#define MEM_WINDOW_EN 0x00000001
5429 + uint32 l2pmrange2;
5430 + uint32 l2pmbase2;
5431 + uint32 l2pmremap2;
5432 + uint32 l2piorange; /* internal system bus to PCI I/O space */
5433 + uint32 l2piobase;
5434 + uint32 l2pioremap;
5435 +
5436 + uint32 pcimodesel;
5437 +#define PCI2_INT_BUS_RD_PREFECH 0x000000F0
5438 +#define PCI_BAR2_NOSWAP 0x00000002 /* BAR at offset 0x20 */
5439 +#define PCI_BAR1_NOSWAP 0x00000001 /* BAR at affset 0x1c */
5440 +
5441 + uint32 pciintstat; /* PCI interrupt mask/status */
5442 +#define MAILBOX1_SENT 0x08
5443 +#define MAILBOX0_SENT 0x04
5444 +#define MAILBOX1_MSG_RCV 0x02
5445 +#define MAILBOX0_MSG_RCV 0x01
5446 + uint32 locbuscntrl; /* internal system bus control */
5447 +#define DIR_U2P_NOSWAP 0x00000002
5448 +#define EN_PCI_GPIO 0x00000001
5449 + uint32 locintstat; /* internal system bus interrupt mask/status */
5450 +#define CSERR 0x0200
5451 +#define SERR 0x0100
5452 +#define EXT_PCI_INT 0x0080
5453 +#define DIR_FAILED 0x0040
5454 +#define DIR_COMPLETE 0x0020
5455 +#define PCI_CFG 0x0010
5456 + uint32 unused5[7];
5457 +
5458 + uint32 mailbox0;
5459 + uint32 mailbox1;
5460 +
5461 + uint32 pcicfgcntrl; /* internal system bus PCI configuration control */
5462 +#define PCI_CFG_REG_WRITE_EN 0x00000080
5463 +#define PCI_CFG_ADDR 0x0000003C
5464 + uint32 pcicfgdata; /* internal system bus PCI configuration data */
5465 +
5466 + uint32 locch2ctl; /* PCI to interrnal system bus DMA (downstream) local control */
5467 +#define MPI_DMA_HALT 0x00000008 /* idle after finish current memory burst */
5468 +#define MPI_DMA_PKT_HALT 0x00000004 /* idle after an EOP flag is detected */
5469 +#define MPI_DMA_STALL 0x00000002 /* idle after an EOP flag is detected */
5470 +#define MPI_DMA_ENABLE 0x00000001 /* set to enable channel */
5471 + uint32 locch2intStat;
5472 +#define MPI_DMA_NO_DESC 0x00000004 /* no valid descriptors */
5473 +#define MPI_DMA_DONE 0x00000002 /* packet xfer complete */
5474 +#define MPI_DMA_BUFF_DONE 0x00000001 /* buffer done */
5475 + uint32 locch2intMask;
5476 + uint32 unused6;
5477 + uint32 locch2descaddr;
5478 + uint32 locch2status1;
5479 +#define LOCAL_DESC_STATE 0xE0000000
5480 +#define PCI_DESC_STATE 0x1C000000
5481 +#define BYTE_DONE 0x03FFC000
5482 +#define RING_ADDR 0x00003FFF
5483 + uint32 locch2status2;
5484 +#define BUFPTR_OFFSET 0x1FFF0000
5485 +#define PCI_MASTER_STATE 0x000000C0
5486 +#define LOC_MASTER_STATE 0x00000038
5487 +#define CONTROL_STATE 0x00000007
5488 + uint32 unused7;
5489 +
5490 + uint32 locch1Ctl; /*internal system bus to PCI DMA (upstream) local control */
5491 +#define DMA_U2P_LE 0x00000200 /* local bus is little endian */
5492 +#define DMA_U2P_NOSWAP 0x00000100 /* lccal bus is little endian but no data swapped */
5493 + uint32 locch1intstat;
5494 + uint32 locch1intmask;
5495 + uint32 unused8;
5496 + uint32 locch1descaddr;
5497 + uint32 locch1status1;
5498 + uint32 locch1status2;
5499 + uint32 unused9;
5500 +
5501 + uint32 pcich1ctl; /* internal system bus to PCI DMA PCI control */
5502 + uint32 pcich1intstat;
5503 + uint32 pcich1intmask;
5504 + uint32 pcich1descaddr;
5505 + uint32 pcich1status1;
5506 + uint32 pcich1status2;
5507 +
5508 + uint32 pcich2Ctl; /* PCI to internal system bus DMA PCI control */
5509 + uint32 pcich2intstat;
5510 + uint32 pcich2intmask;
5511 + uint32 pcich2descaddr;
5512 + uint32 pcich2status1;
5513 + uint32 pcich2status2;
5514 +
5515 + uint32 perm_id; /* permanent device and vendor id */
5516 + uint32 perm_rev; /* permanent revision id */
5517 +} MpiRegisters;
5518 +
5519 +#define MPI ((volatile MpiRegisters * const) MPI_BASE)
5520 +
5521 +/* PCI configuration address space start offset 0x40 */
5522 +#define BRCM_PCI_CONFIG_TIMER 0x40
5523 +#define BRCM_PCI_CONFIG_TIMER_RETRY_MASK 0x0000FF00
5524 +#define BRCM_PCI_CONFIG_TIMER_TRDY_MASK 0x000000FF
5525 +
5526 +/* USB host non-Open HCI register, USB_HOST_NON_OHCI, bit definitions. */
5527 +#define NON_OHCI_ENABLE_PORT1 0x00000001 /* Use USB port 1 for host, not dev */
5528 +#define NON_OHCI_BYTE_SWAP 0x00000008 /* Swap USB host registers */
5529 +
5530 +#define USBH_NON_OHCI ((volatile unsigned long * const) USB_HOST_NON_OHCI)
5531 +
5532 +#endif
5533 +
5534 diff -urN linux.old/arch/mips/bcm963xx/include/bcm_intr.h linux.dev/arch/mips/bcm963xx/include/bcm_intr.h
5535 --- linux.old/arch/mips/bcm963xx/include/bcm_intr.h 1970-01-01 01:00:00.000000000 +0100
5536 +++ linux.dev/arch/mips/bcm963xx/include/bcm_intr.h 2006-08-25 00:39:38.000000000 +0200
5537 @@ -0,0 +1,59 @@
5538 +/*
5539 +<:copyright-gpl
5540 + Copyright 2003 Broadcom Corp. All Rights Reserved.
5541 +
5542 + This program is free software; you can distribute it and/or modify it
5543 + under the terms of the GNU General Public License (Version 2) as
5544 + published by the Free Software Foundation.
5545 +
5546 + This program is distributed in the hope it will be useful, but WITHOUT
5547 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5548 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5549 + for more details.
5550 +
5551 + You should have received a copy of the GNU General Public License along
5552 + with this program; if not, write to the Free Software Foundation, Inc.,
5553 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5554 +:>
5555 +*/
5556 +
5557 +#ifndef __BCM_INTR_H
5558 +#define __BCM_INTR_H
5559 +
5560 +#ifdef __cplusplus
5561 + extern "C" {
5562 +#endif
5563 +
5564 +#if defined(CONFIG_BCM96338)
5565 +#include <6338_intr.h>
5566 +#endif
5567 +#if defined(CONFIG_BCM96345)
5568 +#include <6345_intr.h>
5569 +#endif
5570 +#if defined(CONFIG_BCM96348)
5571 +#include <6348_intr.h>
5572 +#endif
5573 +
5574 +/* defines */
5575 +struct pt_regs;
5576 +typedef int (*FN_HANDLER) (int, void *, struct pt_regs *);
5577 +
5578 +/* prototypes */
5579 +extern void enable_brcm_irq(unsigned int irq);
5580 +extern void disable_brcm_irq(unsigned int irq);
5581 +extern int request_external_irq(unsigned int irq,
5582 + FN_HANDLER handler, unsigned long irqflags,
5583 + const char * devname, void *dev_id);
5584 +extern unsigned int BcmHalMapInterrupt(FN_HANDLER isr, unsigned int param,
5585 + unsigned int interruptId);
5586 +extern void dump_intr_regs(void);
5587 +
5588 +/* compatibility definitions */
5589 +#define BcmHalInterruptEnable(irq) enable_brcm_irq( irq )
5590 +#define BcmHalInterruptDisable(irq) disable_brcm_irq( irq )
5591 +
5592 +#ifdef __cplusplus
5593 + }
5594 +#endif
5595 +
5596 +#endif
5597 diff -urN linux.old/arch/mips/bcm963xx/include/bcm_map_part.h linux.dev/arch/mips/bcm963xx/include/bcm_map_part.h
5598 --- linux.old/arch/mips/bcm963xx/include/bcm_map_part.h 1970-01-01 01:00:00.000000000 +0100
5599 +++ linux.dev/arch/mips/bcm963xx/include/bcm_map_part.h 2006-08-25 00:39:38.000000000 +0200
5600 @@ -0,0 +1,34 @@
5601 +/*
5602 +<:copyright-gpl
5603 + Copyright 2004 Broadcom Corp. All Rights Reserved.
5604 +
5605 + This program is free software; you can distribute it and/or modify it
5606 + under the terms of the GNU General Public License (Version 2) as
5607 + published by the Free Software Foundation.
5608 +
5609 + This program is distributed in the hope it will be useful, but WITHOUT
5610 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5611 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5612 + for more details.
5613 +
5614 + You should have received a copy of the GNU General Public License along
5615 + with this program; if not, write to the Free Software Foundation, Inc.,
5616 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5617 +:>
5618 +*/
5619 +
5620 +#ifndef __BCM_MAP_PART_H
5621 +#define __BCM_MAP_PART_H
5622 +
5623 +#if defined(CONFIG_BCM96338)
5624 +#include <6338_map_part.h>
5625 +#endif
5626 +#if defined(CONFIG_BCM96345)
5627 +#include <6345_map_part.h>
5628 +#endif
5629 +#if defined(CONFIG_BCM96348)
5630 +#include <6348_map_part.h>
5631 +#endif
5632 +
5633 +#endif
5634 +
5635 diff -urN linux.old/arch/mips/bcm963xx/include/bcmpci.h linux.dev/arch/mips/bcm963xx/include/bcmpci.h
5636 --- linux.old/arch/mips/bcm963xx/include/bcmpci.h 1970-01-01 01:00:00.000000000 +0100
5637 +++ linux.dev/arch/mips/bcm963xx/include/bcmpci.h 2006-08-25 00:39:38.000000000 +0200
5638 @@ -0,0 +1,87 @@
5639 +/*
5640 +<:copyright-gpl
5641 + Copyright 2004 Broadcom Corp. All Rights Reserved.
5642 +
5643 + This program is free software; you can distribute it and/or modify it
5644 + under the terms of the GNU General Public License (Version 2) as
5645 + published by the Free Software Foundation.
5646 +
5647 + This program is distributed in the hope it will be useful, but WITHOUT
5648 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5649 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5650 + for more details.
5651 +
5652 + You should have received a copy of the GNU General Public License along
5653 + with this program; if not, write to the Free Software Foundation, Inc.,
5654 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5655 +:>
5656 +*/
5657 +
5658 +//
5659 +// bcmpci.h - bcm96348 PCI, Cardbus, and PCMCIA definition
5660 +//
5661 +#ifndef BCMPCI_H
5662 +#define BCMPCI_H
5663 +
5664 +/* Memory window in internal system bus address space */
5665 +#define BCM_PCI_MEM_BASE 0x08000000
5666 +/* IO window in internal system bus address space */
5667 +#define BCM_PCI_IO_BASE 0x0C000000
5668 +
5669 +#define BCM_PCI_ADDR_MASK 0x1fffffff
5670 +
5671 +/* Memory window size (range) */
5672 +#define BCM_PCI_MEM_SIZE_16MB 0x01000000
5673 +/* IO window size (range) */
5674 +#define BCM_PCI_IO_SIZE_64KB 0x00010000
5675 +
5676 +/* PCI Configuration and I/O space acesss */
5677 +#define BCM_PCI_CFG(d, f, o) ( (d << 11) | (f << 8) | (o/4 << 2) )
5678 +
5679 +/* fake USB PCI slot */
5680 +#define USB_HOST_SLOT 9
5681 +#define USB_BAR0_MEM_SIZE 0x0800
5682 +
5683 +#define BCM_HOST_MEM_SPACE1 0x10000000
5684 +#define BCM_HOST_MEM_SPACE2 0x00000000
5685 +
5686 +/*
5687 + * EBI bus clock is 33MHz and share with PCI bus
5688 + * each clock cycle is 30ns.
5689 + */
5690 +/* attribute memory access wait cnt for 4306 */
5691 +#define PCMCIA_ATTR_CE_HOLD 3 // data hold time 70ns
5692 +#define PCMCIA_ATTR_CE_SETUP 3 // data setup time 50ns
5693 +#define PCMCIA_ATTR_INACTIVE 6 // time between read/write cycles 180ns. For the total cycle time 600ns (cnt1+cnt2+cnt3+cnt4)
5694 +#define PCMCIA_ATTR_ACTIVE 10 // OE/WE pulse width 300ns
5695 +
5696 +/* common memory access wait cnt for 4306 */
5697 +#define PCMCIA_MEM_CE_HOLD 1 // data hold time 30ns
5698 +#define PCMCIA_MEM_CE_SETUP 1 // data setup time 30ns
5699 +#define PCMCIA_MEM_INACTIVE 2 // time between read/write cycles 40ns. For the total cycle time 250ns (cnt1+cnt2+cnt3+cnt4)
5700 +#define PCMCIA_MEM_ACTIVE 5 // OE/WE pulse width 150ns
5701 +
5702 +#define PCCARD_VCC_MASK 0x00070000 // Mask Reset also
5703 +#define PCCARD_VCC_33V 0x00010000
5704 +#define PCCARD_VCC_50V 0x00020000
5705 +
5706 +typedef enum {
5707 + MPI_CARDTYPE_NONE, // No Card in slot
5708 + MPI_CARDTYPE_PCMCIA, // 16-bit PCMCIA card in slot
5709 + MPI_CARDTYPE_CARDBUS, // 32-bit CardBus card in slot
5710 +} CardType;
5711 +
5712 +#define CARDBUS_SLOT 0 // Slot 0 is default for CardBus
5713 +
5714 +#define pcmciaAttrOffset 0x00200000
5715 +#define pcmciaMemOffset 0x00000000
5716 +// Needs to be right above PCI I/O space. Give 0x8000 (32K) to PCMCIA.
5717 +#define pcmciaIoOffset (BCM_PCI_IO_BASE + 0x80000)
5718 +// Base Address is that mapped into the MPI ChipSelect registers.
5719 +// UBUS bridge MemoryWindow 0 outputs a 0x00 for the base.
5720 +#define pcmciaBase 0xbf000000
5721 +#define pcmciaAttr (pcmciaAttrOffset | pcmciaBase)
5722 +#define pcmciaMem (pcmciaMemOffset | pcmciaBase)
5723 +#define pcmciaIo (pcmciaIoOffset | pcmciaBase)
5724 +
5725 +#endif
5726 diff -urN linux.old/arch/mips/bcm963xx/include/bcmTag.h linux.dev/arch/mips/bcm963xx/include/bcmTag.h
5727 --- linux.old/arch/mips/bcm963xx/include/bcmTag.h 1970-01-01 01:00:00.000000000 +0100
5728 +++ linux.dev/arch/mips/bcm963xx/include/bcmTag.h 2006-08-25 00:39:38.000000000 +0200
5729 @@ -0,0 +1,153 @@
5730 +/*
5731 +<:copyright-gpl
5732 + Copyright 2002 Broadcom Corp. All Rights Reserved.
5733 +
5734 + This program is free software; you can distribute it and/or modify it
5735 + under the terms of the GNU General Public License (Version 2) as
5736 + published by the Free Software Foundation.
5737 +
5738 + This program is distributed in the hope it will be useful, but WITHOUT
5739 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5740 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5741 + for more details.
5742 +
5743 + You should have received a copy of the GNU General Public License along
5744 + with this program; if not, write to the Free Software Foundation, Inc.,
5745 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5746 +:>
5747 +*/
5748 +//**************************************************************************************
5749 +// File Name : bcmTag.h
5750 +//
5751 +// Description: add tag with validation system to the firmware image file to be uploaded
5752 +// via http
5753 +//
5754 +// Created : 02/28/2002 seanl
5755 +//**************************************************************************************
5756 +
5757 +#ifndef _BCMTAG_H_
5758 +#define _BCMTAG_H_
5759 +
5760 +
5761 +#define BCM_SIG_1 "Broadcom Corporation"
5762 +#define BCM_SIG_2 "ver. 2.0" // was "firmware version 2.0" now it is split 6 char out for chip id.
5763 +
5764 +#define BCM_TAG_VER "6"
5765 +#define BCM_TAG_VER_LAST "26"
5766 +
5767 +// file tag (head) structure all is in clear text except validationTokens (crc, md5, sha1, etc). Total: 128 unsigned chars
5768 +#define TAG_LEN 256
5769 +#define TAG_VER_LEN 4
5770 +#define SIG_LEN 20
5771 +#define SIG_LEN_2 14 // Original second SIG = 20 is now devided into 14 for SIG_LEN_2 and 6 for CHIP_ID
5772 +#define CHIP_ID_LEN 6
5773 +#define IMAGE_LEN 10
5774 +#define ADDRESS_LEN 12
5775 +#define FLAG_LEN 2
5776 +#define TOKEN_LEN 20
5777 +#define BOARD_ID_LEN 16
5778 +#define RESERVED_LEN (TAG_LEN - TAG_VER_LEN - SIG_LEN - SIG_LEN_2 - CHIP_ID_LEN - BOARD_ID_LEN - \
5779 + (4*IMAGE_LEN) - (3*ADDRESS_LEN) - (3*FLAG_LEN) - (2*TOKEN_LEN))
5780 +
5781 +
5782 +// TAG for downloadable image (kernel plus file system)
5783 +typedef struct _FILE_TAG
5784 +{
5785 + unsigned char tagVersion[TAG_VER_LEN]; // tag version. Will be 2 here.
5786 + unsigned char signiture_1[SIG_LEN]; // text line for company info
5787 + unsigned char signiture_2[SIG_LEN_2]; // additional info (can be version number)
5788 + unsigned char chipId[CHIP_ID_LEN]; // chip id
5789 + unsigned char boardId[BOARD_ID_LEN]; // board id
5790 + unsigned char bigEndian[FLAG_LEN]; // if = 1 - big, = 0 - little endia of the host
5791 + unsigned char totalImageLen[IMAGE_LEN]; // the sum of all the following length
5792 + unsigned char cfeAddress[ADDRESS_LEN]; // if non zero, cfe starting address
5793 + unsigned char cfeLen[IMAGE_LEN]; // if non zero, cfe size in clear ASCII text.
5794 + unsigned char rootfsAddress[ADDRESS_LEN]; // if non zero, filesystem starting address
5795 + unsigned char rootfsLen[IMAGE_LEN]; // if non zero, filesystem size in clear ASCII text.
5796 + unsigned char kernelAddress[ADDRESS_LEN]; // if non zero, kernel starting address
5797 + unsigned char kernelLen[IMAGE_LEN]; // if non zero, kernel size in clear ASCII text.
5798 + unsigned char dualImage[FLAG_LEN]; // if 1, dual image
5799 + unsigned char inactiveLen[FLAG_LEN]; // if 1, the image is INACTIVE; if 0, active
5800 + unsigned char reserved[RESERVED_LEN]; // reserved for later use
5801 + unsigned char imageValidationToken[TOKEN_LEN];// image validation token - can be crc, md5, sha; for
5802 + // now will be 4 unsigned char crc
5803 + unsigned char tagValidationToken[TOKEN_LEN]; // validation token for tag(from signiture_1 to end of // mageValidationToken)
5804 +} FILE_TAG, *PFILE_TAG;
5805 +
5806 +#define CRC32_INIT_VALUE 0xffffffff /* Initial CRC32 checksum value */
5807 +#define CRC_LEN 4
5808 +
5809 +// only included if for bcmTag.exe program
5810 +#ifdef BCMTAG_EXE_USE
5811 +
5812 +static unsigned long Crc32_table[256] = {
5813 + 0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA,
5814 + 0x076DC419, 0x706AF48F, 0xE963A535, 0x9E6495A3,
5815 + 0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988,
5816 + 0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91,
5817 + 0x1DB71064, 0x6AB020F2, 0xF3B97148, 0x84BE41DE,
5818 + 0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7,
5819 + 0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC,
5820 + 0x14015C4F, 0x63066CD9, 0xFA0F3D63, 0x8D080DF5,
5821 + 0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172,
5822 + 0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B,
5823 + 0x35B5A8FA, 0x42B2986C, 0xDBBBC9D6, 0xACBCF940,
5824 + 0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59,
5825 + 0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116,
5826 + 0x21B4F4B5, 0x56B3C423, 0xCFBA9599, 0xB8BDA50F,
5827 + 0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924,
5828 + 0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D,
5829 + 0x76DC4190, 0x01DB7106, 0x98D220BC, 0xEFD5102A,
5830 + 0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433,
5831 + 0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818,
5832 + 0x7F6A0DBB, 0x086D3D2D, 0x91646C97, 0xE6635C01,
5833 + 0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E,
5834 + 0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457,
5835 + 0x65B0D9C6, 0x12B7E950, 0x8BBEB8EA, 0xFCB9887C,
5836 + 0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65,
5837 + 0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2,
5838 + 0x4ADFA541, 0x3DD895D7, 0xA4D1C46D, 0xD3D6F4FB,
5839 + 0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0,
5840 + 0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9,
5841 + 0x5005713C, 0x270241AA, 0xBE0B1010, 0xC90C2086,
5842 + 0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F,
5843 + 0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4,
5844 + 0x59B33D17, 0x2EB40D81, 0xB7BD5C3B, 0xC0BA6CAD,
5845 + 0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A,
5846 + 0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683,
5847 + 0xE3630B12, 0x94643B84, 0x0D6D6A3E, 0x7A6A5AA8,
5848 + 0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1,
5849 + 0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE,
5850 + 0xF762575D, 0x806567CB, 0x196C3671, 0x6E6B06E7,
5851 + 0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC,
5852 + 0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5,
5853 + 0xD6D6A3E8, 0xA1D1937E, 0x38D8C2C4, 0x4FDFF252,
5854 + 0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B,
5855 + 0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60,
5856 + 0xDF60EFC3, 0xA867DF55, 0x316E8EEF, 0x4669BE79,
5857 + 0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236,
5858 + 0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F,
5859 + 0xC5BA3BBE, 0xB2BD0B28, 0x2BB45A92, 0x5CB36A04,
5860 + 0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D,
5861 + 0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A,
5862 + 0x9C0906A9, 0xEB0E363F, 0x72076785, 0x05005713,
5863 + 0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38,
5864 + 0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21,
5865 + 0x86D3D2D4, 0xF1D4E242, 0x68DDB3F8, 0x1FDA836E,
5866 + 0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777,
5867 + 0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C,
5868 + 0x8F659EFF, 0xF862AE69, 0x616BFFD3, 0x166CCF45,
5869 + 0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2,
5870 + 0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB,
5871 + 0xAED16A4A, 0xD9D65ADC, 0x40DF0B66, 0x37D83BF0,
5872 + 0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9,
5873 + 0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6,
5874 + 0xBAD03605, 0xCDD70693, 0x54DE5729, 0x23D967BF,
5875 + 0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94,
5876 + 0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D
5877 +};
5878 +#endif // BCMTAG_USE
5879 +
5880 +
5881 +#endif // _BCMTAG_H_
5882 +
5883 diff -urN linux.old/arch/mips/bcm963xx/include/bcmtypes.h linux.dev/arch/mips/bcm963xx/include/bcmtypes.h
5884 --- linux.old/arch/mips/bcm963xx/include/bcmtypes.h 1970-01-01 01:00:00.000000000 +0100
5885 +++ linux.dev/arch/mips/bcm963xx/include/bcmtypes.h 2006-08-25 00:39:38.000000000 +0200
5886 @@ -0,0 +1,163 @@
5887 +/*
5888 +<:copyright-gpl
5889 + Copyright 2002 Broadcom Corp. All Rights Reserved.
5890 +
5891 + This program is free software; you can distribute it and/or modify it
5892 + under the terms of the GNU General Public License (Version 2) as
5893 + published by the Free Software Foundation.
5894 +
5895 + This program is distributed in the hope it will be useful, but WITHOUT
5896 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5897 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
5898 + for more details.
5899 +
5900 + You should have received a copy of the GNU General Public License along
5901 + with this program; if not, write to the Free Software Foundation, Inc.,
5902 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5903 +:>
5904 +*/
5905 +
5906 +//
5907 +// bcmtypes.h - misc useful typedefs
5908 +//
5909 +#ifndef BCMTYPES_H
5910 +#define BCMTYPES_H
5911 +
5912 +// These are also defined in typedefs.h in the application area, so I need to
5913 +// protect against re-definition.
5914 +
5915 +#ifndef _TYPEDEFS_H_
5916 +typedef unsigned char uint8;
5917 +typedef unsigned short uint16;
5918 +typedef unsigned long uint32;
5919 +typedef signed char int8;
5920 +typedef signed short int16;
5921 +typedef signed long int32;
5922 +#if !defined(__cplusplus)
5923 +typedef int bool;
5924 +#endif
5925 +#endif
5926 +
5927 +typedef unsigned char byte;
5928 +// typedef unsigned long sem_t;
5929 +
5930 +typedef unsigned long HANDLE,*PULONG,DWORD,*PDWORD;
5931 +typedef signed long LONG,*PLONG;
5932 +
5933 +typedef unsigned int *PUINT;
5934 +typedef signed int INT;
5935 +
5936 +typedef unsigned short *PUSHORT;
5937 +typedef signed short SHORT,*PSHORT;
5938 +typedef unsigned short WORD,*PWORD;
5939 +
5940 +typedef unsigned char *PUCHAR;
5941 +typedef signed char *PCHAR;
5942 +
5943 +typedef void *PVOID;
5944 +
5945 +typedef unsigned char BOOLEAN, *PBOOL, *PBOOLEAN;
5946 +
5947 +typedef unsigned char BYTE,*PBYTE;
5948 +
5949 +//#ifndef __GNUC__
5950 +//The following has been defined in Vxworks internally: vxTypesOld.h
5951 +//redefine under vxworks will cause error
5952 +typedef signed int *PINT;
5953 +
5954 +typedef signed char INT8;
5955 +typedef signed short INT16;
5956 +typedef signed long INT32;
5957 +
5958 +typedef unsigned char UINT8;
5959 +typedef unsigned short UINT16;
5960 +typedef unsigned long UINT32;
5961 +
5962 +typedef unsigned char UCHAR;
5963 +typedef unsigned short USHORT;
5964 +typedef unsigned int UINT;
5965 +typedef unsigned long ULONG;
5966 +
5967 +typedef void VOID;
5968 +typedef unsigned char BOOL;
5969 +
5970 +//#endif /* __GNUC__ */
5971 +
5972 +
5973 +// These are also defined in typedefs.h in the application area, so I need to
5974 +// protect against re-definition.
5975 +#ifndef TYPEDEFS_H
5976 +
5977 +// Maximum and minimum values for a signed 16 bit integer.
5978 +#define MAX_INT16 32767
5979 +#define MIN_INT16 -32768
5980 +
5981 +// Useful for true/false return values. This uses the
5982 +// Taligent notation (k for constant).
5983 +typedef enum
5984 +{
5985 + kFalse = 0,
5986 + kTrue = 1
5987 +} Bool;
5988 +
5989 +#endif
5990 +
5991 +/* macros to protect against unaligned accesses */
5992 +
5993 +#if 0
5994 +/* first arg is an address, second is a value */
5995 +#define PUT16( a, d ) { \
5996 + *((byte *)a) = (byte)((d)>>8); \
5997 + *(((byte *)a)+1) = (byte)(d); \
5998 +}
5999 +
6000 +#define PUT32( a, d ) { \
6001 + *((byte *)a) = (byte)((d)>>24); \
6002 + *(((byte *)a)+1) = (byte)((d)>>16); \
6003 + *(((byte *)a)+2) = (byte)((d)>>8); \
6004 + *(((byte *)a)+3) = (byte)(d); \
6005 +}
6006 +
6007 +/* first arg is an address, returns a value */
6008 +#define GET16( a ) ( \
6009 + (*((byte *)a) << 8) | \
6010 + (*(((byte *)a)+1)) \
6011 +)
6012 +
6013 +#define GET32( a ) ( \
6014 + (*((byte *)a) << 24) | \
6015 + (*(((byte *)a)+1) << 16) | \
6016 + (*(((byte *)a)+2) << 8) | \
6017 + (*(((byte *)a)+3)) \
6018 +)
6019 +#endif
6020 +
6021 +#ifndef YES
6022 +#define YES 1
6023 +#endif
6024 +
6025 +#ifndef NO
6026 +#define NO 0
6027 +#endif
6028 +
6029 +#ifndef IN
6030 +#define IN
6031 +#endif
6032 +
6033 +#ifndef OUT
6034 +#define OUT
6035 +#endif
6036 +
6037 +#ifndef TRUE
6038 +#define TRUE 1
6039 +#endif
6040 +
6041 +#ifndef FALSE
6042 +#define FALSE 0
6043 +#endif
6044 +
6045 +#define READ32(addr) (*(volatile UINT32 *)((ULONG)&addr))
6046 +#define READ16(addr) (*(volatile UINT16 *)((ULONG)&addr))
6047 +#define READ8(addr) (*(volatile UINT8 *)((ULONG)&addr))
6048 +
6049 +#endif
6050 diff -urN linux.old/arch/mips/bcm963xx/include/board.h linux.dev/arch/mips/bcm963xx/include/board.h
6051 --- linux.old/arch/mips/bcm963xx/include/board.h 1970-01-01 01:00:00.000000000 +0100
6052 +++ linux.dev/arch/mips/bcm963xx/include/board.h 2006-08-25 01:52:34.000000000 +0200
6053 @@ -0,0 +1,373 @@
6054 +/*
6055 +<:copyright-gpl
6056 + Copyright 2002 Broadcom Corp. All Rights Reserved.
6057 +
6058 + This program is free software; you can distribute it and/or modify it
6059 + under the terms of the GNU General Public License (Version 2) as
6060 + published by the Free Software Foundation.
6061 +
6062 + This program is distributed in the hope it will be useful, but WITHOUT
6063 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6064 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
6065 + for more details.
6066 +
6067 + You should have received a copy of the GNU General Public License along
6068 + with this program; if not, write to the Free Software Foundation, Inc.,
6069 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6070 +:>
6071 +*/
6072 +/***********************************************************************/
6073 +/* */
6074 +/* MODULE: board.h */
6075 +/* DATE: 97/02/18 */
6076 +/* PURPOSE: Board specific information. This module should include */
6077 +/* all base device addresses and board specific macros. */
6078 +/* */
6079 +/***********************************************************************/
6080 +#ifndef _BOARD_H
6081 +#define _BOARD_H
6082 +
6083 +/*****************************************************************************/
6084 +/* Misc board definitions */
6085 +/*****************************************************************************/
6086 +
6087 +#define DYING_GASP_API
6088 +
6089 +/*****************************************************************************/
6090 +/* Physical Memory Map */
6091 +/*****************************************************************************/
6092 +
6093 +#define PHYS_DRAM_BASE 0x00000000 /* Dynamic RAM Base */
6094 +#define PHYS_FLASH_BASE 0x1FC00000 /* Flash Memory */
6095 +
6096 +/*****************************************************************************/
6097 +/* Note that the addresses above are physical addresses and that programs */
6098 +/* have to use converted addresses defined below: */
6099 +/*****************************************************************************/
6100 +#define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
6101 +#define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
6102 +#define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
6103 +
6104 +/*****************************************************************************/
6105 +/* Select the PLL value to get the desired CPU clock frequency. */
6106 +/* */
6107 +/* */
6108 +/*****************************************************************************/
6109 +#define FPERIPH 50000000
6110 +
6111 +#define ONEK 1024
6112 +#define BLK64K (64*ONEK)
6113 +#define FLASH45_BLKS_BOOT_ROM 1
6114 +#define FLASH45_LENGTH_BOOT_ROM (FLASH45_BLKS_BOOT_ROM * BLK64K)
6115 +#define FLASH_RESERVED_AT_END (64*ONEK) /*reserved for PSI, scratch pad*/
6116 +
6117 +/*****************************************************************************/
6118 +/* Note that the addresses above are physical addresses and that programs */
6119 +/* have to use converted addresses defined below: */
6120 +/*****************************************************************************/
6121 +#define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
6122 +#define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
6123 +#define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
6124 +
6125 +/*****************************************************************************/
6126 +/* Select the PLL value to get the desired CPU clock frequency. */
6127 +/* */
6128 +/* */
6129 +/*****************************************************************************/
6130 +#define FPERIPH 50000000
6131 +
6132 +#define SDRAM_TYPE_ADDRESS_OFFSET 16
6133 +#define NVRAM_DATA_OFFSET 0x0580
6134 +#define NVRAM_DATA_ID 0x0f1e2d3c
6135 +#define BOARD_SDRAM_TYPE *(unsigned long *) \
6136 + (FLASH_BASE + SDRAM_TYPE_ADDRESS_OFFSET)
6137 +
6138 +#define ONEK 1024
6139 +#define BLK64K (64*ONEK)
6140 +
6141 +// nvram and psi flash definitions for 45
6142 +#define FLASH45_LENGTH_NVRAM ONEK // 1k nvram
6143 +#define NVRAM_PSI_DEFAULT 24 // default psi in K byes
6144 +
6145 +/*****************************************************************************/
6146 +/* NVRAM Offset and definition */
6147 +/*****************************************************************************/
6148 +
6149 +#define NVRAM_VERSION_NUMBER 2
6150 +#define NVRAM_VERSION_NUMBER_ADDRESS 0
6151 +
6152 +#define NVRAM_BOOTLINE_LEN 256
6153 +#define NVRAM_BOARD_ID_STRING_LEN 16
6154 +#define NVRAM_MAC_ADDRESS_LEN 6
6155 +#define NVRAM_MAC_COUNT_MAX 32
6156 +
6157 +/*****************************************************************************/
6158 +/* Misc Offsets */
6159 +/*****************************************************************************/
6160 +
6161 +#define CFE_VERSION_OFFSET 0x0570
6162 +#define CFE_VERSION_MARK_SIZE 5
6163 +#define CFE_VERSION_SIZE 5
6164 +
6165 +typedef struct
6166 +{
6167 + unsigned long ulVersion;
6168 + char szBootline[NVRAM_BOOTLINE_LEN];
6169 + char szBoardId[NVRAM_BOARD_ID_STRING_LEN];
6170 + unsigned long ulReserved1[2];
6171 + unsigned long ulNumMacAddrs;
6172 + unsigned char ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
6173 + char chReserved[2];
6174 + unsigned long ulCheckSum;
6175 +} NVRAM_DATA, *PNVRAM_DATA;
6176 +
6177 +
6178 +/*****************************************************************************/
6179 +/* board ioctl calls for flash, led and some other utilities */
6180 +/*****************************************************************************/
6181 +
6182 +
6183 +/* Defines. for board driver */
6184 +#define BOARD_IOCTL_MAGIC 'B'
6185 +#define BOARD_DRV_MAJOR 206
6186 +
6187 +#define MAC_ADDRESS_ANY (unsigned long) -1
6188 +
6189 +#define BOARD_IOCTL_FLASH_INIT \
6190 + _IOWR(BOARD_IOCTL_MAGIC, 0, BOARD_IOCTL_PARMS)
6191 +
6192 +#define BOARD_IOCTL_FLASH_WRITE \
6193 + _IOWR(BOARD_IOCTL_MAGIC, 1, BOARD_IOCTL_PARMS)
6194 +
6195 +#define BOARD_IOCTL_FLASH_READ \
6196 + _IOWR(BOARD_IOCTL_MAGIC, 2, BOARD_IOCTL_PARMS)
6197 +
6198 +#define BOARD_IOCTL_GET_NR_PAGES \
6199 + _IOWR(BOARD_IOCTL_MAGIC, 3, BOARD_IOCTL_PARMS)
6200 +
6201 +#define BOARD_IOCTL_DUMP_ADDR \
6202 + _IOWR(BOARD_IOCTL_MAGIC, 4, BOARD_IOCTL_PARMS)
6203 +
6204 +#define BOARD_IOCTL_SET_MEMORY \
6205 + _IOWR(BOARD_IOCTL_MAGIC, 5, BOARD_IOCTL_PARMS)
6206 +
6207 +#define BOARD_IOCTL_MIPS_SOFT_RESET \
6208 + _IOWR(BOARD_IOCTL_MAGIC, 6, BOARD_IOCTL_PARMS)
6209 +
6210 +#define BOARD_IOCTL_LED_CTRL \
6211 + _IOWR(BOARD_IOCTL_MAGIC, 7, BOARD_IOCTL_PARMS)
6212 +
6213 +#define BOARD_IOCTL_GET_ID \
6214 + _IOWR(BOARD_IOCTL_MAGIC, 8, BOARD_IOCTL_PARMS)
6215 +
6216 +#define BOARD_IOCTL_GET_MAC_ADDRESS \
6217 + _IOWR(BOARD_IOCTL_MAGIC, 9, BOARD_IOCTL_PARMS)
6218 +
6219 +#define BOARD_IOCTL_RELEASE_MAC_ADDRESS \
6220 + _IOWR(BOARD_IOCTL_MAGIC, 10, BOARD_IOCTL_PARMS)
6221 +
6222 +#define BOARD_IOCTL_GET_PSI_SIZE \
6223 + _IOWR(BOARD_IOCTL_MAGIC, 11, BOARD_IOCTL_PARMS)
6224 +
6225 +#define BOARD_IOCTL_GET_SDRAM_SIZE \
6226 + _IOWR(BOARD_IOCTL_MAGIC, 12, BOARD_IOCTL_PARMS)
6227 +
6228 +#define BOARD_IOCTL_SET_MONITOR_FD \
6229 + _IOWR(BOARD_IOCTL_MAGIC, 13, BOARD_IOCTL_PARMS)
6230 +
6231 +#define BOARD_IOCTL_WAKEUP_MONITOR_TASK \
6232 + _IOWR(BOARD_IOCTL_MAGIC, 14, BOARD_IOCTL_PARMS)
6233 +
6234 +#define BOARD_IOCTL_GET_BOOTLINE \
6235 + _IOWR(BOARD_IOCTL_MAGIC, 15, BOARD_IOCTL_PARMS)
6236 +
6237 +#define BOARD_IOCTL_SET_BOOTLINE \
6238 + _IOWR(BOARD_IOCTL_MAGIC, 16, BOARD_IOCTL_PARMS)
6239 +
6240 +#define BOARD_IOCTL_GET_BASE_MAC_ADDRESS \
6241 + _IOWR(BOARD_IOCTL_MAGIC, 17, BOARD_IOCTL_PARMS)
6242 +
6243 +#define BOARD_IOCTL_GET_CHIP_ID \
6244 + _IOWR(BOARD_IOCTL_MAGIC, 18, BOARD_IOCTL_PARMS)
6245 +
6246 +#define BOARD_IOCTL_GET_NUM_ENET \
6247 + _IOWR(BOARD_IOCTL_MAGIC, 19, BOARD_IOCTL_PARMS)
6248 +
6249 +#define BOARD_IOCTL_GET_CFE_VER \
6250 + _IOWR(BOARD_IOCTL_MAGIC, 20, BOARD_IOCTL_PARMS)
6251 +
6252 +#define BOARD_IOCTL_GET_ENET_CFG \
6253 + _IOWR(BOARD_IOCTL_MAGIC, 21, BOARD_IOCTL_PARMS)
6254 +
6255 +#define BOARD_IOCTL_GET_WLAN_ANT_INUSE \
6256 + _IOWR(BOARD_IOCTL_MAGIC, 22, BOARD_IOCTL_PARMS)
6257 +
6258 +#define BOARD_IOCTL_SET_TRIGGER_EVENT \
6259 + _IOWR(BOARD_IOCTL_MAGIC, 23, BOARD_IOCTL_PARMS)
6260 +
6261 +#define BOARD_IOCTL_GET_TRIGGER_EVENT \
6262 + _IOWR(BOARD_IOCTL_MAGIC, 24, BOARD_IOCTL_PARMS)
6263 +
6264 +#define BOARD_IOCTL_UNSET_TRIGGER_EVENT \
6265 + _IOWR(BOARD_IOCTL_MAGIC, 25, BOARD_IOCTL_PARMS)
6266 +
6267 +#define BOARD_IOCTL_SET_SES_LED \
6268 + _IOWR(BOARD_IOCTL_MAGIC, 26, BOARD_IOCTL_PARMS)
6269 +
6270 +//<<JUNHON, 2004/09/15, get reset button status , tim hou , 05/04/12
6271 +#define RESET_BUTTON_UP 1
6272 +#define RESET_BUTTON_PRESSDOWN 0
6273 +#define BOARD_IOCTL_GET_RESETHOLD \
6274 + _IOWR(BOARD_IOCTL_MAGIC, 27, BOARD_IOCTL_PARMS)
6275 +//>>JUNHON, 2004/09/15
6276 +
6277 +// for the action in BOARD_IOCTL_PARMS for flash operation
6278 +typedef enum
6279 +{
6280 + PERSISTENT,
6281 + NVRAM,
6282 + BCM_IMAGE_CFE,
6283 + BCM_IMAGE_FS,
6284 + BCM_IMAGE_KERNEL,
6285 + BCM_IMAGE_WHOLE,
6286 + SCRATCH_PAD,
6287 + FLASH_SIZE,
6288 +} BOARD_IOCTL_ACTION;
6289 +
6290 +
6291 +typedef struct boardIoctParms
6292 +{
6293 + char *string;
6294 + char *buf;
6295 + int strLen;
6296 + int offset;
6297 + BOARD_IOCTL_ACTION action; /* flash read/write: nvram, persistent, bcm image */
6298 + int result;
6299 +} BOARD_IOCTL_PARMS;
6300 +
6301 +
6302 +// LED defines
6303 +typedef enum
6304 +{
6305 + kLedAdsl,
6306 + kLedWireless,
6307 + kLedUsb,
6308 + kLedHpna,
6309 + kLedWanData,
6310 + kLedPPP,
6311 + kLedVoip,
6312 + kLedSes,
6313 + kLedLan,
6314 + kLedSelfTest,
6315 + kLedEnd, // NOTE: Insert the new led name before this one. Alway stay at the end.
6316 +} BOARD_LED_NAME;
6317 +
6318 +typedef enum
6319 +{
6320 + kLedStateOff, /* turn led off */
6321 + kLedStateOn, /* turn led on */
6322 + kLedStateFail, /* turn led on red */
6323 + kLedStateBlinkOnce, /* blink once, ~100ms and ignore the same call during the 100ms period */
6324 + kLedStateSlowBlinkContinues, /* slow blink continues at ~600ms interval */
6325 + kLedStateFastBlinkContinues, /* fast blink continues at ~200ms interval */
6326 +} BOARD_LED_STATE;
6327 +
6328 +
6329 +// virtual and physical map pair defined in board.c
6330 +typedef struct ledmappair
6331 +{
6332 + BOARD_LED_NAME ledName; // virtual led name
6333 + BOARD_LED_STATE ledInitState; // initial led state when the board boots.
6334 + unsigned short ledMask; // physical GPIO pin mask
6335 + unsigned short ledActiveLow; // reset bit to turn on LED
6336 + unsigned short ledMaskFail; // physical GPIO pin mask for state failure
6337 + unsigned short ledActiveLowFail;// reset bit to turn on LED
6338 +} LED_MAP_PAIR, *PLED_MAP_PAIR;
6339 +
6340 +typedef void (*HANDLE_LED_FUNC)(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState);
6341 +
6342 +/* Flash storage address information that is determined by the flash driver. */
6343 +typedef struct flashaddrinfo
6344 +{
6345 + int flash_persistent_start_blk;
6346 + int flash_persistent_number_blk;
6347 + int flash_persistent_length;
6348 + unsigned long flash_persistent_blk_offset;
6349 + int flash_scratch_pad_start_blk; // start before psi (SP_BUF_LEN)
6350 + int flash_scratch_pad_number_blk;
6351 + int flash_scratch_pad_length;
6352 + unsigned long flash_scratch_pad_blk_offset;
6353 + int flash_nvram_start_blk;
6354 + int flash_nvram_number_blk;
6355 + int flash_nvram_length;
6356 + unsigned long flash_nvram_blk_offset;
6357 +} FLASH_ADDR_INFO, *PFLASH_ADDR_INFO;
6358 +
6359 +// scratch pad defines
6360 +/* SP - Persisten Scratch Pad format:
6361 + sp header : 32 bytes
6362 + tokenId-1 : 8 bytes
6363 + tokenId-1 len : 4 bytes
6364 + tokenId-1 data
6365 + ....
6366 + tokenId-n : 8 bytes
6367 + tokenId-n len : 4 bytes
6368 + tokenId-n data
6369 +*/
6370 +
6371 +#define MAGIC_NUM_LEN 8
6372 +#define MAGIC_NUMBER "gOGoBrCm"
6373 +#define TOKEN_NAME_LEN 16
6374 +#define SP_VERSION 1
6375 +#define SP_MAX_LEN 8 * 1024 // 8k buf before psi
6376 +#define SP_RESERVERD 16
6377 +
6378 +typedef struct _SP_HEADER
6379 +{
6380 + char SPMagicNum[MAGIC_NUM_LEN]; // 8 bytes of magic number
6381 + int SPVersion; // version number
6382 + int SPUsedLen; // used sp len
6383 + char SPReserved[SP_RESERVERD]; // reservied, total 32 bytes
6384 +} SP_HEADER, *PSP_HEADER;
6385 +
6386 +typedef struct _TOKEN_DEF
6387 +{
6388 + char tokenName[TOKEN_NAME_LEN];
6389 + int tokenLen;
6390 +} SP_TOKEN, *PSP_TOKEN;
6391 +
6392 +
6393 +/*****************************************************************************/
6394 +/* Function Prototypes */
6395 +/*****************************************************************************/
6396 +#if !defined(__ASM_ASM_H)
6397 +void dumpaddr( unsigned char *pAddr, int nLen );
6398 +
6399 +int kerSysNvRamGet(char *string, int strLen, int offset);
6400 +int kerSysNvRamSet(char *string, int strLen, int offset);
6401 +int kerSysPersistentGet(char *string, int strLen, int offset);
6402 +int kerSysPersistentSet(char *string, int strLen, int offset);
6403 +int kerSysScratchPadGet(char *tokName, char *tokBuf, int tokLen);
6404 +int kerSysScratchPadSet(char *tokName, char *tokBuf, int tokLen);
6405 +int kerSysBcmImageSet( int flash_start_addr, char *string, int size);
6406 +int kerSysGetMacAddress( unsigned char *pucaAddr, unsigned long ulId );
6407 +int kerSysReleaseMacAddress( unsigned char *pucaAddr );
6408 +int kerSysGetSdramSize( void );
6409 +void kerSysGetBootline(char *string, int strLen);
6410 +void kerSysSetBootline(char *string, int strLen);
6411 +void kerSysMipsSoftReset(void);
6412 +void kerSysLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
6413 +void kerSysLedRegisterHwHandler( BOARD_LED_NAME, HANDLE_LED_FUNC, int );
6414 +int kerSysFlashSizeGet(void);
6415 +void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context);
6416 +void kerSysDeregisterDyingGaspHandler(char *devname);
6417 +void kerSysWakeupMonitorTask( void );
6418 +#endif
6419 +
6420 +#define BOOT_CFE 0
6421 +#define BOOT_REDBOOT 1
6422 +
6423 +extern int boot_loader_type;
6424 +
6425 +#endif /* _BOARD_H */
6426 +
6427 diff -urN linux.old/arch/mips/bcm963xx/int-handler.S linux.dev/arch/mips/bcm963xx/int-handler.S
6428 --- linux.old/arch/mips/bcm963xx/int-handler.S 1970-01-01 01:00:00.000000000 +0100
6429 +++ linux.dev/arch/mips/bcm963xx/int-handler.S 2006-08-25 02:13:33.000000000 +0200
6430 @@ -0,0 +1,59 @@
6431 +/*
6432 +<:copyright-gpl
6433 + Copyright 2002 Broadcom Corp. All Rights Reserved.
6434 +
6435 + This program is free software; you can distribute it and/or modify it
6436 + under the terms of the GNU General Public License (Version 2) as
6437 + published by the Free Software Foundation.
6438 +
6439 + This program is distributed in the hope it will be useful, but WITHOUT
6440 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6441 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
6442 + for more details.
6443 +
6444 + You should have received a copy of the GNU General Public License along
6445 + with this program; if not, write to the Free Software Foundation, Inc.,
6446 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6447 +:>
6448 +*/
6449 +/*
6450 + * Generic interrupt handler for Broadcom MIPS boards
6451 + */
6452 +
6453 +#include <linux/config.h>
6454 +
6455 +#include <asm/asm.h>
6456 +#include <asm/mipsregs.h>
6457 +#include <asm/regdef.h>
6458 +#include <asm/stackframe.h>
6459 +
6460 +/*
6461 + * MIPS IRQ Source
6462 + * -------- ------
6463 + * 0 Software (ignored)
6464 + * 1 Software (ignored)
6465 + * 2 Combined hardware interrupt (hw0)
6466 + * 3 Hardware
6467 + * 4 Hardware
6468 + * 5 Hardware
6469 + * 6 Hardware
6470 + * 7 R4k timer
6471 + */
6472 +
6473 + .text
6474 + .set noreorder
6475 + .set noat
6476 + .align 5
6477 + NESTED(brcmIRQ, PT_SIZE, sp)
6478 + SAVE_ALL
6479 + CLI
6480 + .set noreorder
6481 + .set at
6482 +
6483 + jal plat_irq_dispatch
6484 + move a0, sp
6485 +
6486 + j ret_from_irq
6487 + nop
6488 +
6489 + END(brcmIRQ)
6490 diff -urN linux.old/arch/mips/bcm963xx/irq.c linux.dev/arch/mips/bcm963xx/irq.c
6491 --- linux.old/arch/mips/bcm963xx/irq.c 1970-01-01 01:00:00.000000000 +0100
6492 +++ linux.dev/arch/mips/bcm963xx/irq.c 2006-08-25 03:54:34.000000000 +0200
6493 @@ -0,0 +1,256 @@
6494 +/*
6495 +<:copyright-gpl
6496 + Copyright 2002 Broadcom Corp. All Rights Reserved.
6497 +
6498 + This program is free software; you can distribute it and/or modify it
6499 + under the terms of the GNU General Public License (Version 2) as
6500 + published by the Free Software Foundation.
6501 +
6502 + This program is distributed in the hope it will be useful, but WITHOUT
6503 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6504 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
6505 + for more details.
6506 +
6507 + You should have received a copy of the GNU General Public License along
6508 + with this program; if not, write to the Free Software Foundation, Inc.,
6509 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6510 +:>
6511 +*/
6512 +/*
6513 + * Interrupt control functions for Broadcom 963xx MIPS boards
6514 + */
6515 +
6516 +#include <asm/atomic.h>
6517 +
6518 +#include <linux/delay.h>
6519 +#include <linux/init.h>
6520 +#include <linux/ioport.h>
6521 +#include <linux/irq.h>
6522 +#include <linux/interrupt.h>
6523 +#include <linux/kernel.h>
6524 +#include <linux/slab.h>
6525 +#include <linux/module.h>
6526 +
6527 +#include <asm/irq.h>
6528 +#include <asm/mipsregs.h>
6529 +#include <asm/addrspace.h>
6530 +#include <asm/signal.h>
6531 +#include <bcm_map_part.h>
6532 +#include <bcm_intr.h>
6533 +
6534 +static void irq_dispatch_int(struct pt_regs *regs)
6535 +{
6536 + unsigned int pendingIrqs;
6537 + static unsigned int irqBit;
6538 + static unsigned int isrNumber = 31;
6539 +
6540 + pendingIrqs = PERF->IrqStatus & PERF->IrqMask;
6541 + if (!pendingIrqs) {
6542 + return;
6543 + }
6544 +
6545 + while (1) {
6546 + irqBit <<= 1;
6547 + isrNumber++;
6548 + if (isrNumber == 32) {
6549 + isrNumber = 0;
6550 + irqBit = 0x1;
6551 + }
6552 + if (pendingIrqs & irqBit) {
6553 + PERF->IrqMask &= ~irqBit; // mask
6554 + do_IRQ(isrNumber + INTERNAL_ISR_TABLE_OFFSET, regs);
6555 + break;
6556 + }
6557 + }
6558 +}
6559 +
6560 +static void irq_dispatch_ext(uint32 irq, struct pt_regs *regs)
6561 +{
6562 + if (!(PERF->ExtIrqCfg & (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)))) {
6563 + printk("**** Ext IRQ mask. Should not dispatch ****\n");
6564 + }
6565 + /* disable and clear interrupt in the controller */
6566 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
6567 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
6568 + do_IRQ(irq, regs);
6569 +}
6570 +
6571 +
6572 +extern void brcm_timer_interrupt(struct pt_regs *regs);
6573 +
6574 +asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
6575 +{
6576 + u32 cause;
6577 + while((cause = (read_c0_cause()& CAUSEF_IP))) {
6578 + if (cause & CAUSEF_IP7)
6579 + brcm_timer_interrupt(regs);
6580 + else if (cause & CAUSEF_IP2)
6581 + irq_dispatch_int(regs);
6582 + else if (cause & CAUSEF_IP3)
6583 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_0, regs);
6584 + else if (cause & CAUSEF_IP4)
6585 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_1, regs);
6586 + else if (cause & CAUSEF_IP5)
6587 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_2, regs);
6588 + else if (cause & CAUSEF_IP6)
6589 + irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_3, regs);
6590 + local_irq_disable();
6591 + }
6592 +}
6593 +
6594 +
6595 +void enable_brcm_irq(unsigned int irq)
6596 +{
6597 + unsigned long flags;
6598 +
6599 + local_irq_save(flags);
6600 + if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
6601 + PERF->IrqMask |= (1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
6602 + }
6603 + else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
6604 + /* enable and clear interrupt in the controller */
6605 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
6606 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
6607 + }
6608 + local_irq_restore(flags);
6609 +}
6610 +
6611 +void disable_brcm_irq(unsigned int irq)
6612 +{
6613 + unsigned long flags;
6614 +
6615 + local_irq_save(flags);
6616 + if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
6617 + PERF->IrqMask &= ~(1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
6618 + }
6619 + else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
6620 + /* disable interrupt in the controller */
6621 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
6622 + }
6623 + local_irq_restore(flags);
6624 +}
6625 +
6626 +void ack_brcm_irq(unsigned int irq)
6627 +{
6628 + /* Already done in brcm_irq_dispatch */
6629 +}
6630 +
6631 +unsigned int startup_brcm_irq(unsigned int irq)
6632 +{
6633 + enable_brcm_irq(irq);
6634 +
6635 + return 0; /* never anything pending */
6636 +}
6637 +
6638 +unsigned int startup_brcm_none(unsigned int irq)
6639 +{
6640 + return 0;
6641 +}
6642 +
6643 +void end_brcm_irq(unsigned int irq)
6644 +{
6645 + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
6646 + enable_brcm_irq(irq);
6647 +}
6648 +
6649 +void end_brcm_none(unsigned int irq)
6650 +{
6651 +}
6652 +
6653 +static struct hw_interrupt_type brcm_irq_type = {
6654 + .typename = "MIPS",
6655 + .startup = startup_brcm_irq,
6656 + .shutdown = disable_brcm_irq,
6657 + .enable = enable_brcm_irq,
6658 + .disable = disable_brcm_irq,
6659 + .ack = ack_brcm_irq,
6660 + .end = end_brcm_irq,
6661 + .set_affinity = NULL
6662 +};
6663 +
6664 +static struct hw_interrupt_type brcm_irq_no_end_type = {
6665 + .typename = "MIPS",
6666 + .startup = startup_brcm_none,
6667 + .shutdown = disable_brcm_irq,
6668 + .enable = enable_brcm_irq,
6669 + .disable = disable_brcm_irq,
6670 + .ack = ack_brcm_irq,
6671 + .end = end_brcm_none,
6672 + .set_affinity = NULL
6673 +};
6674 +
6675 +void __init arch_init_irq(void)
6676 +{
6677 + int i;
6678 +
6679 + clear_c0_status(ST0_BEV);
6680 + change_c0_status(ST0_IM, (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4));
6681 +
6682 + for (i = 0; i < NR_IRQS; i++) {
6683 + irq_desc[i].status = IRQ_DISABLED;
6684 + irq_desc[i].action = 0;
6685 + irq_desc[i].depth = 1;
6686 + irq_desc[i].handler = &brcm_irq_type;
6687 + }
6688 +}
6689 +
6690 +int request_external_irq(unsigned int irq,
6691 + FN_HANDLER handler,
6692 + unsigned long irqflags,
6693 + const char * devname,
6694 + void *dev_id)
6695 +{
6696 + unsigned long flags;
6697 +
6698 + local_irq_save(flags);
6699 +
6700 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT)); // Clear
6701 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)); // Mask
6702 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_INSENS_SHFT)); // Edge insesnsitive
6703 + PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_LEVEL_SHFT)); // Level triggered
6704 + PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_SENSE_SHFT)); // Low level
6705 +
6706 + local_irq_restore(flags);
6707 +
6708 + return( request_irq(irq, handler, irqflags, devname, dev_id) );
6709 +}
6710 +
6711 +/* VxWorks compatibility function(s). */
6712 +
6713 +unsigned int BcmHalMapInterrupt(FN_HANDLER pfunc, unsigned int param,
6714 + unsigned int interruptId)
6715 +{
6716 + int nRet = -1;
6717 + char *devname;
6718 +
6719 + devname = kmalloc(16, GFP_KERNEL);
6720 + if (devname)
6721 + sprintf( devname, "brcm_%d", interruptId );
6722 +
6723 + /* Set the IRQ description to not automatically enable the interrupt at
6724 + * the end of an ISR. The driver that handles the interrupt must
6725 + * explicitly call BcmHalInterruptEnable or enable_brcm_irq. This behavior
6726 + * is consistent with interrupt handling on VxWorks.
6727 + */
6728 + irq_desc[interruptId].handler = &brcm_irq_no_end_type;
6729 +
6730 + if( interruptId >= INTERNAL_ISR_TABLE_OFFSET )
6731 + {
6732 + nRet = request_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT,
6733 + devname, (void *) param );
6734 + }
6735 + else if (interruptId >= INTERRUPT_ID_EXTERNAL_0 && interruptId <= INTERRUPT_ID_EXTERNAL_3)
6736 + {
6737 + nRet = request_external_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT,
6738 + devname, (void *) param );
6739 + }
6740 +
6741 + return( nRet );
6742 +}
6743 +
6744 +
6745 +EXPORT_SYMBOL(enable_brcm_irq);
6746 +EXPORT_SYMBOL(disable_brcm_irq);
6747 +EXPORT_SYMBOL(request_external_irq);
6748 +EXPORT_SYMBOL(BcmHalMapInterrupt);
6749 +
6750 diff -urN linux.old/arch/mips/bcm963xx/Kconfig linux.dev/arch/mips/bcm963xx/Kconfig
6751 --- linux.old/arch/mips/bcm963xx/Kconfig 1970-01-01 01:00:00.000000000 +0100
6752 +++ linux.dev/arch/mips/bcm963xx/Kconfig 2006-08-25 01:22:39.000000000 +0200
6753 @@ -0,0 +1,138 @@
6754 +# Kernel and Driver configuration for Broadcom Commengine ADSL board
6755 +choice
6756 + prompt "Broadcom Commengine ADSL board"
6757 + depends on MIPS_BRCM
6758 + default BCM96345
6759 + help
6760 + Select different Broadcom ADSL board
6761 +
6762 +config BCM96338
6763 + bool "96338 ADSL board"
6764 + select DMA_NONCOHERENT
6765 + select HW_HAS_PCI
6766 +
6767 +config BCM96345
6768 + bool "96345 ADSL board"
6769 + select DMA_NONCOHERENT
6770 + select HW_HAS_PCI
6771 +
6772 +config BCM96348
6773 + bool "96348 ADSL board"
6774 + select DMA_NONCOHERENT
6775 + select HW_HAS_PCI
6776 +
6777 +endchoice
6778 +
6779 +config BCM_BOARD
6780 + bool "Support for Broadcom Board"
6781 + depends on BCM96338 || BCM96345 || BCM96348
6782 +
6783 +config BCM_SERIAL
6784 + bool "Support for Serial Port"
6785 + depends on BCM96338 || BCM96345 || BCM96348
6786 +
6787 +config BCM_ENET
6788 + tristate "Support for Ethernet"
6789 + depends on BCM96338 || BCM96345 || BCM96348
6790 +
6791 +config BCM_USB
6792 + tristate "Support for USB"
6793 + depends on BCM96338 || BCM96345 || BCM96348
6794 +
6795 +config BCM_WLAN
6796 + tristate "Support for Wireless"
6797 + depends on BCM96338 || BCM96345 || BCM96348
6798 +
6799 +config BCM_PCI
6800 + bool "Support for PCI"
6801 + depends on BCM96338 || BCM96345 || BCM96348
6802 + select PCI
6803 +
6804 +config BCM_ATMAPI
6805 + tristate "Support for ATM"
6806 + depends on BCM96338 || BCM96345 || BCM96348
6807 +
6808 +config BCM_ATMTEST
6809 + tristate "Support for ATM Diagnostic"
6810 + depends on BCM96338 || BCM96345 || BCM96348
6811 +
6812 +config BCM_ADSL
6813 + tristate "Support for ADSL"
6814 + depends on BCM96338 || BCM96345 || BCM96348
6815 +
6816 +config BCM_ENDPOINT
6817 + tristate "Support for VOICE"
6818 + depends on BCM96338 || BCM96345 || BCM96348
6819 +
6820 +config BCM_PROCFS
6821 + tristate "Support for PROCFS"
6822 + depends on BCM96338 || BCM96345 || BCM96348
6823 +
6824 +config BCM_VDSL
6825 + tristate "Support for VDSL"
6826 + depends on BCM96338 || BCM96345 || BCM96348
6827 +
6828 +config BCM_SECURITY
6829 + tristate "Support for SECURITY"
6830 + depends on BCM96338 || BCM96345 || BCM96348
6831 +
6832 +config BCM_HPNA
6833 + tristate "Support for HPNA"
6834 + depends on BCM96338 || BCM96345 || BCM96348
6835 +
6836 +config BCM_BOARD_IMPL
6837 + int "Implementation index for ADSL Board"
6838 + depends on BCM96338 || BCM96345 || BCM96348
6839 +
6840 +config BCM_SERIAL_IMPL
6841 + int "Implementation index for Serial"
6842 + depends on BCM96338 || BCM96345 || BCM96348
6843 +
6844 +config BCM_ENET_IMPL
6845 + int "Implementation index for Ethernet"
6846 + depends on BCM96338 || BCM96345 || BCM96348
6847 +
6848 +config BCM_USB_IMPL
6849 + int "Implementation index for USB"
6850 + depends on BCM96338 || BCM96345 || BCM96348
6851 +
6852 +config BCM_WLAN_IMPL
6853 + int "Implementation index for WIRELESS"
6854 + depends on BCM96338 || BCM96345 || BCM96348
6855 +
6856 +config BCM_ATMAPI_IMPL
6857 + int "Implementation index for ATM"
6858 + depends on BCM96338 || BCM96345 || BCM96348
6859 +
6860 +config BCM_ATMTEST_IMPL
6861 + int "Implementation index for ATM Diagnostic"
6862 + depends on BCM96338 || BCM96345 || BCM96348
6863 +
6864 +config BCM_BLAA_IMPL
6865 + int "Implementation index for BLAA"
6866 + depends on BCM96338 || BCM96345 || BCM96348
6867 +
6868 +config BCM_ADSL_IMPL
6869 + int "Implementation index for ADSL"
6870 + depends on BCM96338 || BCM96345 || BCM96348
6871 +
6872 +config BCM_ENDPOINT_IMPL
6873 + int "Implementation index for VOICE"
6874 + depends on BCM96338 || BCM96345 || BCM96348
6875 +
6876 +config BCM_PROCFS_IMPL
6877 + int "Implementation index for PROCFS"
6878 + depends on BCM96338 || BCM96345 || BCM96348
6879 +
6880 +config BCM_VDSL_IMPL
6881 + int "Implementation index for VDSL"
6882 + depends on BCM96338 || BCM96345 || BCM96348
6883 +
6884 +config BCM_SECURITY_IMPL
6885 + int "Implementation index for SECURITY"
6886 + depends on BCM96338 || BCM96345 || BCM96348
6887 +
6888 +config BCM_HPNA_IMPL
6889 + int "Implementation index for HPNA"
6890 + depends on BCM96338 || BCM96345 || BCM96348
6891 +
6892 diff -urN linux.old/arch/mips/bcm963xx/Makefile linux.dev/arch/mips/bcm963xx/Makefile
6893 --- linux.old/arch/mips/bcm963xx/Makefile 1970-01-01 01:00:00.000000000 +0100
6894 +++ linux.dev/arch/mips/bcm963xx/Makefile 2006-08-25 02:04:27.000000000 +0200
6895 @@ -0,0 +1,23 @@
6896 +#
6897 +# Makefile for generic Broadcom MIPS boards
6898 +#
6899 +# Copyright (C) 2004 Broadcom Corporation
6900 +#
6901 +obj-y := irq.o prom.o setup.o time.o ser_init.o bcm63xx_led.o board.o boardparms.o int-handler.o
6902 +
6903 +SRCBASE := $(TOPDIR)
6904 +EXTRA_CFLAGS += -I$(SRCBASE)/include
6905 +#EXTRA_CFLAGS += -I$(INC_ADSLDRV_PATH) -DDBG
6906 +EXTRA_CFLAGS += -I$(INC_ADSLDRV_PATH)
6907 +
6908 +
6909 +ifeq "$(ADSL)" "ANNEX_B"
6910 +EXTRA_CFLAGS += -DADSL_ANNEXB
6911 +endif
6912 +ifeq "$(ADSL)" "SADSL"
6913 +EXTRA_CFLAGS += -DADSL_SADSL
6914 +endif
6915 +ifeq "$(ADSL)" "ANNEX_C"
6916 +EXTRA_CFLAGS += -DADSL_ANNEXC
6917 +endif
6918 +
6919 diff -urN linux.old/arch/mips/bcm963xx/prom.c linux.dev/arch/mips/bcm963xx/prom.c
6920 --- linux.old/arch/mips/bcm963xx/prom.c 1970-01-01 01:00:00.000000000 +0100
6921 +++ linux.dev/arch/mips/bcm963xx/prom.c 2006-08-25 01:49:57.000000000 +0200
6922 @@ -0,0 +1,128 @@
6923 +/*
6924 +<:copyright-gpl
6925 + Copyright 2004 Broadcom Corp. All Rights Reserved.
6926 +
6927 + This program is free software; you can distribute it and/or modify it
6928 + under the terms of the GNU General Public License (Version 2) as
6929 + published by the Free Software Foundation.
6930 +
6931 + This program is distributed in the hope it will be useful, but WITHOUT
6932 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6933 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
6934 + for more details.
6935 +
6936 + You should have received a copy of the GNU General Public License along
6937 + with this program; if not, write to the Free Software Foundation, Inc.,
6938 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6939 +:>
6940 +*/
6941 +/*
6942 + * prom.c: PROM library initialization code.
6943 + *
6944 + */
6945 +#include <linux/init.h>
6946 +#include <linux/mm.h>
6947 +#include <linux/sched.h>
6948 +#include <linux/bootmem.h>
6949 +#include <linux/blkdev.h>
6950 +#include <asm/addrspace.h>
6951 +#include <asm/bootinfo.h>
6952 +#include <asm/cpu.h>
6953 +#include <asm/time.h>
6954 +
6955 +#include <bcm_map_part.h>
6956 +#include <board.h>
6957 +#include "boardparms.h"
6958 +#include "softdsl/AdslCoreDefs.h"
6959 +
6960 +
6961 +//char arcs_cmdline[CL_SIZE] __initdata = {0};
6962 +/* inv_xde */
6963 +int boot_loader_type;
6964 +
6965 +extern int do_syslog(int, char *, int);
6966 +extern void serial_init(void);
6967 +extern void __init InitNvramInfo( void );
6968 +extern void kerSysFlashInit( void );
6969 +extern unsigned long get_nvram_start_addr(void);
6970 +void __init create_root_nfs_cmdline( char *cmdline );
6971 +
6972 +#define MACH_BCM MACH_BCM96348
6973 +
6974 +const char *get_system_type(void)
6975 +{
6976 + /*PNVRAM_DATA pNvramData = (PNVRAM_DATA) get_nvram_start_addr();
6977 +
6978 + return( pNvramData->szBoardId );*/
6979 + return "brcm63xx";
6980 +}
6981 +
6982 +unsigned long getMemorySize(void)
6983 +{
6984 + unsigned long ulSdramType = BOARD_SDRAM_TYPE;
6985 +
6986 + unsigned long ulSdramSize;
6987 +
6988 + switch( ulSdramType )
6989 + {
6990 + case BP_MEMORY_16MB_1_CHIP:
6991 + case BP_MEMORY_16MB_2_CHIP:
6992 + ulSdramSize = 16 * 1024 * 1024;
6993 + break;
6994 + case BP_MEMORY_32MB_1_CHIP:
6995 + case BP_MEMORY_32MB_2_CHIP:
6996 + ulSdramSize = 32 * 1024 * 1024;
6997 + break;
6998 + case BP_MEMORY_64MB_2_CHIP:
6999 + ulSdramSize = 64 * 1024 * 1024;
7000 + break;
7001 + default:
7002 + ulSdramSize = 8 * 1024 * 1024;
7003 + break;
7004 + }
7005 + if (boot_loader_type == BOOT_CFE)
7006 + return ulSdramSize;
7007 + else
7008 + // assume that there is one contiguous memory map
7009 + return boot_mem_map.map[0].size;
7010 +}
7011 +
7012 +/* --------------------------------------------------------------------------
7013 + Name: prom_init
7014 + -------------------------------------------------------------------------- */
7015 +void __init prom_init(void)
7016 +{
7017 + extern ulong r4k_interval;
7018 +
7019 + serial_init();
7020 +
7021 + /* Need to fixup boot loader detection code
7022 + * whithout changing prom_init prototype
7023 + */
7024 +
7025 + do_syslog(8, NULL, 8);
7026 +
7027 + printk( "%s prom init\n", get_system_type() );
7028 +
7029 + PERF->IrqMask = 0;
7030 +
7031 + arcs_cmdline[0] = '\0';
7032 +
7033 + if (boot_loader_type == BOOT_CFE)
7034 + add_memory_region(0, (getMemorySize() - ADSL_SDRAM_IMAGE_SIZE), BOOT_MEM_RAM);
7035 + else
7036 + add_memory_region(0, (0x01000000 - ADSL_SDRAM_IMAGE_SIZE), BOOT_MEM_RAM);
7037 +
7038 + mips_machgroup = MACH_GROUP_BRCM;
7039 + mips_machtype = MACH_BCM;
7040 +}
7041 +
7042 +/* --------------------------------------------------------------------------
7043 + Name: prom_free_prom_memory
7044 +Abstract:
7045 + -------------------------------------------------------------------------- */
7046 +void __init prom_free_prom_memory(void)
7047 +{
7048 +
7049 +}
7050 +
7051 diff -urN linux.old/arch/mips/bcm963xx/ser_init.c linux.dev/arch/mips/bcm963xx/ser_init.c
7052 --- linux.old/arch/mips/bcm963xx/ser_init.c 1970-01-01 01:00:00.000000000 +0100
7053 +++ linux.dev/arch/mips/bcm963xx/ser_init.c 2006-08-25 00:39:38.000000000 +0200
7054 @@ -0,0 +1,180 @@
7055 +/*
7056 +<:copyright-gpl
7057 + Copyright 2004 Broadcom Corp. All Rights Reserved.
7058 +
7059 + This program is free software; you can distribute it and/or modify it
7060 + under the terms of the GNU General Public License (Version 2) as
7061 + published by the Free Software Foundation.
7062 +
7063 + This program is distributed in the hope it will be useful, but WITHOUT
7064 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
7065 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
7066 + for more details.
7067 +
7068 + You should have received a copy of the GNU General Public License along
7069 + with this program; if not, write to the Free Software Foundation, Inc.,
7070 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
7071 +:>
7072 +*/
7073 +/*
7074 + * Broadcom bcm63xx serial port initialization, also prepare for printk
7075 + * by registering with console_init
7076 + *
7077 + */
7078 +
7079 +#include <linux/config.h>
7080 +#include <linux/init.h>
7081 +#include <linux/interrupt.h>
7082 +#include <linux/kernel.h>
7083 +#include <linux/types.h>
7084 +#include <linux/console.h>
7085 +#include <linux/sched.h>
7086 +
7087 +#include <asm/addrspace.h>
7088 +#include <asm/irq.h>
7089 +#include <asm/reboot.h>
7090 +#include <asm/gdb-stub.h>
7091 +#include <asm/mc146818rtc.h>
7092 +
7093 +#include <bcm_map_part.h>
7094 +#include <board.h>
7095 +
7096 +#define SER63XX_DEFAULT_BAUD 115200
7097 +#define BD_BCM63XX_TIMER_CLOCK_INPUT (FPERIPH)
7098 +#define stUart ((volatile Uart * const) UART_BASE)
7099 +
7100 +// Transmit interrupts
7101 +#define TXINT (TXFIFOEMT | TXUNDERR | TXOVFERR)
7102 +// Receive interrupts
7103 +#define RXINT (RXFIFONE | RXOVFERR)
7104 +
7105 +/* --------------------------------------------------------------------------
7106 + Name: serial_init
7107 + Purpose: Initalize the UART
7108 +-------------------------------------------------------------------------- */
7109 +void __init serial_init(void)
7110 +{
7111 + UINT32 tmpVal = SER63XX_DEFAULT_BAUD;
7112 + ULONG clockFreqHz;
7113 +
7114 +#if defined(CONFIG_BCM96345)
7115 + // Make sure clock is ticking
7116 + PERF->blkEnables |= UART_CLK_EN;
7117 +#endif
7118 +
7119 + /* Dissable channel's receiver and transmitter. */
7120 + stUart->control &= ~(BRGEN|TXEN|RXEN);
7121 +
7122 + /*--------------------------------------------------------------------*/
7123 + /* Write the table value to the clock select register. */
7124 + /* DPullen - this is the equation to use: */
7125 + /* value = clockFreqHz / baud / 32-1; */
7126 + /* (snmod) Actually you should also take into account any necessary */
7127 + /* rounding. Divide by 16, look at lsb, if 0, divide by 2 */
7128 + /* and subtract 1. If 1, just divide by 2 */
7129 + /*--------------------------------------------------------------------*/
7130 + clockFreqHz = BD_BCM63XX_TIMER_CLOCK_INPUT;
7131 + tmpVal = (clockFreqHz / tmpVal) / 16;
7132 + if( tmpVal & 0x01 )
7133 + tmpVal /= 2; //Rounding up, so sub is already accounted for
7134 + else
7135 + tmpVal = (tmpVal / 2) - 1; // Rounding down so we must sub 1
7136 + stUart->baudword = tmpVal;
7137 +
7138 + /* Finally, re-enable the transmitter and receiver. */
7139 + stUart->control |= (BRGEN|TXEN|RXEN);
7140 +
7141 + stUart->config = (BITS8SYM | ONESTOP);
7142 + // Set the FIFO interrupt depth ... stUart->fifocfg = 0xAA;
7143 + stUart->fifoctl = RSTTXFIFOS | RSTRXFIFOS;
7144 + stUart->intMask = 0;
7145 + stUart->intMask = RXINT | TXINT;
7146 +}
7147 +
7148 +
7149 +/* prom_putc()
7150 + * Output a character to the UART
7151 + */
7152 +void prom_putc(char c)
7153 +{
7154 + /* Wait for Tx uffer to empty */
7155 + while (! (READ16(stUart->intStatus) & TXFIFOEMT));
7156 + /* Send character */
7157 + stUart->Data = c;
7158 +}
7159 +
7160 +/* prom_puts()
7161 + * Write a string to the UART
7162 + */
7163 +void prom_puts(const char *s)
7164 +{
7165 + while (*s) {
7166 + if (*s == '\n') {
7167 + prom_putc('\r');
7168 + }
7169 + prom_putc(*s++);
7170 + }
7171 +}
7172 +
7173 +
7174 +/* prom_getc_nowait()
7175 + * Returns a character from the UART
7176 + * Returns -1 if no characters available or corrupted
7177 + */
7178 +int prom_getc_nowait(void)
7179 +{
7180 + uint16 uStatus;
7181 + int cData = -1;
7182 +
7183 + uStatus = READ16(stUart->intStatus);
7184 +
7185 + if (uStatus & RXFIFONE) { /* Do we have a character? */
7186 + cData = READ16(stUart->Data) & 0xff; /* Read character */
7187 + if (uStatus & (RXFRAMERR | RXPARERR)) { /* If we got an error, throw it away */
7188 + cData = -1;
7189 + }
7190 + }
7191 +
7192 + return cData;
7193 +}
7194 +
7195 +/* prom_getc()
7196 + * Returns a charcter from the serial port
7197 + * Will block until it receives a valid character
7198 +*/
7199 +char prom_getc(void)
7200 +{
7201 + int cData = -1;
7202 +
7203 + /* Loop until we get a valid character */
7204 + while(cData == -1) {
7205 + cData = prom_getc_nowait();
7206 + }
7207 + return (char) cData;
7208 +}
7209 +
7210 +/* prom_testc()
7211 + * Returns 0 if no characters available
7212 + */
7213 +int prom_testc(void)
7214 +{
7215 + uint16 uStatus;
7216 +
7217 + uStatus = READ16(stUart->intStatus);
7218 +
7219 + return (uStatus & RXFIFONE);
7220 +}
7221 +
7222 +#if defined (CONFIG_REMOTE_DEBUG)
7223 +/* Prevent other code from writing to the serial port */
7224 +void _putc(char c) { }
7225 +void _puts(const char *ptr) { }
7226 +#else
7227 +/* Low level outputs call prom routines */
7228 +void _putc(char c) {
7229 + prom_putc(c);
7230 +}
7231 +void _puts(const char *ptr) {
7232 + prom_puts(ptr);
7233 +}
7234 +#endif
7235 diff -urN linux.old/arch/mips/bcm963xx/setup.c linux.dev/arch/mips/bcm963xx/setup.c
7236 --- linux.old/arch/mips/bcm963xx/setup.c 1970-01-01 01:00:00.000000000 +0100
7237 +++ linux.dev/arch/mips/bcm963xx/setup.c 2006-08-25 02:26:58.000000000 +0200
7238 @@ -0,0 +1,525 @@
7239 +/*
7240 +<:copyright-gpl
7241 + Copyright 2002 Broadcom Corp. All Rights Reserved.
7242 +
7243 + This program is free software; you can distribute it and/or modify it
7244 + under the terms of the GNU General Public License (Version 2) as
7245 + published by the Free Software Foundation.
7246 +
7247 + This program is distributed in the hope it will be useful, but WITHOUT
7248 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
7249 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
7250 + for more details.
7251 +
7252 + You should have received a copy of the GNU General Public License along
7253 + with this program; if not, write to the Free Software Foundation, Inc.,
7254 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
7255 +:>
7256 +*/
7257 +/*
7258 + * Generic setup routines for Broadcom 963xx MIPS boards
7259 + */
7260 +
7261 +#include <linux/config.h>
7262 +#include <linux/init.h>
7263 +#include <linux/interrupt.h>
7264 +#include <linux/kernel.h>
7265 +#include <linux/kdev_t.h>
7266 +#include <linux/types.h>
7267 +#include <linux/console.h>
7268 +#include <linux/sched.h>
7269 +#include <linux/mm.h>
7270 +#include <linux/slab.h>
7271 +#include <linux/module.h>
7272 +#include <linux/pm.h>
7273 +
7274 +#include <asm/addrspace.h>
7275 +#include <asm/bcache.h>
7276 +#include <asm/irq.h>
7277 +#include <asm/time.h>
7278 +#include <asm/reboot.h>
7279 +#include <asm/gdb-stub.h>
7280 +
7281 +extern void brcm_time_init(void);
7282 +extern void brcm_timer_setup(struct irqaction *irq);
7283 +extern unsigned long getMemorySize(void);
7284 +
7285 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
7286 +#include <linux/pci.h>
7287 +#include <linux/delay.h>
7288 +#include <bcm_map_part.h>
7289 +#include <bcmpci.h>
7290 +
7291 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
7292 +#endif
7293 +
7294 +/* This function should be in a board specific directory. For now,
7295 + * assume that all boards that include this file use a Broadcom chip
7296 + * with a soft reset bit in the PLL control register.
7297 + */
7298 +static void brcm_machine_restart(char *command)
7299 +{
7300 + const unsigned long ulSoftReset = 0x00000001;
7301 + unsigned long *pulPllCtrl = (unsigned long *) 0xfffe0008;
7302 + *pulPllCtrl |= ulSoftReset;
7303 +}
7304 +
7305 +static void brcm_machine_halt(void)
7306 +{
7307 + printk("System halted\n");
7308 + while (1);
7309 +}
7310 +
7311 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
7312 +
7313 +static void mpi_SetLocalPciConfigReg(uint32 reg, uint32 value)
7314 +{
7315 + /* write index then value */
7316 + mpi->pcicfgcntrl = PCI_CFG_REG_WRITE_EN + reg;;
7317 + mpi->pcicfgdata = value;
7318 +}
7319 +
7320 +static uint32 mpi_GetLocalPciConfigReg(uint32 reg)
7321 +{
7322 + /* write index then get value */
7323 + mpi->pcicfgcntrl = PCI_CFG_REG_WRITE_EN + reg;;
7324 + return mpi->pcicfgdata;
7325 +}
7326 +
7327 +/*
7328 + * mpi_ResetPcCard: Set/Reset the PcCard
7329 + */
7330 +static void mpi_ResetPcCard(int cardtype, BOOL bReset)
7331 +{
7332 + if (cardtype == MPI_CARDTYPE_NONE) {
7333 + return;
7334 + }
7335 +
7336 + if (cardtype == MPI_CARDTYPE_CARDBUS) {
7337 + bReset = ! bReset;
7338 + }
7339 +
7340 + if (bReset) {
7341 + mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & ~PCCARD_CARD_RESET);
7342 + } else {
7343 + mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 | PCCARD_CARD_RESET);
7344 + }
7345 +}
7346 +
7347 +/*
7348 + * mpi_ConfigCs: Configure an MPI/EBI chip select
7349 + */
7350 +static void mpi_ConfigCs(uint32 cs, uint32 base, uint32 size, uint32 flags)
7351 +{
7352 + mpi->cs[cs].base = ((base & 0x1FFFFFFF) | size);
7353 + mpi->cs[cs].config = flags;
7354 +}
7355 +
7356 +/*
7357 + * mpi_InitPcmciaSpace
7358 + */
7359 +static void mpi_InitPcmciaSpace(void)
7360 +{
7361 + // ChipSelect 4 controls PCMCIA Memory accesses
7362 + mpi_ConfigCs(PCMCIA_COMMON_BASE, pcmciaMem, EBI_SIZE_1M, (EBI_WORD_WIDE|EBI_ENABLE));
7363 + // ChipSelect 5 controls PCMCIA Attribute accesses
7364 + mpi_ConfigCs(PCMCIA_ATTRIBUTE_BASE, pcmciaAttr, EBI_SIZE_1M, (EBI_WORD_WIDE|EBI_ENABLE));
7365 + // ChipSelect 6 controls PCMCIA I/O accesses
7366 + mpi_ConfigCs(PCMCIA_IO_BASE, pcmciaIo, EBI_SIZE_64K, (EBI_WORD_WIDE|EBI_ENABLE));
7367 +
7368 + mpi->pcmcia_cntl2 = ((PCMCIA_ATTR_ACTIVE << RW_ACTIVE_CNT_BIT) |
7369 + (PCMCIA_ATTR_INACTIVE << INACTIVE_CNT_BIT) |
7370 + (PCMCIA_ATTR_CE_SETUP << CE_SETUP_CNT_BIT) |
7371 + (PCMCIA_ATTR_CE_HOLD << CE_HOLD_CNT_BIT));
7372 +
7373 + mpi->pcmcia_cntl2 |= (PCMCIA_HALFWORD_EN | PCMCIA_BYTESWAP_DIS);
7374 +}
7375 +
7376 +/*
7377 + * cardtype_vcc_detect: PC Card's card detect and voltage sense connection
7378 + *
7379 + * CD1#/ CD2#/ VS1#/ VS2#/ Card Initial Vcc
7380 + * CCD1# CCD2# CVS1 CVS2 Type
7381 + *
7382 + * GND GND open open 16-bit 5 vdc
7383 + *
7384 + * GND GND GND open 16-bit 3.3 vdc
7385 + *
7386 + * GND GND open GND 16-bit x.x vdc
7387 + *
7388 + * GND GND GND GND 16-bit 3.3 & x.x vdc
7389 + *
7390 + *====================================================================
7391 + *
7392 + * CVS1 GND CCD1# open CardBus 3.3 vdc
7393 + *
7394 + * GND CVS2 open CCD2# CardBus x.x vdc
7395 + *
7396 + * GND CVS1 CCD2# open CardBus y.y vdc
7397 + *
7398 + * GND CVS2 GND CCD2# CardBus 3.3 & x.x vdc
7399 + *
7400 + * CVS2 GND open CCD1# CardBus x.x & y.y vdc
7401 + *
7402 + * GND CVS1 CCD2# open CardBus 3.3, x.x & y.y vdc
7403 + *
7404 + */
7405 +static int cardtype_vcc_detect(void)
7406 +{
7407 + uint32 data32;
7408 + int cardtype;
7409 +
7410 + cardtype = MPI_CARDTYPE_NONE;
7411 + mpi->pcmcia_cntl1 = 0x0000A000; // Turn on the output enables and drive
7412 + // the CVS pins to 0.
7413 + data32 = mpi->pcmcia_cntl1;
7414 + switch (data32 & 0x00000003) // Test CD1# and CD2#, see if card is plugged in.
7415 + {
7416 + case 0x00000003: // No Card is in the slot.
7417 + printk("mpi: No Card is in the PCMCIA slot\n");
7418 + break;
7419 +
7420 + case 0x00000002: // Partial insertion, No CD2#.
7421 + printk("mpi: Card in the PCMCIA slot partial insertion, no CD2 signal\n");
7422 + break;
7423 +
7424 + case 0x00000001: // Partial insertion, No CD1#.
7425 + printk("mpi: Card in the PCMCIA slot partial insertion, no CD1 signal\n");
7426 + break;
7427 +
7428 + case 0x00000000:
7429 + mpi->pcmcia_cntl1 = 0x0000A0C0; // Turn off the CVS output enables and
7430 + // float the CVS pins.
7431 + mdelay(1);
7432 + data32 = mpi->pcmcia_cntl1;
7433 + // Read the Register.
7434 + switch (data32 & 0x0000000C) // See what is on the CVS pins.
7435 + {
7436 + case 0x00000000: // CVS1 and CVS2 are tied to ground, only 1 option.
7437 + printk("mpi: Detected 3.3 & x.x 16-bit PCMCIA card\n");
7438 + cardtype = MPI_CARDTYPE_PCMCIA;
7439 + break;
7440 +
7441 + case 0x00000004: // CVS1 is open or tied to CCD1/CCD2 and CVS2 is tied to ground.
7442 + // 2 valid voltage options.
7443 + switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
7444 + {
7445 + case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
7446 + // This is not a valid combination.
7447 + printk("mpi: Unknown card plugged into slot\n");
7448 + break;
7449 +
7450 + case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
7451 + mpi->pcmcia_cntl1 = 0x0000A080; // Drive CVS1 to a 0.
7452 + mdelay(1);
7453 + data32 = mpi->pcmcia_cntl1;
7454 + if (data32 & 0x00000002) { // CCD2 is tied to CVS2, not valid.
7455 + printk("mpi: Unknown card plugged into slot\n");
7456 + } else { // CCD2 is tied to CVS1.
7457 + printk("mpi: Detected 3.3, x.x and y.y Cardbus card\n");
7458 + cardtype = MPI_CARDTYPE_CARDBUS;
7459 + }
7460 + break;
7461 +
7462 + case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
7463 + // This is not a valid combination.
7464 + printk("mpi: Unknown card plugged into slot\n");
7465 + break;
7466 +
7467 + case 0x00000000: // CCD1 and CCD2 are tied to ground.
7468 + printk("mpi: Detected x.x vdc 16-bit PCMCIA card\n");
7469 + cardtype = MPI_CARDTYPE_PCMCIA;
7470 + break;
7471 + }
7472 + break;
7473 +
7474 + case 0x00000008: // CVS2 is open or tied to CCD1/CCD2 and CVS1 is tied to ground.
7475 + // 2 valid voltage options.
7476 + switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
7477 + {
7478 + case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
7479 + // This is not a valid combination.
7480 + printk("mpi: Unknown card plugged into slot\n");
7481 + break;
7482 +
7483 + case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
7484 + mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
7485 + mdelay(1);
7486 + data32 = mpi->pcmcia_cntl1;
7487 + if (data32 & 0x00000002) { // CCD2 is tied to CVS1, not valid.
7488 + printk("mpi: Unknown card plugged into slot\n");
7489 + } else {// CCD2 is tied to CVS2.
7490 + printk("mpi: Detected 3.3 and x.x Cardbus card\n");
7491 + cardtype = MPI_CARDTYPE_CARDBUS;
7492 + }
7493 + break;
7494 +
7495 + case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
7496 + // This is not a valid combination.
7497 + printk("mpi: Unknown card plugged into slot\n");
7498 + break;
7499 +
7500 + case 0x00000000: // CCD1 and CCD2 are tied to ground.
7501 + cardtype = MPI_CARDTYPE_PCMCIA;
7502 + printk("mpi: Detected 3.3 vdc 16-bit PCMCIA card\n");
7503 + break;
7504 + }
7505 + break;
7506 +
7507 + case 0x0000000C: // CVS1 and CVS2 are open or tied to CCD1/CCD2.
7508 + // 5 valid voltage options.
7509 +
7510 + switch (data32 & 0x00000003) // Test the values of CCD1 and CCD2.
7511 + {
7512 + case 0x00000003: // CCD1 and CCD2 are tied to 1 of the CVS pins.
7513 + // This is not a valid combination.
7514 + printk("mpi: Unknown card plugged into slot\n");
7515 + break;
7516 +
7517 + case 0x00000002: // CCD2 is tied to either CVS1 or CVS2.
7518 + // CCD1 is tied to ground.
7519 + mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
7520 + mdelay(1);
7521 + data32 = mpi->pcmcia_cntl1;
7522 + if (data32 & 0x00000002) { // CCD2 is tied to CVS1.
7523 + printk("mpi: Detected y.y vdc Cardbus card\n");
7524 + } else { // CCD2 is tied to CVS2.
7525 + printk("mpi: Detected x.x vdc Cardbus card\n");
7526 + }
7527 + cardtype = MPI_CARDTYPE_CARDBUS;
7528 + break;
7529 +
7530 + case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
7531 + // CCD2 is tied to ground.
7532 +
7533 + mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
7534 + mdelay(1);
7535 + data32 = mpi->pcmcia_cntl1;
7536 + if (data32 & 0x00000001) {// CCD1 is tied to CVS1.
7537 + printk("mpi: Detected 3.3 vdc Cardbus card\n");
7538 + } else { // CCD1 is tied to CVS2.
7539 + printk("mpi: Detected x.x and y.y Cardbus card\n");
7540 + }
7541 + cardtype = MPI_CARDTYPE_CARDBUS;
7542 + break;
7543 +
7544 + case 0x00000000: // CCD1 and CCD2 are tied to ground.
7545 + cardtype = MPI_CARDTYPE_PCMCIA;
7546 + printk("mpi: Detected 5 vdc 16-bit PCMCIA card\n");
7547 + break;
7548 + }
7549 + break;
7550 +
7551 + default:
7552 + printk("mpi: Unknown card plugged into slot\n");
7553 + break;
7554 +
7555 + }
7556 + }
7557 + return cardtype;
7558 +}
7559 +
7560 +/*
7561 + * mpi_DetectPcCard: Detect the plugged in PC-Card
7562 + * Return: < 0 => Unknown card detected
7563 + * 0 => No card detected
7564 + * 1 => 16-bit card detected
7565 + * 2 => 32-bit CardBus card detected
7566 + */
7567 +static int mpi_DetectPcCard(void)
7568 +{
7569 + int cardtype;
7570 +
7571 + cardtype = cardtype_vcc_detect();
7572 + switch(cardtype) {
7573 + case MPI_CARDTYPE_PCMCIA:
7574 + mpi->pcmcia_cntl1 &= ~0x0000e000; // disable enable bits
7575 + //mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & ~PCCARD_CARD_RESET);
7576 + mpi->pcmcia_cntl1 |= (PCMCIA_ENABLE | PCMCIA_GPIO_ENABLE);
7577 + mpi_InitPcmciaSpace();
7578 + mpi_ResetPcCard(cardtype, FALSE);
7579 + // Hold card in reset for 10ms
7580 + mdelay(10);
7581 + mpi_ResetPcCard(cardtype, TRUE);
7582 + // Let card come out of reset
7583 + mdelay(100);
7584 + break;
7585 + case MPI_CARDTYPE_CARDBUS:
7586 + // 8 => CardBus Enable
7587 + // 1 => PCI Slot Number
7588 + // C => Float VS1 & VS2
7589 + mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & 0xFFFF0000) |
7590 + CARDBUS_ENABLE |
7591 + (CARDBUS_SLOT << 8)|
7592 + VS2_OEN |
7593 + VS1_OEN;
7594 + /* access to this memory window will be to/from CardBus */
7595 + mpi->l2pmremap1 |= CARDBUS_MEM;
7596 +
7597 + // Need to reset the Cardbus Card. There's no CardManager to do this,
7598 + // and we need to be ready for PCI configuration.
7599 + mpi_ResetPcCard(cardtype, FALSE);
7600 + // Hold card in reset for 10ms
7601 + mdelay(10);
7602 + mpi_ResetPcCard(cardtype, TRUE);
7603 + // Let card come out of reset
7604 + mdelay(100);
7605 + break;
7606 + default:
7607 + break;
7608 + }
7609 + return cardtype;
7610 +}
7611 +
7612 +static int mpi_init(void)
7613 +{
7614 + unsigned long data;
7615 + unsigned int chipid;
7616 + unsigned int chiprev;
7617 + unsigned int sdramsize;
7618 +
7619 + chipid = (PERF->RevID & 0xFFFF0000) >> 16;
7620 + chiprev = (PERF->RevID & 0xFF);
7621 + sdramsize = getMemorySize();
7622 + /*
7623 + * Init the pci interface
7624 + */
7625 + data = GPIO->GPIOMode; // GPIO mode register
7626 + data |= GROUP2_PCI | GROUP1_MII_PCCARD; // PCI internal arbiter + Cardbus
7627 + GPIO->GPIOMode = data; // PCI internal arbiter
7628 +
7629 + /*
7630 + * In the BCM6348 CardBus support is defaulted to Slot 0
7631 + * because there is no external IDSEL for CardBus. To disable
7632 + * the CardBus and allow a standard PCI card in Slot 0
7633 + * set the cbus_idsel field to 0x1f.
7634 + */
7635 + /*
7636 + uData = mpi->pcmcia_cntl1;
7637 + uData |= CARDBUS_IDSEL;
7638 + mpi->pcmcia_cntl1 = uData;
7639 + */
7640 + // Setup PCI I/O Window range. Give 64K to PCI I/O
7641 + mpi->l2piorange = ~(BCM_PCI_IO_SIZE_64KB-1);
7642 + // UBUS to PCI I/O base address
7643 + mpi->l2piobase = BCM_PCI_IO_BASE & BCM_PCI_ADDR_MASK;
7644 + // UBUS to PCI I/O Window remap
7645 + mpi->l2pioremap = (BCM_PCI_IO_BASE | MEM_WINDOW_EN);
7646 +
7647 + // enable PCI related GPIO pins and data swap between system and PCI bus
7648 + mpi->locbuscntrl = (EN_PCI_GPIO | DIR_U2P_NOSWAP);
7649 +
7650 + /* Enable 6348 BusMaster and Memory access mode */
7651 + data = mpi_GetLocalPciConfigReg(PCI_COMMAND);
7652 + data |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
7653 + mpi_SetLocalPciConfigReg(PCI_COMMAND, data);
7654 +
7655 + /* Configure two 16 MByte PCI to System memory regions. */
7656 + /* These memory regions are used when PCI device is a bus master */
7657 + /* Accesses to the SDRAM from PCI bus will be "byte swapped" for this region */
7658 + mpi_SetLocalPciConfigReg(PCI_BASE_ADDRESS_3, BCM_HOST_MEM_SPACE1);
7659 + mpi->sp0remap = 0x0;
7660 +
7661 + /* Accesses to the SDRAM from PCI bus will not be "byte swapped" for this region */
7662 + mpi_SetLocalPciConfigReg(PCI_BASE_ADDRESS_4, BCM_HOST_MEM_SPACE2);
7663 + mpi->sp1remap = 0x0;
7664 + mpi->pcimodesel |= (PCI_BAR2_NOSWAP | 0x40);
7665 +
7666 + if ((chipid == 0x6348) && (chiprev == 0xb0)) {
7667 + mpi->sp0range = ~(sdramsize-1);
7668 + mpi->sp1range = ~(sdramsize-1);
7669 + }
7670 + /*
7671 + * Change 6348 PCI Cfg Reg. offset 0x40 to PCI memory read retry count infinity
7672 + * by set 0 in bit 8~15. This resolve read Bcm4306 srom return 0xffff in
7673 + * first read.
7674 + */
7675 + data = mpi_GetLocalPciConfigReg(BRCM_PCI_CONFIG_TIMER);
7676 + data &= ~BRCM_PCI_CONFIG_TIMER_RETRY_MASK;
7677 + data |= 0x00000080;
7678 + mpi_SetLocalPciConfigReg(BRCM_PCI_CONFIG_TIMER, data);
7679 +
7680 + /* enable pci interrupt */
7681 + mpi->locintstat |= (EXT_PCI_INT << 16);
7682 +
7683 + mpi_DetectPcCard();
7684 +
7685 + ioport_resource.start = BCM_PCI_IO_BASE;
7686 + ioport_resource.end = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB;
7687 +
7688 +#if defined(CONFIG_USB)
7689 + PERF->blkEnables |= USBH_CLK_EN;
7690 + mdelay(100);
7691 + *USBH_NON_OHCI = NON_OHCI_BYTE_SWAP;
7692 +#endif
7693 +
7694 + return 0;
7695 +}
7696 +#endif
7697 +
7698 +static int __init brcm63xx_setup(void)
7699 +{
7700 + extern int panic_timeout;
7701 +
7702 + _machine_restart = brcm_machine_restart;
7703 + _machine_halt = brcm_machine_halt;
7704 + pm_power_off = brcm_machine_halt;
7705 +
7706 + board_time_init = brcm_time_init;
7707 + board_timer_setup = brcm_timer_setup;
7708 +
7709 + panic_timeout = 5;
7710 +
7711 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
7712 + /* mpi initialization */
7713 + mpi_init();
7714 +#endif
7715 + return 0;
7716 +}
7717 +
7718 +void plat_setup(void)
7719 +{
7720 + brcm63xx_setup();
7721 +}
7722 +
7723 +/***************************************************************************
7724 + * C++ New and delete operator functions
7725 + ***************************************************************************/
7726 +
7727 +/* void *operator new(unsigned int sz) */
7728 +void *_Znwj(unsigned int sz)
7729 +{
7730 + return( kmalloc(sz, GFP_KERNEL) );
7731 +}
7732 +
7733 +/* void *operator new[](unsigned int sz)*/
7734 +void *_Znaj(unsigned int sz)
7735 +{
7736 + return( kmalloc(sz, GFP_KERNEL) );
7737 +}
7738 +
7739 +/* placement new operator */
7740 +/* void *operator new (unsigned int size, void *ptr) */
7741 +void *ZnwjPv(unsigned int size, void *ptr)
7742 +{
7743 + return ptr;
7744 +}
7745 +
7746 +/* void operator delete(void *m) */
7747 +void _ZdlPv(void *m)
7748 +{
7749 + kfree(m);
7750 +}
7751 +
7752 +/* void operator delete[](void *m) */
7753 +void _ZdaPv(void *m)
7754 +{
7755 + kfree(m);
7756 +}
7757 +
7758 +EXPORT_SYMBOL(_Znwj);
7759 +EXPORT_SYMBOL(_Znaj);
7760 +EXPORT_SYMBOL(ZnwjPv);
7761 +EXPORT_SYMBOL(_ZdlPv);
7762 +EXPORT_SYMBOL(_ZdaPv);
7763 +
7764 diff -urN linux.old/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h linux.dev/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h
7765 --- linux.old/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h 1970-01-01 01:00:00.000000000 +0100
7766 +++ linux.dev/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h 2006-08-25 00:39:38.000000000 +0200
7767 @@ -0,0 +1,2 @@
7768 +#define ADSL_SDRAM_IMAGE_SIZE (384*1024)
7769 +
7770 diff -urN linux.old/arch/mips/bcm963xx/time.c linux.dev/arch/mips/bcm963xx/time.c
7771 --- linux.old/arch/mips/bcm963xx/time.c 1970-01-01 01:00:00.000000000 +0100
7772 +++ linux.dev/arch/mips/bcm963xx/time.c 2006-08-25 03:58:22.000000000 +0200
7773 @@ -0,0 +1,114 @@
7774 +/*
7775 +<:copyright-gpl
7776 + Copyright 2004 Broadcom Corp. All Rights Reserved.
7777 +
7778 + This program is free software; you can distribute it and/or modify it
7779 + under the terms of the GNU General Public License (Version 2) as
7780 + published by the Free Software Foundation.
7781 +
7782 + This program is distributed in the hope it will be useful, but WITHOUT
7783 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
7784 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
7785 + for more details.
7786 +
7787 + You should have received a copy of the GNU General Public License along
7788 + with this program; if not, write to the Free Software Foundation, Inc.,
7789 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
7790 +:>
7791 +*/
7792 +/*
7793 + * Setup time for Broadcom 963xx MIPS boards
7794 + */
7795 +
7796 +#include <linux/config.h>
7797 +#include <linux/init.h>
7798 +#include <linux/kernel_stat.h>
7799 +#include <linux/sched.h>
7800 +#include <linux/spinlock.h>
7801 +#include <linux/interrupt.h>
7802 +#include <linux/module.h>
7803 +#include <linux/time.h>
7804 +#include <linux/timex.h>
7805 +
7806 +#include <asm/mipsregs.h>
7807 +#include <asm/ptrace.h>
7808 +#include <asm/div64.h>
7809 +#include <asm/time.h>
7810 +
7811 +#include <bcm_map_part.h>
7812 +#include <bcm_intr.h>
7813 +
7814 +static unsigned long r4k_offset; /* Amount to increment compare reg each time */
7815 +static unsigned long r4k_cur; /* What counter should be at next timer irq */
7816 +
7817 +/* *********************************************************************
7818 + * calculateCpuSpeed()
7819 + * Calculate the BCM6348 CPU speed by reading the PLL strap register
7820 + * and applying the following formula:
7821 + * cpu_clk = (.25 * 64MHz freq) * (N1 + 1) * (N2 + 2) / (M1_CPU + 1)
7822 + * Input parameters:
7823 + * none
7824 + * Return value:
7825 + * none
7826 + ********************************************************************* */
7827 +
7828 +static inline unsigned long __init calculateCpuSpeed(void)
7829 +{
7830 + UINT32 pllStrap = PERF->PllStrap;
7831 + int n1 = (pllStrap & PLL_N1_MASK) >> PLL_N1_SHFT;
7832 + int n2 = (pllStrap & PLL_N2_MASK) >> PLL_N2_SHFT;
7833 + int m1cpu = (pllStrap & PLL_M1_CPU_MASK) >> PLL_M1_CPU_SHFT;
7834 +
7835 + return (16 * (n1 + 1) * (n2 + 2) / (m1cpu + 1)) * 1000000;
7836 +}
7837 +
7838 +
7839 +static inline unsigned long __init cal_r4koff(void)
7840 +{
7841 + mips_hpt_frequency = calculateCpuSpeed() / 2;
7842 + return (mips_hpt_frequency / HZ);
7843 +}
7844 +
7845 +
7846 +/*
7847 + * There are a lot of conceptually broken versions of the MIPS timer interrupt
7848 + * handler floating around. This one is rather different, but the algorithm
7849 + * is provably more robust.
7850 + */
7851 +irqreturn_t brcm_timer_interrupt(struct pt_regs *regs)
7852 +{
7853 + int irq = MIPS_TIMER_INT;
7854 +
7855 + irq_enter();
7856 + kstat_this_cpu.irqs[irq]++;
7857 +
7858 + timer_interrupt(irq, NULL, regs);
7859 + irq_exit();
7860 + return IRQ_HANDLED;
7861 +}
7862 +
7863 +
7864 +void __init brcm_time_init(void)
7865 +{
7866 + unsigned int est_freq, flags;
7867 + local_irq_save(flags);
7868 +
7869 + printk("calculating r4koff... ");
7870 + r4k_offset = cal_r4koff();
7871 + printk("%08lx(%d)\n", r4k_offset, (int)r4k_offset);
7872 +
7873 + est_freq = 2 * r4k_offset * HZ;
7874 + est_freq += 5000; /* round */
7875 + est_freq -= est_freq % 10000;
7876 + printk("CPU frequency %d.%02d MHz\n", est_freq / 1000000,
7877 + (est_freq % 1000000) * 100 / 1000000);
7878 + local_irq_restore(flags);
7879 +}
7880 +
7881 +
7882 +void __init brcm_timer_setup(struct irqaction *irq)
7883 +{
7884 + r4k_cur = (read_c0_count() + r4k_offset);
7885 + write_c0_compare(r4k_cur);
7886 + set_c0_status(IE_IRQ5);
7887 +}
7888 diff -urN linux.old/arch/mips/Kconfig linux.dev/arch/mips/Kconfig
7889 --- linux.old/arch/mips/Kconfig 2006-08-25 00:43:39.000000000 +0200
7890 +++ linux.dev/arch/mips/Kconfig 2006-08-25 01:57:46.000000000 +0200
7891 @@ -12,6 +12,15 @@
7892 prompt "System type"
7893 default SGI_IP22
7894
7895 +config MIPS_BRCM
7896 + bool "Support for the Broadcom boards"
7897 + select SYS_SUPPORTS_32BIT_KERNEL
7898 + select SYS_SUPPORTS_BIG_ENDIAN
7899 + select SYS_HAS_CPU_MIPS32_R1
7900 + select IRQ_CPU
7901 + help
7902 + This is a fmaily of boards based on the Broadcom MIPS32
7903 +
7904 config MIPS_MTX1
7905 bool "4G Systems MTX-1 board"
7906 select DMA_NONCOHERENT
7907 @@ -780,6 +789,7 @@
7908
7909 endchoice
7910
7911 +source "arch/mips/bcm963xx/Kconfig"
7912 source "arch/mips/ddb5xxx/Kconfig"
7913 source "arch/mips/gt64120/ev64120/Kconfig"
7914 source "arch/mips/jazz/Kconfig"
7915 diff -urN linux.old/arch/mips/kernel/cpu-probe.c linux.dev/arch/mips/kernel/cpu-probe.c
7916 --- linux.old/arch/mips/kernel/cpu-probe.c 2006-08-25 00:43:39.000000000 +0200
7917 +++ linux.dev/arch/mips/kernel/cpu-probe.c 2006-08-25 00:39:38.000000000 +0200
7918 @@ -568,6 +568,25 @@
7919 return;
7920 }
7921
7922 +static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
7923 +{
7924 + decode_configs(c);
7925 + switch (c->processor_id & 0xff00) {
7926 + case PRID_IMP_BCM6338:
7927 + c->cputype = CPU_BCM6338;
7928 + break;
7929 + case PRID_IMP_BCM6345:
7930 + c->cputype = CPU_BCM6345;
7931 + break;
7932 + case PRID_IMP_BCM6348:
7933 + c->cputype = CPU_BCM6348;
7934 + break;
7935 + default:
7936 + c->cputype = CPU_UNKNOWN;
7937 + break;
7938 + }
7939 +}
7940 +
7941 static inline void cpu_probe_mips(struct cpuinfo_mips *c)
7942 {
7943 decode_configs(c);
7944 @@ -704,6 +723,9 @@
7945 case PRID_COMP_LEGACY:
7946 cpu_probe_legacy(c);
7947 break;
7948 + case PRID_COMP_BROADCOM:
7949 + cpu_probe_broadcom(c);
7950 + break;
7951 case PRID_COMP_MIPS:
7952 cpu_probe_mips(c);
7953 break;
7954 diff -urN linux.old/arch/mips/kernel/proc.c linux.dev/arch/mips/kernel/proc.c
7955 --- linux.old/arch/mips/kernel/proc.c 2006-08-25 00:43:39.000000000 +0200
7956 +++ linux.dev/arch/mips/kernel/proc.c 2006-08-25 00:39:38.000000000 +0200
7957 @@ -85,6 +85,9 @@
7958 [CPU_VR4181A] = "NEC VR4181A",
7959 [CPU_SR71000] = "Sandcraft SR71000",
7960 [CPU_PR4450] = "Philips PR4450",
7961 + [CPU_BCM6338] = "BCM6338",
7962 + [CPU_BCM6345] = "BCM6345",
7963 + [CPU_BCM6348] = "BCM6348",
7964 };
7965
7966
7967 diff -urN linux.old/arch/mips/Makefile linux.dev/arch/mips/Makefile
7968 --- linux.old/arch/mips/Makefile 2006-08-25 00:43:39.000000000 +0200
7969 +++ linux.dev/arch/mips/Makefile 2006-08-25 15:39:54.000000000 +0200
7970 @@ -145,6 +145,15 @@
7971 #
7972
7973 #
7974 +# Broadcom board
7975 +#
7976 +core-$(CONFIG_MIPS_BRCM) += arch/mips/bcm963xx/
7977 +cflags-$(CONFIG_MIPS_BRCM) += -Iinclude/asm-mips/mach-bcm963xx
7978 +cflags-$(CONFIG_MIPS_BRCM) += -Iarch/mips/bcm963xx/include
7979 +load-$(CONFIG_MIPS_BRCM) += 0xffffffff80010000
7980 +
7981 +
7982 +#
7983 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
7984 #
7985 core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
7986 diff -urN linux.old/arch/mips/mm/c-r4k.c linux.dev/arch/mips/mm/c-r4k.c
7987 --- linux.old/arch/mips/mm/c-r4k.c 2006-08-25 00:43:39.000000000 +0200
7988 +++ linux.dev/arch/mips/mm/c-r4k.c 2006-08-25 00:39:38.000000000 +0200
7989 @@ -914,6 +914,13 @@
7990 if (!(config & MIPS_CONF_M))
7991 panic("Don't know how to probe P-caches on this cpu.");
7992
7993 + if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348)
7994 + {
7995 + printk("brcm mips: enabling icache and dcache...\n");
7996 + /* Enable caches */
7997 + write_c0_diag(read_c0_diag() | 0xC0000000);
7998 + }
7999 +
8000 /*
8001 * So we seem to be a MIPS32 or MIPS64 CPU
8002 * So let's probe the I-cache ...
8003 diff -urN linux.old/arch/mips/mm/tlbex.c linux.dev/arch/mips/mm/tlbex.c
8004 --- linux.old/arch/mips/mm/tlbex.c 2006-08-25 00:43:39.000000000 +0200
8005 +++ linux.dev/arch/mips/mm/tlbex.c 2006-08-25 00:39:38.000000000 +0200
8006 @@ -882,6 +882,9 @@
8007 case CPU_4KSC:
8008 case CPU_20KC:
8009 case CPU_25KF:
8010 + case CPU_BCM6338:
8011 + case CPU_BCM6345:
8012 + case CPU_BCM6348:
8013 tlbw(p);
8014 break;
8015
8016 diff -urN linux.old/arch/mips/pci/fixup-bcm96348.c linux.dev/arch/mips/pci/fixup-bcm96348.c
8017 --- linux.old/arch/mips/pci/fixup-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
8018 +++ linux.dev/arch/mips/pci/fixup-bcm96348.c 2006-08-25 00:39:38.000000000 +0200
8019 @@ -0,0 +1,85 @@
8020 +/*
8021 +<:copyright-gpl
8022 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8023 +
8024 + This program is free software; you can distribute it and/or modify it
8025 + under the terms of the GNU General Public License (Version 2) as
8026 + published by the Free Software Foundation.
8027 +
8028 + This program is distributed in the hope it will be useful, but WITHOUT
8029 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8030 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
8031 + for more details.
8032 +
8033 + You should have received a copy of the GNU General Public License along
8034 + with this program; if not, write to the Free Software Foundation, Inc.,
8035 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8036 +:>
8037 +*/
8038 +#include <linux/init.h>
8039 +#include <linux/types.h>
8040 +#include <linux/pci.h>
8041 +
8042 +#include <bcmpci.h>
8043 +#include <bcm_intr.h>
8044 +#include <bcm_map_part.h>
8045 +
8046 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
8047 +
8048 +static char irq_tab_bcm96348[] __initdata = {
8049 + [0] = INTERRUPT_ID_MPI,
8050 + [1] = INTERRUPT_ID_MPI,
8051 +#if defined(CONFIG_USB)
8052 + [USB_HOST_SLOT] = INTERRUPT_ID_USBH
8053 +#endif
8054 +};
8055 +
8056 +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
8057 +{
8058 + return irq_tab_bcm96348[slot];
8059 +}
8060 +
8061 +static void bcm96348_fixup(struct pci_dev *dev)
8062 +{
8063 + uint32 memaddr;
8064 + uint32 size;
8065 +
8066 + memaddr = pci_resource_start(dev, 0);
8067 + size = pci_resource_len(dev, 0);
8068 +
8069 + switch (PCI_SLOT(dev->devfn)) {
8070 + case 0:
8071 + // UBUS to PCI address range
8072 + // Memory Window 1. Mask determines which bits are decoded.
8073 + mpi->l2pmrange1 = ~(size-1);
8074 + // UBUS to PCI Memory base address. This is akin to the ChipSelect base
8075 + // register.
8076 + mpi->l2pmbase1 = memaddr & BCM_PCI_ADDR_MASK;
8077 + // UBUS to PCI Remap Address. Replaces the masked address bits in the
8078 + // range register with this setting.
8079 + // Also, enable direct I/O and direct Memory accesses
8080 + mpi->l2pmremap1 = (memaddr | MEM_WINDOW_EN);
8081 + break;
8082 +
8083 + case 1:
8084 + // Memory Window 2
8085 + mpi->l2pmrange2 = ~(size-1);
8086 + // UBUS to PCI Memory base address.
8087 + mpi->l2pmbase2 = memaddr & BCM_PCI_ADDR_MASK;
8088 + // UBUS to PCI Remap Address
8089 + mpi->l2pmremap2 = (memaddr | MEM_WINDOW_EN);
8090 + break;
8091 +
8092 +#if defined(CONFIG_USB)
8093 + case USB_HOST_SLOT:
8094 + dev->resource[0].start = USB_HOST_BASE;
8095 + dev->resource[0].end = USB_HOST_BASE+USB_BAR0_MEM_SIZE-1;
8096 + break;
8097 +#endif
8098 + }
8099 +}
8100 +
8101 +struct pci_fixup pcibios_fixups[] = {
8102 + { PCI_FIXUP_FINAL, PCI_ANY_ID, PCI_ANY_ID, bcm96348_fixup },
8103 + {0}
8104 +};
8105 diff -urN linux.old/arch/mips/pci/Makefile linux.dev/arch/mips/pci/Makefile
8106 --- linux.old/arch/mips/pci/Makefile 2006-08-25 00:43:29.000000000 +0200
8107 +++ linux.dev/arch/mips/pci/Makefile 2006-08-25 00:39:38.000000000 +0200
8108 @@ -18,6 +18,7 @@
8109 obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
8110 obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
8111 obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
8112 +obj-$(CONFIG_BCM_PCI) += fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o
8113
8114 #
8115 # These are still pretty much in the old state, watch, go blind.
8116 diff -urN linux.old/arch/mips/pci/ops-bcm96348.c linux.dev/arch/mips/pci/ops-bcm96348.c
8117 --- linux.old/arch/mips/pci/ops-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
8118 +++ linux.dev/arch/mips/pci/ops-bcm96348.c 2006-08-25 00:39:38.000000000 +0200
8119 @@ -0,0 +1,276 @@
8120 +/*
8121 +<:copyright-gpl
8122 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8123 +
8124 + This program is free software; you can distribute it and/or modify it
8125 + under the terms of the GNU General Public License (Version 2) as
8126 + published by the Free Software Foundation.
8127 +
8128 + This program is distributed in the hope it will be useful, but WITHOUT
8129 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8130 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
8131 + for more details.
8132 +
8133 + You should have received a copy of the GNU General Public License along
8134 + with this program; if not, write to the Free Software Foundation, Inc.,
8135 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8136 +:>
8137 +*/
8138 +#include <linux/types.h>
8139 +#include <linux/pci.h>
8140 +#include <linux/kernel.h>
8141 +#include <linux/init.h>
8142 +#include <asm/addrspace.h>
8143 +
8144 +#include <bcm_intr.h>
8145 +#include <bcm_map_part.h>
8146 +#include <bcmpci.h>
8147 +
8148 +#include <linux/delay.h>
8149 +
8150 +#if defined(CONFIG_USB)
8151 +#if 0
8152 +#define DPRINT(x...) printk(x)
8153 +#else
8154 +#define DPRINT(x...)
8155 +#endif
8156 +
8157 +static int
8158 +pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size);
8159 +static int
8160 +pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size);
8161 +
8162 +static bool usb_mem_size_rd = FALSE;
8163 +static uint32 usb_mem_base = 0;
8164 +static uint32 usb_cfg_space_cmd_reg = 0;
8165 +#endif
8166 +static bool pci_mem_size_rd = FALSE;
8167 +
8168 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
8169 +
8170 +static void mpi_SetupPciConfigAccess(uint32 addr)
8171 +{
8172 + mpi->l2pcfgctl = (DIR_CFG_SEL | DIR_CFG_USEREG | addr) & ~CONFIG_TYPE;
8173 +}
8174 +
8175 +static void mpi_ClearPciConfigAccess(void)
8176 +{
8177 + mpi->l2pcfgctl = 0x00000000;
8178 +}
8179 +
8180 +#if defined(CONFIG_USB)
8181 +/* --------------------------------------------------------------------------
8182 + Name: pci63xx_int_write
8183 +Abstract: PCI Config write on internal device(s)
8184 + -------------------------------------------------------------------------- */
8185 +static int
8186 +pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size)
8187 +{
8188 + if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
8189 + return PCIBIOS_SUCCESSFUL;
8190 + }
8191 +
8192 + switch (size) {
8193 + case 1:
8194 + DPRINT("W => Slot: %d Where: %2X Len: %d Data: %02X\n",
8195 + PCI_SLOT(devfn), where, size, *value);
8196 + break;
8197 + case 2:
8198 + DPRINT("W => Slot: %d Where: %2X Len: %d Data: %04X\n",
8199 + PCI_SLOT(devfn), where, size, *value);
8200 + switch (where) {
8201 + case PCI_COMMAND:
8202 + usb_cfg_space_cmd_reg = *value;
8203 + break;
8204 + default:
8205 + break;
8206 + }
8207 + break;
8208 + case 4:
8209 + DPRINT("W => Slot: %d Where: %2X Len: %d Data: %08lX\n",
8210 + PCI_SLOT(devfn), where, size, *value);
8211 + switch (where) {
8212 + case PCI_BASE_ADDRESS_0:
8213 + if (*value == 0xffffffff) {
8214 + usb_mem_size_rd = TRUE;
8215 + } else {
8216 + usb_mem_base = *value;
8217 + }
8218 + break;
8219 + default:
8220 + break;
8221 + }
8222 + break;
8223 + default:
8224 + break;
8225 + }
8226 +
8227 + return PCIBIOS_SUCCESSFUL;
8228 +}
8229 +
8230 +/* --------------------------------------------------------------------------
8231 + Name: pci63xx_int_read
8232 +Abstract: PCI Config read on internal device(s)
8233 + -------------------------------------------------------------------------- */
8234 +static int
8235 +pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size)
8236 +{
8237 + uint32 retValue = 0xFFFFFFFF;
8238 +
8239 + if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
8240 + return PCIBIOS_SUCCESSFUL;
8241 + }
8242 +
8243 + // For now, this is specific to the USB Host controller. We can
8244 + // make it more general if we have to...
8245 + // Emulate PCI Config accesses
8246 + switch (where) {
8247 + case PCI_VENDOR_ID:
8248 + case PCI_DEVICE_ID:
8249 + retValue = PCI_VENDOR_ID_BROADCOM | 0x63000000;
8250 + break;
8251 + case PCI_COMMAND:
8252 + case PCI_STATUS:
8253 + retValue = (0x0006 << 16) | usb_cfg_space_cmd_reg;
8254 + break;
8255 + case PCI_CLASS_REVISION:
8256 + case PCI_CLASS_DEVICE:
8257 + retValue = (PCI_CLASS_SERIAL_USB << 16) | (0x10 << 8) | 0x01;
8258 + break;
8259 + case PCI_BASE_ADDRESS_0:
8260 + if (usb_mem_size_rd) {
8261 + retValue = USB_BAR0_MEM_SIZE;
8262 + } else {
8263 + if (usb_mem_base != 0)
8264 + retValue = usb_mem_base;
8265 + else
8266 + retValue = USB_HOST_BASE;
8267 + }
8268 + usb_mem_size_rd = FALSE;
8269 + break;
8270 + case PCI_CACHE_LINE_SIZE:
8271 + case PCI_LATENCY_TIMER:
8272 + retValue = 0;
8273 + break;
8274 + case PCI_HEADER_TYPE:
8275 + retValue = PCI_HEADER_TYPE_NORMAL;
8276 + break;
8277 + case PCI_SUBSYSTEM_VENDOR_ID:
8278 + retValue = PCI_VENDOR_ID_BROADCOM;
8279 + break;
8280 + case PCI_SUBSYSTEM_ID:
8281 + retValue = 0x6300;
8282 + break;
8283 + case PCI_INTERRUPT_LINE:
8284 + retValue = INTERRUPT_ID_USBH;
8285 + break;
8286 + default:
8287 + break;
8288 + }
8289 +
8290 + switch (size) {
8291 + case 1:
8292 + *value = (retValue >> ((where & 3) << 3)) & 0xff;
8293 + DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %02X\n",
8294 + PCI_SLOT(devfn), where, size, *value);
8295 + break;
8296 + case 2:
8297 + *value = (retValue >> ((where & 3) << 3)) & 0xffff;
8298 + DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %04X\n",
8299 + PCI_SLOT(devfn), where, size, *value);
8300 + break;
8301 + case 4:
8302 + *value = retValue;
8303 + DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %08lX\n",
8304 + PCI_SLOT(devfn), where, size, *value);
8305 + break;
8306 + default:
8307 + break;
8308 + }
8309 +
8310 + return PCIBIOS_SUCCESSFUL;
8311 +}
8312 +#endif
8313 +
8314 +static int bcm96348_pcibios_read(struct pci_bus *bus, unsigned int devfn,
8315 + int where, int size, u32 * val)
8316 +{
8317 + volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
8318 + uint32 data;
8319 +
8320 +#if defined(CONFIG_USB)
8321 + if (PCI_SLOT(devfn) == USB_HOST_SLOT)
8322 + return pci63xx_int_read(devfn, where, val, size);
8323 +#endif
8324 +
8325 + mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
8326 + data = *(uint32 *)ioBase;
8327 + switch(size) {
8328 + case 1:
8329 + *val = (data >> ((where & 3) << 3)) & 0xff;
8330 + break;
8331 + case 2:
8332 + *val = (data >> ((where & 3) << 3)) & 0xffff;
8333 + break;
8334 + case 4:
8335 + *val = data;
8336 + /* Special case for reading PCI device range */
8337 + if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
8338 + if (pci_mem_size_rd) {
8339 + /* bcm6348 PCI memory window minimum size is 64K */
8340 + *val &= PCI_SIZE_64K;
8341 + }
8342 + }
8343 + break;
8344 + default:
8345 + break;
8346 + }
8347 + pci_mem_size_rd = FALSE;
8348 + mpi_ClearPciConfigAccess();
8349 +
8350 + return PCIBIOS_SUCCESSFUL;
8351 +}
8352 +
8353 +static int bcm96348_pcibios_write(struct pci_bus *bus, unsigned int devfn,
8354 + int where, int size, u32 val)
8355 +{
8356 + volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
8357 + uint32 data;
8358 +
8359 +#if defined(CONFIG_USB)
8360 + if (PCI_SLOT(devfn) == USB_HOST_SLOT)
8361 + return pci63xx_int_write(devfn, where, &val, size);
8362 +#endif
8363 + mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
8364 + data = *(uint32 *)ioBase;
8365 + switch(size) {
8366 + case 1:
8367 + data = (data & ~(0xff << ((where & 3) << 3))) |
8368 + (val << ((where & 3) << 3));
8369 + break;
8370 + case 2:
8371 + data = (data & ~(0xffff << ((where & 3) << 3))) |
8372 + (val << ((where & 3) << 3));
8373 + break;
8374 + case 4:
8375 + data = val;
8376 + /* Special case for reading PCI device range */
8377 + if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
8378 + if (val == 0xffffffff)
8379 + pci_mem_size_rd = TRUE;
8380 + }
8381 + break;
8382 + default:
8383 + break;
8384 + }
8385 + *(uint32 *)ioBase = data;
8386 + udelay(500);
8387 + mpi_ClearPciConfigAccess();
8388 +
8389 + return PCIBIOS_SUCCESSFUL;
8390 +}
8391 +
8392 +struct pci_ops bcm96348_pci_ops = {
8393 + .read = bcm96348_pcibios_read,
8394 + .write = bcm96348_pcibios_write
8395 +};
8396 diff -urN linux.old/arch/mips/pci/pci-bcm96348.c linux.dev/arch/mips/pci/pci-bcm96348.c
8397 --- linux.old/arch/mips/pci/pci-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
8398 +++ linux.dev/arch/mips/pci/pci-bcm96348.c 2006-08-25 00:39:38.000000000 +0200
8399 @@ -0,0 +1,54 @@
8400 +/*
8401 +<:copyright-gpl
8402 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8403 +
8404 + This program is free software; you can distribute it and/or modify it
8405 + under the terms of the GNU General Public License (Version 2) as
8406 + published by the Free Software Foundation.
8407 +
8408 + This program is distributed in the hope it will be useful, but WITHOUT
8409 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8410 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
8411 + for more details.
8412 +
8413 + You should have received a copy of the GNU General Public License along
8414 + with this program; if not, write to the Free Software Foundation, Inc.,
8415 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8416 +:>
8417 +*/
8418 +#include <linux/types.h>
8419 +#include <linux/pci.h>
8420 +#include <linux/kernel.h>
8421 +#include <linux/init.h>
8422 +
8423 +#include <asm/pci_channel.h>
8424 +#include <bcmpci.h>
8425 +
8426 +static struct resource bcm_pci_io_resource = {
8427 + .name = "bcm96348 pci IO space",
8428 + .start = BCM_PCI_IO_BASE,
8429 + .end = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB - 1,
8430 + .flags = IORESOURCE_IO
8431 +};
8432 +
8433 +static struct resource bcm_pci_mem_resource = {
8434 + .name = "bcm96348 pci memory space",
8435 + .start = BCM_PCI_MEM_BASE,
8436 + .end = BCM_PCI_MEM_BASE + BCM_PCI_MEM_SIZE_16MB - 1,
8437 + .flags = IORESOURCE_MEM
8438 +};
8439 +
8440 +extern struct pci_ops bcm96348_pci_ops;
8441 +
8442 +struct pci_controller bcm96348_controller = {
8443 + .pci_ops = &bcm96348_pci_ops,
8444 + .io_resource = &bcm_pci_io_resource,
8445 + .mem_resource = &bcm_pci_mem_resource,
8446 +};
8447 +
8448 +static void bcm96348_pci_init(void)
8449 +{
8450 + register_pci_controller(&bcm96348_controller);
8451 +}
8452 +
8453 +arch_initcall(bcm96348_pci_init);
8454 diff -urN linux.old/drivers/serial/bcm63xx_cons.c linux.dev/drivers/serial/bcm63xx_cons.c
8455 --- linux.old/drivers/serial/bcm63xx_cons.c 1970-01-01 01:00:00.000000000 +0100
8456 +++ linux.dev/drivers/serial/bcm63xx_cons.c 2006-08-25 15:37:34.000000000 +0200
8457 @@ -0,0 +1,1049 @@
8458 +/*
8459 +<:copyright-gpl
8460 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8461 +
8462 + This program is free software; you can distribute it and/or modify it
8463 + under the terms of the GNU General Public License (Version 2) as
8464 + published by the Free Software Foundation.
8465 +
8466 + This program is distributed in the hope it will be useful, but WITHOUT
8467 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8468 + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
8469 + for more details.
8470 +
8471 + You should have received a copy of the GNU General Public License along
8472 + with this program; if not, write to the Free Software Foundation, Inc.,
8473 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8474 +:>
8475 +*/
8476 +
8477 +/* Description: Serial port driver for the BCM963XX. */
8478 +
8479 +#define CARDNAME "bcm963xx_serial driver"
8480 +#define VERSION "2.0"
8481 +#define VER_STR CARDNAME " v" VERSION "\n"
8482 +
8483 +
8484 +#include <linux/kernel.h>
8485 +#include <linux/module.h>
8486 +#include <linux/version.h>
8487 +#include <linux/init.h>
8488 +#include <linux/slab.h>
8489 +#include <linux/interrupt.h>
8490 +#include <linux/spinlock.h>
8491 +
8492 +/* for definition of struct console */
8493 +#include <linux/console.h>
8494 +#include <linux/tty.h>
8495 +#include <linux/tty_flip.h>
8496 +#include <linux/serial.h>
8497 +#include <linux/serialP.h>
8498 +#include <asm/uaccess.h>
8499 +
8500 +#include <bcmtypes.h>
8501 +#include <board.h>
8502 +#include <bcm_map_part.h>
8503 +#include <bcm_intr.h>
8504 +
8505 +static DEFINE_SPINLOCK(bcm963xx_serial_lock);
8506 +
8507 +extern void _putc(char);
8508 +extern void _puts(const char *);
8509 +
8510 +typedef struct bcm_serial {
8511 + volatile Uart * port;
8512 + int type;
8513 + int flags;
8514 + int irq;
8515 + int baud_base;
8516 + int blocked_open;
8517 + unsigned short close_delay;
8518 + unsigned short closing_wait;
8519 + unsigned short line; /* port/line number */
8520 + unsigned short cflags; /* line configuration flag */
8521 + unsigned short x_char; /* xon/xoff character */
8522 + unsigned short read_status_mask; /* mask for read condition */
8523 + unsigned short ignore_status_mask; /* mask for ignore condition */
8524 + unsigned long event; /* mask used in BH */
8525 + int xmit_head; /* Position of the head */
8526 + int xmit_tail; /* Position of the tail */
8527 + int xmit_cnt; /* Count of the chars in the buffer */
8528 + int count; /* indicates how many times it has been opened */
8529 + int magic;
8530 +
8531 + struct async_icount icount; /* keep track of things ... */
8532 + struct tty_struct *tty; /* tty associated */
8533 + struct termios normal_termios;
8534 +
8535 + wait_queue_head_t open_wait;
8536 + wait_queue_head_t close_wait;
8537 +
8538 + long session; /* Session of opening process */
8539 + long pgrp; /* pgrp of opening process */
8540 +
8541 + unsigned char is_initialized;
8542 +} Context;
8543 +
8544 +
8545 +/*---------------------------------------------------------------------*/
8546 +/* Define bits in the Interrupt Enable register */
8547 +/*---------------------------------------------------------------------*/
8548 +/* Enable receive interrupt */
8549 +#define RXINT (RXFIFONE|RXOVFERR)
8550 +
8551 +/* Enable transmit interrupt */
8552 +#define TXINT (TXFIFOEMT|TXUNDERR|TXOVFERR)
8553 +
8554 +/* Enable receiver line status interrupt */
8555 +#define LSINT (RXBRK|RXPARERR|RXFRAMERR)
8556 +
8557 +#define BCM_NUM_UARTS 1
8558 +
8559 +#define BD_BCM63XX_TIMER_CLOCK_INPUT (FPERIPH)
8560 +
8561 +
8562 +static struct bcm_serial multi[BCM_NUM_UARTS];
8563 +static struct bcm_serial *lines[BCM_NUM_UARTS];
8564 +static struct tty_driver *serial_driver;
8565 +static struct termios *serial_termios[BCM_NUM_UARTS];
8566 +static struct termios *serial_termios_locked[BCM_NUM_UARTS];
8567 +
8568 +
8569 +static void bcm_stop (struct tty_struct *tty);
8570 +static void bcm_start (struct tty_struct *tty);
8571 +static inline void receive_chars (struct bcm_serial * info);
8572 +static int startup (struct bcm_serial *info);
8573 +static void shutdown (struct bcm_serial * info);
8574 +static void change_speed( volatile Uart *pUart, tcflag_t cFlag );
8575 +static void bcm63xx_cons_flush_chars (struct tty_struct *tty);
8576 +static int bcm63xx_cons_write (struct tty_struct *tty,
8577 + const unsigned char *buf, int count);
8578 +static int bcm63xx_cons_write_room (struct tty_struct *tty);
8579 +static int bcm_chars_in_buffer (struct tty_struct *tty);
8580 +static void bcm_flush_buffer (struct tty_struct *tty);
8581 +static void bcm_throttle (struct tty_struct *tty);
8582 +static void bcm_unthrottle (struct tty_struct *tty);
8583 +static void bcm_send_xchar (struct tty_struct *tty, char ch);
8584 +static int get_serial_info(struct bcm_serial *info, struct serial_struct *retinfo);
8585 +static int set_serial_info (struct bcm_serial *info, struct serial_struct *new_info);
8586 +static int get_lsr_info (struct bcm_serial *info, unsigned int *value);
8587 +static void send_break (struct bcm_serial *info, int duration);
8588 +static int bcm_ioctl (struct tty_struct * tty, struct file * file,
8589 + unsigned int cmd, unsigned long arg);
8590 +static void bcm_set_termios (struct tty_struct *tty, struct termios *old_termios);
8591 +static void bcm63xx_cons_close (struct tty_struct *tty, struct file *filp);
8592 +static void bcm_hangup (struct tty_struct *tty);
8593 +static int block_til_ready (struct tty_struct *tty, struct file *filp, struct bcm_serial *info);
8594 +static int bcm63xx_cons_open (struct tty_struct * tty, struct file * filp);
8595 +static int __init bcm63xx_serialinit(void);
8596 +
8597 +
8598 +/*
8599 + * ------------------------------------------------------------
8600 + * rs_stop () and rs_start ()
8601 + *
8602 + * These routines are called before setting or resetting
8603 + * tty->stopped. They enable or disable transmitter interrupts,
8604 + * as necessary.
8605 + * ------------------------------------------------------------
8606 + */
8607 +static void bcm_stop (struct tty_struct *tty)
8608 +{
8609 +}
8610 +
8611 +static void bcm_start (struct tty_struct *tty)
8612 +{
8613 + _puts(CARDNAME " Start\n");
8614 +}
8615 +
8616 +/*
8617 + * ------------------------------------------------------------
8618 + * receive_char ()
8619 + *
8620 + * This routine deals with inputs from any lines.
8621 + * ------------------------------------------------------------
8622 + */
8623 +static inline void receive_chars (struct bcm_serial * info)
8624 +{
8625 + struct tty_struct *tty = 0;
8626 + struct async_icount * icount;
8627 + int ignore = 0;
8628 + unsigned short status, tmp;
8629 + UCHAR ch = 0;
8630 + while ((status = info->port->intStatus) & RXINT)
8631 + {
8632 + char flag_char = TTY_NORMAL;
8633 +
8634 + if (status & RXFIFONE)
8635 + ch = info->port->Data; // Read the character
8636 + tty = info->tty; /* now tty points to the proper dev */
8637 + icount = &info->icount;
8638 + if (! tty)
8639 + break;
8640 + if (!tty_buffer_request_room(tty, 1))
8641 + break;
8642 + icount->rx++;
8643 + if (status & RXBRK)
8644 + {
8645 + flag_char = TTY_BREAK;
8646 + icount->brk++;
8647 + }
8648 + // keep track of the statistics
8649 + if (status & (RXFRAMERR | RXPARERR | RXOVFERR))
8650 + {
8651 + if (status & RXPARERR) /* parity error */
8652 + icount->parity++;
8653 + else
8654 + if (status & RXFRAMERR) /* frame error */
8655 + icount->frame++;
8656 + if (status & RXOVFERR)
8657 + {
8658 + // Overflow. Reset the RX FIFO
8659 + info->port->fifoctl |= RSTRXFIFOS;
8660 + icount->overrun++;
8661 + }
8662 + // check to see if we should ignore the character
8663 + // and mask off conditions that should be ignored
8664 + if (status & info->ignore_status_mask)
8665 + {
8666 + if (++ignore > 100 )
8667 + break;
8668 + goto ignore_char;
8669 + }
8670 + // Mask off the error conditions we want to ignore
8671 + tmp = status & info->read_status_mask;
8672 + if (tmp & RXPARERR)
8673 + {
8674 + flag_char = TTY_PARITY;
8675 + }
8676 + else
8677 + if (tmp & RXFRAMERR)
8678 + {
8679 + flag_char = TTY_FRAME;
8680 + }
8681 + if (tmp & RXOVFERR)
8682 + {
8683 + tty_insert_flip_char(tty, ch, flag_char);
8684 + ch = 0;
8685 + flag_char = TTY_OVERRUN;
8686 + if (!tty_buffer_request_room(tty, 1))
8687 + break;
8688 + }
8689 + }
8690 + tty_insert_flip_char(tty, ch, flag_char);
8691 + }
8692 +ignore_char:;
8693 + tty_flip_buffer_push(tty);
8694 + tty_schedule_flip(tty);
8695 +
8696 +}
8697 +
8698 +
8699 +/*
8700 + * ------------------------------------------------------------
8701 + * bcm_interrupt ()
8702 + *
8703 + * this is the main interrupt routine for the chip.
8704 + * It deals with the multiple ports.
8705 + * ------------------------------------------------------------
8706 + */
8707 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
8708 +static irqreturn_t bcm_interrupt (int irq, void * dev, struct pt_regs * regs)
8709 +#else
8710 +static void bcm_interrupt (int irq, void * dev, struct pt_regs * regs)
8711 +#endif
8712 +{
8713 + struct bcm_serial * info = lines[0];
8714 + UINT16 intStat;
8715 +
8716 + /* get pending interrupt flags from UART */
8717 +
8718 + /* Mask with only the serial interrupts that are enabled */
8719 + intStat = info->port->intStatus & info->port->intMask;
8720 + while (intStat)
8721 + {
8722 + if (intStat & RXINT)
8723 + receive_chars (info);
8724 + else
8725 + if (intStat & TXINT)
8726 + info->port->intStatus = TXINT;
8727 + else /* don't know what it was, so let's mask it */
8728 + info->port->intMask &= ~intStat;
8729 +
8730 + intStat = info->port->intStatus & info->port->intMask;
8731 + }
8732 +
8733 + // Clear the interrupt
8734 + BcmHalInterruptEnable (INTERRUPT_ID_UART);
8735 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
8736 + return IRQ_HANDLED;
8737 +#endif
8738 +}
8739 +
8740 +/*
8741 + * -------------------------------------------------------------------
8742 + * startup ()
8743 + *
8744 + * various initialization tasks
8745 + * -------------------------------------------------------------------
8746 + */
8747 +static int startup (struct bcm_serial *info)
8748 +{
8749 + // Port is already started...
8750 + return 0;
8751 +}
8752 +
8753 +/*
8754 + * -------------------------------------------------------------------
8755 + * shutdown ()
8756 + *
8757 + * This routine will shutdown a serial port; interrupts are disabled, and
8758 + * DTR is dropped if the hangup on close termio flag is on.
8759 + * -------------------------------------------------------------------
8760 + */
8761 +static void shutdown (struct bcm_serial * info)
8762 +{
8763 + unsigned long flags;
8764 + if (!info->is_initialized)
8765 + return;
8766 +
8767 + spin_lock_irqsave(&bcm963xx_serial_lock, flags);
8768 +
8769 + info->port->control &= ~(BRGEN|TXEN|RXEN);
8770 + if (info->tty)
8771 + set_bit (TTY_IO_ERROR, &info->tty->flags);
8772 + info->is_initialized = 0;
8773 +
8774 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
8775 +}
8776 +/*
8777 + * -------------------------------------------------------------------
8778 + * change_speed ()
8779 + *
8780 + * Set the baud rate, character size, parity and stop bits.
8781 + * -------------------------------------------------------------------
8782 + */
8783 +static void change_speed( volatile Uart *pUart, tcflag_t cFlag )
8784 +{
8785 + unsigned long ulFlags, ulBaud, ulClockFreqHz, ulTmp;
8786 +
8787 + spin_lock_irqsave(&bcm963xx_serial_lock, ulFlags);
8788 + switch( cFlag & (CBAUD | CBAUDEX) )
8789 + {
8790 + case B115200:
8791 + ulBaud = 115200;
8792 + break;
8793 + case B57600:
8794 + ulBaud = 57600;
8795 + break;
8796 + case B38400:
8797 + ulBaud = 38400;
8798 + break;
8799 + case B19200:
8800 + ulBaud = 19200;
8801 + break;
8802 + case B9600:
8803 + ulBaud = 9600;
8804 + break;
8805 + case B4800:
8806 + ulBaud = 4800;
8807 + break;
8808 + case B2400:
8809 + ulBaud = 2400;
8810 + break;
8811 + case B1800:
8812 + ulBaud = 1800;
8813 + break;
8814 + case B1200:
8815 + ulBaud = 1200;
8816 + break;
8817 + case B600:
8818 + ulBaud = 600;
8819 + break;
8820 + case B300:
8821 + ulBaud = 300;
8822 + break;
8823 + case B200:
8824 + ulBaud = 200;
8825 + break;
8826 + case B150:
8827 + ulBaud = 150;
8828 + break;
8829 + case B134:
8830 + ulBaud = 134;
8831 + break;
8832 + case B110:
8833 + ulBaud = 110;
8834 + break;
8835 + case B75:
8836 + ulBaud = 75;
8837 + break;
8838 + case B50:
8839 + ulBaud = 50;
8840 + break;
8841 + default:
8842 + ulBaud = 115200;
8843 + break;
8844 + }
8845 +
8846 + /* Calculate buad rate. */
8847 + ulClockFreqHz = BD_BCM63XX_TIMER_CLOCK_INPUT;
8848 + ulTmp = (ulClockFreqHz / ulBaud) / 16;
8849 + if( ulTmp & 0x01 )
8850 + ulTmp /= 2; /* Rounding up, so sub is already accounted for */
8851 + else
8852 + ulTmp = (ulTmp / 2) - 1; /* Rounding down so we must sub 1 */
8853 + pUart->baudword = ulTmp;
8854 +
8855 + /* Set character size, stop bits and parity. */
8856 + switch( cFlag & CSIZE )
8857 + {
8858 + case CS5:
8859 + ulTmp = BITS5SYM; /* select transmit 5 bit data size */
8860 + break;
8861 + case CS6:
8862 + ulTmp = BITS6SYM; /* select transmit 6 bit data size */
8863 + break;
8864 + case CS7:
8865 + ulTmp = BITS7SYM; /* select transmit 7 bit data size */
8866 + break;
8867 + default:
8868 + ulTmp = BITS8SYM; /* select transmit 8 bit data size */
8869 + break;
8870 + }
8871 + if( cFlag & CSTOPB )
8872 + ulTmp |= TWOSTOP; /* select 2 stop bits */
8873 + else
8874 + ulTmp |= ONESTOP; /* select one stop bit */
8875 +
8876 + /* Write these values into the config reg. */
8877 + pUart->config = ulTmp;
8878 + pUart->control &= ~(RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN);
8879 + switch( cFlag & (PARENB | PARODD) )
8880 + {
8881 + case PARENB|PARODD:
8882 + pUart->control |= RXPARITYEN | TXPARITYEN;
8883 + break;
8884 + case PARENB:
8885 + pUart->control |= RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN;
8886 + break;
8887 + default:
8888 + pUart->control |= 0;
8889 + break;
8890 + }
8891 +
8892 + /* Reset and flush uart */
8893 + pUart->fifoctl = RSTTXFIFOS | RSTRXFIFOS;
8894 + spin_unlock_irqrestore(&bcm963xx_serial_lock, ulFlags);
8895 +}
8896 +
8897 +
8898 +/*
8899 + * -------------------------------------------------------------------
8900 + * bcm_flush_char ()
8901 + *
8902 + * Nothing to flush. Polled I/O is used.
8903 + * -------------------------------------------------------------------
8904 + */
8905 +static void bcm63xx_cons_flush_chars (struct tty_struct *tty)
8906 +{
8907 +}
8908 +
8909 +
8910 +/*
8911 + * -------------------------------------------------------------------
8912 + * bcm63xx_cons_write ()
8913 + *
8914 + * Main output routine using polled I/O.
8915 + * -------------------------------------------------------------------
8916 + */
8917 +static int bcm63xx_cons_write (struct tty_struct *tty,
8918 + const unsigned char *buf, int count)
8919 +{
8920 + int c;
8921 +
8922 + for (c = 0; c < count; c++)
8923 + _putc(buf[c]);
8924 + return count;
8925 +}
8926 +
8927 +/*
8928 + * -------------------------------------------------------------------
8929 + * bcm63xx_cons_write_room ()
8930 + *
8931 + * Compute the amount of space available for writing.
8932 + * -------------------------------------------------------------------
8933 + */
8934 +static int bcm63xx_cons_write_room (struct tty_struct *tty)
8935 +{
8936 + /* Pick a number. Any number. Polled I/O is used. */
8937 + return 1024;
8938 +}
8939 +
8940 +/*
8941 + * -------------------------------------------------------------------
8942 + * bcm_chars_in_buffer ()
8943 + *
8944 + * compute the amount of char left to be transmitted
8945 + * -------------------------------------------------------------------
8946 + */
8947 +static int bcm_chars_in_buffer (struct tty_struct *tty)
8948 +{
8949 + return 0;
8950 +}
8951 +
8952 +/*
8953 + * -------------------------------------------------------------------
8954 + * bcm_flush_buffer ()
8955 + *
8956 + * Empty the output buffer
8957 + * -------------------------------------------------------------------
8958 + */
8959 +static void bcm_flush_buffer (struct tty_struct *tty)
8960 +{
8961 + tty_wakeup(tty);
8962 +}
8963 +
8964 +/*
8965 + * ------------------------------------------------------------
8966 + * bcm_throttle () and bcm_unthrottle ()
8967 + *
8968 + * This routine is called by the upper-layer tty layer to signal that
8969 + * incoming characters should be throttled (or not).
8970 + * ------------------------------------------------------------
8971 + */
8972 +static void bcm_throttle (struct tty_struct *tty)
8973 +{
8974 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
8975 + if (I_IXOFF(tty))
8976 + info->x_char = STOP_CHAR(tty);
8977 +}
8978 +
8979 +static void bcm_unthrottle (struct tty_struct *tty)
8980 +{
8981 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
8982 + if (I_IXOFF(tty))
8983 + {
8984 + if (info->x_char)
8985 + info->x_char = 0;
8986 + else
8987 + info->x_char = START_CHAR(tty);
8988 + }
8989 +}
8990 +
8991 +static void bcm_send_xchar (struct tty_struct *tty, char ch)
8992 +{
8993 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
8994 + info->x_char = ch;
8995 + if (ch)
8996 + bcm_start (info->tty);
8997 +}
8998 +
8999 +/*
9000 + * ------------------------------------------------------------
9001 + * rs_ioctl () and friends
9002 + * ------------------------------------------------------------
9003 + */
9004 +static int get_serial_info(struct bcm_serial *info, struct serial_struct *retinfo)
9005 +{
9006 + struct serial_struct tmp;
9007 +
9008 + if (!retinfo)
9009 + return -EFAULT;
9010 +
9011 + memset (&tmp, 0, sizeof(tmp));
9012 + tmp.type = info->type;
9013 + tmp.line = info->line;
9014 + tmp.port = (int) info->port;
9015 + tmp.irq = info->irq;
9016 + tmp.flags = 0;
9017 + tmp.baud_base = info->baud_base;
9018 + tmp.close_delay = info->close_delay;
9019 + tmp.closing_wait = info->closing_wait;
9020 +
9021 + return copy_to_user (retinfo, &tmp, sizeof(*retinfo));
9022 +}
9023 +
9024 +static int set_serial_info (struct bcm_serial *info, struct serial_struct *new_info)
9025 +{
9026 + struct serial_struct new_serial;
9027 + struct bcm_serial old_info;
9028 + int retval = 0;
9029 +
9030 + if (!new_info)
9031 + return -EFAULT;
9032 +
9033 + copy_from_user (&new_serial, new_info, sizeof(new_serial));
9034 + old_info = *info;
9035 +
9036 + if (!capable(CAP_SYS_ADMIN))
9037 + return -EPERM;
9038 +
9039 +
9040 + if (info->count > 1)
9041 + return -EBUSY;
9042 +
9043 + /* OK, past this point, all the error checking has been done.
9044 + * At this point, we start making changes.....
9045 + */
9046 + info->baud_base = new_serial.baud_base;
9047 + info->type = new_serial.type;
9048 + info->close_delay = new_serial.close_delay;
9049 + info->closing_wait = new_serial.closing_wait;
9050 + retval = startup (info);
9051 + return retval;
9052 +}
9053 +
9054 +/*
9055 + * get_lsr_info - get line status register info
9056 + *
9057 + * Purpose: Let user call ioctl() to get info when the UART physically
9058 + * is emptied. On bus types like RS485, the transmitter must
9059 + * release the bus after transmitting. This must be done when
9060 + * the transmit shift register is empty, not be done when the
9061 + * transmit holding register is empty. This functionality
9062 + * allows an RS485 driver to be written in user space.
9063 + */
9064 +static int get_lsr_info (struct bcm_serial *info, unsigned int *value)
9065 +{
9066 + return( 0 );
9067 +}
9068 +
9069 +/*
9070 + * This routine sends a break character out the serial port.
9071 + */
9072 +static void send_break (struct bcm_serial *info, int duration)
9073 +{
9074 + unsigned long flags;
9075 +
9076 + if (!info->port)
9077 + return;
9078 +
9079 + current->state = TASK_INTERRUPTIBLE;
9080 +
9081 + /*save_flags (flags);
9082 + cli();*/
9083 + spin_lock_irqsave(&bcm963xx_serial_lock, flags);
9084 +
9085 + info->port->control |= XMITBREAK;
9086 + schedule_timeout(duration);
9087 + info->port->control &= ~XMITBREAK;
9088 +
9089 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9090 + //restore_flags (flags);
9091 +}
9092 +
9093 +static int bcm_ioctl (struct tty_struct * tty, struct file * file,
9094 + unsigned int cmd, unsigned long arg)
9095 +{
9096 + int error;
9097 + struct bcm_serial * info = (struct bcm_serial *)tty->driver_data;
9098 + int retval;
9099 +
9100 + if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
9101 + (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
9102 + (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT))
9103 + {
9104 + if (tty->flags & (1 << TTY_IO_ERROR))
9105 + return -EIO;
9106 + }
9107 + switch (cmd)
9108 + {
9109 +
9110 + case TCSBRK: /* SVID version: non-zero arg --> no break */
9111 + retval = tty_check_change (tty);
9112 + if (retval)
9113 + return retval;
9114 + tty_wait_until_sent (tty, 0);
9115 + if (!arg)
9116 + send_break (info, HZ/4); /* 1/4 second */
9117 + return 0;
9118 +
9119 + case TCSBRKP: /* support for POSIX tcsendbreak() */
9120 + retval = tty_check_change (tty);
9121 + if (retval)
9122 + return retval;
9123 + tty_wait_until_sent (tty, 0);
9124 + send_break (info, arg ? arg*(HZ/10) : HZ/4);
9125 + return 0;
9126 +
9127 + case TIOCGSOFTCAR:
9128 + error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(long));
9129 + if (!error)
9130 + return -EFAULT;
9131 + else
9132 + {
9133 + put_user (C_CLOCAL(tty) ? 1 : 0, (unsigned long *)arg);
9134 + return 0;
9135 + }
9136 +
9137 + case TIOCSSOFTCAR:
9138 + error = get_user (arg, (unsigned long *)arg);
9139 + if (error)
9140 + return error;
9141 + tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
9142 + return 0;
9143 +
9144 + case TIOCGSERIAL:
9145 + error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(struct serial_struct));
9146 + if (!error)
9147 + return -EFAULT;
9148 + else
9149 + return get_serial_info (info, (struct serial_struct *)arg);
9150 +
9151 + case TIOCSSERIAL:
9152 + return set_serial_info (info, (struct serial_struct *) arg);
9153 +
9154 + case TIOCSERGETLSR: /* Get line status register */
9155 + error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(unsigned int));
9156 + if (!error)
9157 + return -EFAULT;
9158 + else
9159 + return get_lsr_info (info, (unsigned int *)arg);
9160 +
9161 + case TIOCSERGSTRUCT:
9162 + error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(struct bcm_serial));
9163 + if (!error)
9164 + return -EFAULT;
9165 + else
9166 + {
9167 + copy_to_user((struct bcm_serial *)arg, info, sizeof(struct bcm_serial));
9168 + return 0;
9169 + }
9170 +
9171 + default:
9172 + return -ENOIOCTLCMD;
9173 + }
9174 + return 0;
9175 +}
9176 +
9177 +static void bcm_set_termios (struct tty_struct *tty, struct termios *old_termios)
9178 +{
9179 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9180 +
9181 + if( tty->termios->c_cflag != old_termios->c_cflag )
9182 + change_speed (info->port, tty->termios->c_cflag);
9183 +}
9184 +
9185 +/*
9186 + * ------------------------------------------------------------
9187 + * bcm63xx_cons_close()
9188 + *
9189 + * This routine is called when the serial port gets closed. First, we
9190 + * wait for the last remaining data to be sent. Then, we turn off
9191 + * the transmit enable and receive enable flags.
9192 + * ------------------------------------------------------------
9193 + */
9194 +static void bcm63xx_cons_close (struct tty_struct *tty, struct file *filp)
9195 +{
9196 + struct bcm_serial * info = (struct bcm_serial *)tty->driver_data;
9197 + unsigned long flags;
9198 +
9199 + if (!info)
9200 + return;
9201 +
9202 + /*save_flags (flags);
9203 + cli();*/
9204 + spin_lock_irqsave(&bcm963xx_serial_lock, flags);
9205 +
9206 + if (tty_hung_up_p (filp))
9207 + {
9208 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9209 + //restore_flags (flags);
9210 + return;
9211 + }
9212 +
9213 + if ((tty->count == 1) && (info->count != 1))
9214 + {
9215 +
9216 + /* Uh, oh. tty->count is 1, which means that the tty
9217 + * structure will be freed. Info->count should always
9218 + * be one in these conditions. If it's greater than
9219 + * one, we've got real problems, since it means the
9220 + * serial port won't be shutdown.
9221 + */
9222 + printk("bcm63xx_cons_close: bad serial port count; tty->count is 1, "
9223 + "info->count is %d\n", info->count);
9224 + info->count = 1;
9225 + }
9226 +
9227 + if (--info->count < 0)
9228 + {
9229 + printk("ds_close: bad serial port count for ttys%d: %d\n",
9230 + info->line, info->count);
9231 + info->count = 0;
9232 + }
9233 +
9234 + if (info->count)
9235 + {
9236 + //restore_flags (flags);
9237 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9238 + return;
9239 + }
9240 +
9241 + /* Now we wait for the transmit buffer to clear; and we notify
9242 + * the line discipline to only process XON/XOFF characters.
9243 + */
9244 + tty->closing = 1;
9245 +
9246 + /* At this point we stop accepting input. To do this, we
9247 + * disable the receive line status interrupts.
9248 + */
9249 + shutdown (info);
9250 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
9251 + if (tty->driver->flush_buffer)
9252 + tty->driver->flush_buffer (tty);
9253 +#else
9254 + if (tty->driver.flush_buffer)
9255 + tty->driver.flush_buffer (tty);
9256 +#endif
9257 + if (tty->ldisc.flush_buffer)
9258 + tty->ldisc.flush_buffer (tty);
9259 +
9260 + tty->closing = 0;
9261 + info->event = 0;
9262 + info->tty = 0;
9263 + if (tty->ldisc.num != tty_ldisc_get(N_TTY)->num)
9264 + {
9265 + if (tty->ldisc.close)
9266 + (tty->ldisc.close)(tty);
9267 + tty->ldisc = *tty_ldisc_get(N_TTY);
9268 + tty->termios->c_line = N_TTY;
9269 + if (tty->ldisc.open)
9270 + (tty->ldisc.open)(tty);
9271 + }
9272 + if (info->blocked_open)
9273 + {
9274 + if (info->close_delay)
9275 + {
9276 + current->state = TASK_INTERRUPTIBLE;
9277 + schedule_timeout(info->close_delay);
9278 + }
9279 + wake_up_interruptible (&info->open_wait);
9280 + }
9281 + wake_up_interruptible (&info->close_wait);
9282 +
9283 + //restore_flags (flags);
9284 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9285 +}
9286 +
9287 +/*
9288 + * bcm_hangup () --- called by tty_hangup() when a hangup is signaled.
9289 + */
9290 +static void bcm_hangup (struct tty_struct *tty)
9291 +{
9292 +
9293 + struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9294 +
9295 + shutdown (info);
9296 + info->event = 0;
9297 + info->count = 0;
9298 + info->tty = 0;
9299 + wake_up_interruptible (&info->open_wait);
9300 +}
9301 +
9302 +/*
9303 + * ------------------------------------------------------------
9304 + * rs_open() and friends
9305 + * ------------------------------------------------------------
9306 + */
9307 +static int block_til_ready (struct tty_struct *tty, struct file *filp,
9308 + struct bcm_serial *info)
9309 +{
9310 + return 0;
9311 +}
9312 +
9313 +/*
9314 + * This routine is called whenever a serial port is opened. It
9315 + * enables interrupts for a serial port. It also performs the
9316 + * serial-specific initialization for the tty structure.
9317 + */
9318 +static int bcm63xx_cons_open (struct tty_struct * tty, struct file * filp)
9319 +{
9320 + struct bcm_serial *info;
9321 + int retval, line;
9322 +
9323 + // Make sure we're only opening on of the ports we support
9324 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
9325 + line = MINOR(tty->driver->cdev.dev) - tty->driver->minor_start;
9326 +#else
9327 + line = MINOR(tty->device) - tty->driver.minor_start;
9328 +#endif
9329 +
9330 + if ((line < 0) || (line >= BCM_NUM_UARTS))
9331 + return -ENODEV;
9332 +
9333 + info = lines[line];
9334 +
9335 + tty->low_latency=1;
9336 + info->port->intMask = 0; /* Clear any pending interrupts */
9337 + info->port->intMask = RXINT; /* Enable RX */
9338 +
9339 + info->count++;
9340 + tty->driver_data = info;
9341 + info->tty = tty;
9342 + BcmHalInterruptEnable (INTERRUPT_ID_UART);
9343 +
9344 + // Start up serial port
9345 + retval = startup (info);
9346 + if (retval)
9347 + return retval;
9348 +
9349 + retval = block_til_ready (tty, filp, info);
9350 + if (retval)
9351 + return retval;
9352 +
9353 +
9354 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
9355 + info->pgrp = process_group(current);
9356 + info->session = current->signal->session;
9357 +#else
9358 + info->session = current->session;
9359 + info->pgrp = current->pgrp;
9360 +#endif
9361 +
9362 + return 0;
9363 +}
9364 +
9365 +
9366 +static struct tty_operations rs_ops = {
9367 + .open = bcm63xx_cons_open,
9368 + .close = bcm63xx_cons_close,
9369 + .write = bcm63xx_cons_write,
9370 + .flush_chars = bcm63xx_cons_flush_chars,
9371 + .write_room = bcm63xx_cons_write_room,
9372 + .chars_in_buffer = bcm_chars_in_buffer,
9373 + .flush_buffer = bcm_flush_buffer,
9374 + .ioctl = bcm_ioctl,
9375 + .throttle = bcm_throttle,
9376 + .unthrottle = bcm_unthrottle,
9377 + .send_xchar = bcm_send_xchar,
9378 + .set_termios = bcm_set_termios,
9379 + .stop = bcm_stop,
9380 + .start = bcm_start,
9381 + .hangup = bcm_hangup,
9382 +};
9383 +
9384 +/* --------------------------------------------------------------------------
9385 + Name: bcm63xx_serialinit
9386 + Purpose: Initialize our BCM63xx serial driver
9387 +-------------------------------------------------------------------------- */
9388 +static int __init bcm63xx_serialinit(void)
9389 +{
9390 + int i, flags;
9391 + struct bcm_serial * info;
9392 +
9393 + // Print the driver version information
9394 + printk(VER_STR);
9395 + serial_driver = alloc_tty_driver(BCM_NUM_UARTS);
9396 + if (!serial_driver)
9397 + return -ENOMEM;
9398 +
9399 + serial_driver->owner = THIS_MODULE;
9400 + serial_driver->devfs_name = "tts/";
9401 +// serial_driver.magic = TTY_DRIVER_MAGIC;
9402 + serial_driver->name = "ttyS";
9403 + serial_driver->major = TTY_MAJOR;
9404 + serial_driver->minor_start = 64;
9405 +// serial_driver.num = BCM_NUM_UARTS;
9406 + serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
9407 + serial_driver->subtype = SERIAL_TYPE_NORMAL;
9408 + serial_driver->init_termios = tty_std_termios;
9409 + serial_driver->init_termios.c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL;
9410 + serial_driver->flags = TTY_DRIVER_REAL_RAW;
9411 +
9412 + serial_driver->termios = serial_termios;
9413 + serial_driver->termios_locked = serial_termios_locked;
9414 +
9415 + tty_set_operations(serial_driver, &rs_ops);
9416 +
9417 + if (tty_register_driver (serial_driver))
9418 + panic("Couldn't register serial driver\n");
9419 +
9420 + //save_flags(flags); cli();
9421 + spin_lock_irqsave(&bcm963xx_serial_lock, flags);
9422 +
9423 + for (i = 0; i < BCM_NUM_UARTS; i++)
9424 + {
9425 + info = &multi[i];
9426 + lines[i] = info;
9427 + info->magic = SERIAL_MAGIC;
9428 + info->port = (Uart *) ((char *)UART_BASE + (i * 0x20));
9429 + info->tty = 0;
9430 + info->irq = (2 - i) + 8;
9431 + info->line = i;
9432 + info->close_delay = 50;
9433 + info->closing_wait = 3000;
9434 + info->x_char = 0;
9435 + info->event = 0;
9436 + info->count = 0;
9437 + info->blocked_open = 0;
9438 + info->normal_termios = serial_driver->init_termios;
9439 + init_waitqueue_head(&info->open_wait);
9440 + init_waitqueue_head(&info->close_wait);
9441 +
9442 + /* If we are pointing to address zero then punt - not correctly
9443 + * set up in setup.c to handle this.
9444 + */
9445 + if (! info->port)
9446 + return 0;
9447 + BcmHalMapInterrupt(bcm_interrupt, 0, INTERRUPT_ID_UART);
9448 + }
9449 +
9450 + /* order matters here... the trick is that flags
9451 + * is updated... in request_irq - to immediatedly obliterate
9452 + * it is unwise.
9453 + */
9454 + spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9455 + return 0;
9456 +}
9457 +
9458 +module_init(bcm63xx_serialinit);
9459 +
9460 +/* --------------------------------------------------------------------------
9461 + Name: bcm_console_print
9462 + Purpose: bcm_console_print is registered for printk.
9463 + The console_lock must be held when we get here.
9464 +-------------------------------------------------------------------------- */
9465 +static void bcm_console_print (struct console * cons, const char * str,
9466 + unsigned int count)
9467 +{
9468 + unsigned int i;
9469 + //_puts(str);
9470 + for(i=0; i<count; i++, str++)
9471 + {
9472 + _putc(*str);
9473 + if (*str == 10)
9474 + {
9475 + _putc(13);
9476 + }
9477 + }
9478 +}
9479 +
9480 +static struct tty_driver * bcm_console_device(struct console * c, int *index)
9481 +{
9482 + *index = c->index;
9483 + return serial_driver;
9484 +}
9485 +
9486 +static int __init bcm_console_setup(struct console * co, char * options)
9487 +{
9488 + return 0;
9489 +}
9490 +
9491 +static struct console bcm_sercons = {
9492 + .name = "ttyS",
9493 + .write = bcm_console_print,
9494 + .device = bcm_console_device,
9495 + .setup = bcm_console_setup,
9496 + .flags = CON_PRINTBUFFER,
9497 + .index = -1,
9498 +};
9499 +
9500 +static int __init bcm63xx_console_init(void)
9501 +{
9502 + register_console(&bcm_sercons);
9503 + return 0;
9504 +}
9505 +
9506 +console_initcall(bcm63xx_console_init);
9507 diff -urN linux.old/drivers/serial/Makefile linux.dev/drivers/serial/Makefile
9508 --- linux.old/drivers/serial/Makefile 2006-06-18 03:49:35.000000000 +0200
9509 +++ linux.dev/drivers/serial/Makefile 2006-08-25 15:38:44.000000000 +0200
9510 @@ -55,3 +55,4 @@
9511 obj-$(CONFIG_SERIAL_SGI_IOC4) += ioc4_serial.o
9512 obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o
9513 obj-$(CONFIG_SERIAL_AT91) += at91_serial.o
9514 +obj-$(CONFIG_BCM_SERIAL) += bcm63xx_cons.o
9515 diff -urN linux.old/include/asm-mips/bootinfo.h linux.dev/include/asm-mips/bootinfo.h
9516 --- linux.old/include/asm-mips/bootinfo.h 2006-08-25 00:43:22.000000000 +0200
9517 +++ linux.dev/include/asm-mips/bootinfo.h 2006-08-25 00:39:38.000000000 +0200
9518 @@ -218,6 +218,14 @@
9519 #define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */
9520 #define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */
9521
9522 +/*
9523 + * Valid machtype for group BRCM
9524 + */
9525 +#define MACH_GROUP_BRCM 23 /* Broadcom boards */
9526 +#define MACH_BCM96338 0
9527 +#define MACH_BCM96345 1
9528 +#define MACH_BCM96348 2
9529 +
9530 #define CL_SIZE COMMAND_LINE_SIZE
9531
9532 const char *get_system_type(void);
9533 diff -urN linux.old/include/asm-mips/cpu.h linux.dev/include/asm-mips/cpu.h
9534 --- linux.old/include/asm-mips/cpu.h 2006-08-25 00:43:22.000000000 +0200
9535 +++ linux.dev/include/asm-mips/cpu.h 2006-08-25 00:39:38.000000000 +0200
9536 @@ -103,6 +103,13 @@
9537
9538 #define PRID_IMP_SR71000 0x0400
9539
9540 +/* These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
9541 + */
9542 +
9543 +#define PRID_IMP_BCM6338 0x9000
9544 +#define PRID_IMP_BCM6345 0x8000
9545 +#define PRID_IMP_BCM6348 0x9100
9546 +
9547 /*
9548 * Definitions for 7:0 on legacy processors
9549 */
9550 @@ -200,7 +207,10 @@
9551 #define CPU_SB1A 62
9552 #define CPU_74K 63
9553 #define CPU_R14000 64
9554 -#define CPU_LAST 64
9555 +#define CPU_BCM6338 65
9556 +#define CPU_BCM6345 66
9557 +#define CPU_BCM6348 67
9558 +#define CPU_LAST 67
9559
9560 /*
9561 * ISA Level encodings
9562 diff -urN linux.old/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h linux.dev/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h
9563 --- linux.old/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h 1970-01-01 01:00:00.000000000 +0100
9564 +++ linux.dev/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h 2006-08-25 11:27:40.000000000 +0200
9565 @@ -0,0 +1,36 @@
9566 +#ifndef __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
9567 +#define __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
9568 +
9569 +#define cpu_has_tlb 1
9570 +#define cpu_has_4kex 4
9571 +#define cpu_has_4ktlb 8
9572 +#define cpu_has_fpu 0
9573 +#define cpu_has_32fpr 0
9574 +#define cpu_has_counter 0x40
9575 +#define cpu_has_watch 0
9576 +#define cpu_has_mips16 0
9577 +#define cpu_has_divec 0x200
9578 +#define cpu_has_vce 0
9579 +#define cpu_has_cache_cdex_p 0
9580 +#define cpu_has_cache_cdex_s 0
9581 +#define cpu_has_prefetch 0x40000
9582 +#define cpu_has_mcheck 0x2000
9583 +#define cpu_has_ejtag 0x4000
9584 +#define cpu_has_llsc 0x10000
9585 +#define cpu_has_vtag_icache 0
9586 +#define cpu_has_dc_aliases 0
9587 +#define cpu_has_ic_fills_f_dc 0
9588 +
9589 +#define cpu_has_nofpuex 0
9590 +#define cpu_has_64bits 0
9591 +#define cpu_has_64bit_zero_reg 0
9592 +#define cpu_has_64bit_gp_regs 0
9593 +#define cpu_has_64bit_addresses 0
9594 +
9595 +#define cpu_has_subset_pcaches 0
9596 +
9597 +#define cpu_dcache_line_size() 16
9598 +#define cpu_icache_line_size() 16
9599 +#define cpu_scache_line_size() 0
9600 +
9601 +#endif /* __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H */
9602 diff -urN linux.old/include/asm-mips/mach-generic/param.h linux.dev/include/asm-mips/mach-generic/param.h
9603 --- linux.old/include/asm-mips/mach-generic/param.h 2006-08-25 00:43:22.000000000 +0200
9604 +++ linux.dev/include/asm-mips/mach-generic/param.h 2006-08-25 00:39:38.000000000 +0200
9605 @@ -8,6 +8,6 @@
9606 #ifndef __ASM_MACH_GENERIC_PARAM_H
9607 #define __ASM_MACH_GENERIC_PARAM_H
9608
9609 -#define HZ 1000 /* Internal kernel timer frequency */
9610 +#define HZ 200 /* Internal kernel timer frequency */
9611
9612 #endif /* __ASM_MACH_GENERIC_PARAM_H */
9613 diff -urN linux.old/include/asm-mips/module.h linux.dev/include/asm-mips/module.h
9614 --- linux.old/include/asm-mips/module.h 2006-08-25 00:43:22.000000000 +0200
9615 +++ linux.dev/include/asm-mips/module.h 2006-08-25 00:39:38.000000000 +0200
9616 @@ -113,6 +113,12 @@
9617 #define MODULE_PROC_FAMILY "RM9000 "
9618 #elif defined CONFIG_CPU_SB1
9619 #define MODULE_PROC_FAMILY "SB1 "
9620 +#elif defined CONFIG_CPU_BCM6338
9621 +#define MODULE_PROC_FAMILY "BCM6338 "
9622 +#elif defined CONFIG_CPU_BCM6345
9623 +#define MODULE_PROC_FAMILY "BCM6345 "
9624 +#elif defined CONFIG_CPU_BCM6348
9625 +#define MODULE_PROC_FAMILY "BCM6348 "
9626 #else
9627 #error MODULE_PROC_FAMILY undefined for your processor configuration
9628 #endif
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