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[openwrt.git] / target / linux / orion / patches / 016-add_qnap_ts-409_support.patch
1 From: Sylver Bruneau <sylver.bruneau@googlemail.com>
2
3 Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
4 ---
5 arch/arm/mach-orion5x/Kconfig | 6 +
6 arch/arm/mach-orion5x/Makefile | 1 +
7 arch/arm/mach-orion5x/ts409-setup.c | 383 +++++++++++++++++++++++++++++++++++
8 3 files changed, 390 insertions(+), 0 deletions(-)
9 create mode 100644 arch/arm/mach-orion5x/ts409-setup.c
10
11 --- a/arch/arm/mach-orion5x/Kconfig
12 +++ b/arch/arm/mach-orion5x/Kconfig
13 @@ -44,6 +44,12 @@
14 Buffalo Linkstation Pro/Live platform. Both v1 and
15 v2 devices are supported.
16
17 +config MACH_TS409
18 + bool "QNAP TS-409"
19 + help
20 + Say 'Y' here if you want your kernel to support the
21 + QNAP TS-409 platform.
22 +
23 endmenu
24
25 endif
26 --- a/arch/arm/mach-orion5x/Makefile
27 +++ b/arch/arm/mach-orion5x/Makefile
28 @@ -5,3 +5,4 @@
29 obj-$(CONFIG_MACH_LINKSTATION_PRO) += kurobox_pro-setup.o
30 obj-$(CONFIG_MACH_DNS323) += dns323-setup.o
31 obj-$(CONFIG_MACH_TS209) += ts209-setup.o
32 +obj-$(CONFIG_MACH_TS409) += ts409-setup.o
33 --- /dev/null
34 +++ b/arch/arm/mach-orion5x/ts409-setup.c
35 @@ -0,0 +1,383 @@
36 +/*
37 + * QNAP TS-409 Board Setup
38 + *
39 + * Maintainer: Sylver Bruneau <sylver.bruneau@gmail.com>
40 + *
41 + * This program is free software; you can redistribute it and/or
42 + * modify it under the terms of the GNU General Public License
43 + * as published by the Free Software Foundation; either version
44 + * 2 of the License, or (at your option) any later version.
45 + */
46 +
47 +#include <linux/kernel.h>
48 +#include <linux/init.h>
49 +#include <linux/platform_device.h>
50 +#include <linux/pci.h>
51 +#include <linux/irq.h>
52 +#include <linux/mtd/physmap.h>
53 +#include <linux/mv643xx_eth.h>
54 +#include <linux/gpio_keys.h>
55 +#include <linux/input.h>
56 +#include <linux/i2c.h>
57 +#include <linux/serial_reg.h>
58 +#include <asm/mach-types.h>
59 +#include <asm/gpio.h>
60 +#include <asm/mach/arch.h>
61 +#include <asm/mach/pci.h>
62 +#include <asm/arch/orion5x.h>
63 +#include "common.h"
64 +#include "mpp.h"
65 +
66 +/*****************************************************************************
67 + * QNAP TS-409 Info
68 + ****************************************************************************/
69 +
70 +/*
71 + * QNAP TS-409 hardware :
72 + * - Marvell 88F5281-D0
73 + * - Marvell 88SX7042 SATA controller (PCIe)
74 + * - Marvell 88E1118 Gigabit Ethernet PHY
75 + * - RTC S35390A (@0x30) on I2C bus
76 + * - 8MB NOR flash
77 + * - 256MB of DDR-2 RAM
78 + */
79 +
80 +/*
81 + * 8MB NOR flash Device bus boot chip select
82 + */
83 +
84 +#define QNAP_TS409_NOR_BOOT_BASE 0xff800000
85 +#define QNAP_TS409_NOR_BOOT_SIZE SZ_8M
86 +
87 +/****************************************************************************
88 + * 8MiB NOR flash. The struct mtd_partition is not in the same order as the
89 + * partitions on the device because we want to keep compatability with
90 + * existing QNAP firmware.
91 + *
92 + * Layout as used by QNAP:
93 + * [2] 0x00000000-0x00200000 : "Kernel"
94 + * [3] 0x00200000-0x00600000 : "RootFS1"
95 + * [4] 0x00600000-0x00700000 : "RootFS2"
96 + * [6] 0x00700000-0x00760000 : "NAS Config" (read-only)
97 + * [5] 0x00760000-0x00780000 : "U-Boot Config"
98 + * [1] 0x00780000-0x00800000 : "U-Boot" (read-only)
99 + ***************************************************************************/
100 +static struct mtd_partition qnap_ts409_partitions[] = {
101 + {
102 + .name = "U-Boot",
103 + .size = 0x00080000,
104 + .offset = 0x00780000,
105 + .mask_flags = MTD_WRITEABLE,
106 + }, {
107 + .name = "Kernel",
108 + .size = 0x00200000,
109 + .offset = 0,
110 + }, {
111 + .name = "RootFS1",
112 + .size = 0x00400000,
113 + .offset = 0x00200000,
114 + }, {
115 + .name = "RootFS2",
116 + .size = 0x00100000,
117 + .offset = 0x00600000,
118 + }, {
119 + .name = "U-Boot Config",
120 + .size = 0x00020000,
121 + .offset = 0x00760000,
122 + }, {
123 + .name = "NAS Config",
124 + .size = 0x00060000,
125 + .offset = 0x00700000,
126 + .mask_flags = MTD_WRITEABLE,
127 + },
128 +};
129 +
130 +static struct physmap_flash_data qnap_ts409_nor_flash_data = {
131 + .width = 1,
132 + .parts = qnap_ts409_partitions,
133 + .nr_parts = ARRAY_SIZE(qnap_ts409_partitions)
134 +};
135 +
136 +static struct resource qnap_ts409_nor_flash_resource = {
137 + .flags = IORESOURCE_MEM,
138 + .start = QNAP_TS409_NOR_BOOT_BASE,
139 + .end = QNAP_TS409_NOR_BOOT_BASE + QNAP_TS409_NOR_BOOT_SIZE - 1,
140 +};
141 +
142 +static struct platform_device qnap_ts409_nor_flash = {
143 + .name = "physmap-flash",
144 + .id = 0,
145 + .dev = { .platform_data = &qnap_ts409_nor_flash_data, },
146 + .num_resources = 1,
147 + .resource = &qnap_ts409_nor_flash_resource,
148 +};
149 +
150 +/*****************************************************************************
151 + * PCI
152 + ****************************************************************************/
153 +
154 +static int __init qnap_ts409_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
155 +{
156 + int irq;
157 +
158 + /*
159 + * Check for devices with hard-wired IRQs.
160 + */
161 + irq = orion5x_pci_map_irq(dev, slot, pin);
162 + if (irq != -1)
163 + return irq;
164 +
165 + /*
166 + * PCI isn't used on the TS-409
167 + */
168 + printk(KERN_ERR "kurobox_pro_pci_map_irq failed, unknown bus\n");
169 + return -1;
170 +}
171 +
172 +static struct hw_pci qnap_ts409_pci __initdata = {
173 + .nr_controllers = 2,
174 + .swizzle = pci_std_swizzle,
175 + .setup = orion5x_pci_sys_setup,
176 + .scan = orion5x_pci_sys_scan_bus,
177 + .map_irq = qnap_ts409_pci_map_irq,
178 +};
179 +
180 +static int __init qnap_ts409_pci_init(void)
181 +{
182 + if (machine_is_ts409())
183 + pci_common_init(&qnap_ts409_pci);
184 +
185 + return 0;
186 +}
187 +
188 +subsys_initcall(qnap_ts409_pci_init);
189 +
190 +/*****************************************************************************
191 + * Ethernet
192 + ****************************************************************************/
193 +
194 +static struct mv643xx_eth_platform_data qnap_ts409_eth_data = {
195 + .phy_addr = 8,
196 +};
197 +
198 +static int __init parse_hex_nibble(char n)
199 +{
200 + if (n >= '0' && n <= '9')
201 + return n - '0';
202 +
203 + if (n >= 'A' && n <= 'F')
204 + return n - 'A' + 10;
205 +
206 + if (n >= 'a' && n <= 'f')
207 + return n - 'a' + 10;
208 +
209 + return -1;
210 +}
211 +
212 +static int __init parse_hex_byte(const char *b)
213 +{
214 + int hi;
215 + int lo;
216 +
217 + hi = parse_hex_nibble(b[0]);
218 + lo = parse_hex_nibble(b[1]);
219 +
220 + if (hi < 0 || lo < 0)
221 + return -1;
222 +
223 + return (hi << 4) | lo;
224 +}
225 +
226 +static int __init check_mac_addr(const char *addr_str)
227 +{
228 + u_int8_t addr[6];
229 + int i;
230 +
231 + for (i = 0; i < 6; i++) {
232 + int byte;
233 +
234 + /*
235 + * Enforce "xx:xx:xx:xx:xx:xx\n" format.
236 + */
237 + if (addr_str[(i * 3) + 2] != ((i < 5) ? ':' : '\n'))
238 + return -1;
239 +
240 + byte = parse_hex_byte(addr_str + (i * 3));
241 + if (byte < 0)
242 + return -1;
243 + addr[i] = byte;
244 + }
245 +
246 + printk(KERN_INFO "ts409: found ethernet mac address ");
247 + for (i = 0; i < 6; i++)
248 + printk("%.2x%s", addr[i], (i < 5) ? ":" : ".\n");
249 +
250 + memcpy(qnap_ts409_eth_data.mac_addr, addr, 6);
251 +
252 + return 0;
253 +}
254 +
255 +/*
256 + * The 'NAS Config' flash partition has an ext2 filesystem which
257 + * contains a file that has the ethernet MAC address in plain text
258 + * (format "xx:xx:xx:xx:xx:xx\n".)
259 + */
260 +static void __init ts409_find_mac_addr(void)
261 +{
262 + unsigned long addr;
263 +
264 + for (addr = 0x00700000; addr < 0x00760000; addr += 1024) {
265 + char *nor_page;
266 + int ret = 0;
267 +
268 + nor_page = ioremap(QNAP_TS409_NOR_BOOT_BASE + addr, 1024);
269 + if (nor_page != NULL) {
270 + ret = check_mac_addr(nor_page);
271 + iounmap(nor_page);
272 + }
273 +
274 + if (ret == 0)
275 + break;
276 + }
277 +}
278 +
279 +/*****************************************************************************
280 + * RTC S35390A on I2C bus
281 + ****************************************************************************/
282 +
283 +#define TS409_RTC_GPIO 10
284 +
285 +static struct i2c_board_info __initdata qnap_ts409_i2c_rtc = {
286 + I2C_BOARD_INFO("s35390a", 0x30),
287 + .irq = 0,
288 +};
289 +
290 +/****************************************************************************
291 + * GPIO Attached Keys
292 + * Power button is attached to the PIC microcontroller
293 + ****************************************************************************/
294 +
295 +#define QNAP_TS409_GPIO_KEY_MEDIA 15
296 +
297 +static struct gpio_keys_button qnap_ts409_buttons[] = {
298 + {
299 + .code = KEY_RESTART,
300 + .gpio = QNAP_TS409_GPIO_KEY_MEDIA,
301 + .desc = "USB Copy Button",
302 + .active_low = 1,
303 + },
304 +};
305 +
306 +static struct gpio_keys_platform_data qnap_ts409_button_data = {
307 + .buttons = qnap_ts409_buttons,
308 + .nbuttons = ARRAY_SIZE(qnap_ts409_buttons),
309 +};
310 +
311 +static struct platform_device qnap_ts409_button_device = {
312 + .name = "gpio-keys",
313 + .id = -1,
314 + .num_resources = 0,
315 + .dev = {
316 + .platform_data = &qnap_ts409_button_data,
317 + },
318 +};
319 +
320 +/*****************************************************************************
321 + * General Setup
322 + ****************************************************************************/
323 +
324 +/*
325 + * QNAP TS-409 specific power off method via UART1-attached PIC
326 + */
327 +
328 +#define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2))
329 +
330 +static void qnap_ts409_power_off(void)
331 +{
332 + /* 19200 baud divisor */
333 + const unsigned divisor = ((ORION5X_TCLK + (8 * 19200)) / (16 * 19200));
334 +
335 + pr_info("%s: triggering power-off...\n", __func__);
336 +
337 + /* hijack uart1 and reset into sane state (19200,8n1) */
338 + writel(0x83, UART1_REG(LCR));
339 + writel(divisor & 0xff, UART1_REG(DLL));
340 + writel((divisor >> 8) & 0xff, UART1_REG(DLM));
341 + writel(0x03, UART1_REG(LCR));
342 + writel(0x00, UART1_REG(IER));
343 + writel(0x00, UART1_REG(FCR));
344 + writel(0x00, UART1_REG(MCR));
345 +
346 + /* send the power-off command 'A' to PIC */
347 + writel('A', UART1_REG(TX));
348 +}
349 +
350 +static void __init qnap_ts409_init(void)
351 +{
352 + /*
353 + * Setup basic Orion functions. Need to be called early.
354 + */
355 + orion5x_init();
356 +
357 + orion5x_mpp_conf(0, MPP_UNUSED);
358 + orion5x_mpp_conf(1, MPP_UNUSED);
359 + orion5x_mpp_conf(2, MPP_UNUSED);
360 + orion5x_mpp_conf(3, MPP_UNUSED);
361 + orion5x_mpp_conf(4, MPP_GPIO); /* HDD 1 status */
362 + orion5x_mpp_conf(5, MPP_GPIO); /* HDD 2 status */
363 + orion5x_mpp_conf(6, MPP_GPIO); /* HDD 3 status */
364 + orion5x_mpp_conf(7, MPP_GPIO); /* HDD 4 status */
365 + orion5x_mpp_conf(8, MPP_UNUSED);
366 + orion5x_mpp_conf(9, MPP_UNUSED);
367 + orion5x_mpp_conf(10, MPP_GPIO); /* RTC int */
368 + orion5x_mpp_conf(11, MPP_UNUSED);
369 + orion5x_mpp_conf(12, MPP_UNUSED);
370 + orion5x_mpp_conf(13, MPP_UNUSED);
371 + orion5x_mpp_conf(14, MPP_GPIO); /* SW_RST */
372 + orion5x_mpp_conf(15, MPP_GPIO); /* USB copy button */
373 + orion5x_mpp_conf(16, MPP_UART); /* UART1 RXD */
374 + orion5x_mpp_conf(17, MPP_UART); /* UART1 TXD */
375 + orion5x_mpp_conf(18, MPP_UNUSED);
376 + orion5x_mpp_conf(19, MPP_UNUSED);
377 +
378 + /*
379 + * Configure peripherals.
380 + */
381 + orion5x_ehci0_init();
382 + ts409_find_mac_addr();
383 + orion5x_eth_init(&qnap_ts409_eth_data);
384 + orion5x_i2c_init();
385 + orion5x_uart0_init();
386 +
387 + orion5x_setup_dev_boot_win(QNAP_TS409_NOR_BOOT_BASE,
388 + QNAP_TS409_NOR_BOOT_SIZE);
389 + platform_device_register(&qnap_ts409_nor_flash);
390 +
391 + platform_device_register(&qnap_ts409_button_device);
392 +
393 + /* Get RTC IRQ and register the chip */
394 + if (gpio_request(TS409_RTC_GPIO, "rtc") == 0) {
395 + if (gpio_direction_input(TS409_RTC_GPIO) == 0)
396 + qnap_ts409_i2c_rtc.irq = gpio_to_irq(TS409_RTC_GPIO);
397 + else
398 + gpio_free(TS409_RTC_GPIO);
399 + }
400 + if (qnap_ts409_i2c_rtc.irq == 0)
401 + pr_warning("qnap_ts409_init: failed to get RTC IRQ\n");
402 + i2c_register_board_info(0, &qnap_ts409_i2c_rtc, 1);
403 +
404 + /* register ts409 specific power-off method */
405 + pm_power_off = qnap_ts409_power_off;
406 +}
407 +
408 +MACHINE_START(TS409, "QNAP TS-409")
409 + /* Maintainer: Sylver Bruneau <sylver.bruneau@gmail.com> */
410 + .phys_io = ORION5X_REGS_PHYS_BASE,
411 + .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
412 + .boot_params = 0x00000100,
413 + .init_machine = qnap_ts409_init,
414 + .map_io = orion5x_map_io,
415 + .init_irq = orion5x_init_irq,
416 + .timer = &orion5x_timer,
417 + .fixup = tag_fixup_mem32,
418 +MACHINE_END
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