target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/sbutils.h

   1 /*
   2  * Misc utility routines for accessing chip-specific features
   3  * of Broadcom HNBU SiliconBackplane-based chips.
   4  *
   5  * Copyright 2006, Broadcom Corporation
   6  * All Rights Reserved.
   7  *
   8  * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
   9  * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
  10  * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
  11  * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
  12  *
  13  * $Id: sbutils.h,v 1.4 2006/04/08 07:12:42 honor Exp $
  14  */
  15
  16 #ifndef _sbutils_h_
  17 #define _sbutils_h_
  18
  19 /*
  20  * Datastructure to export all chip specific common variables
  21  * public (read-only) portion of sbutils handle returned by
  22  * sb_attach()/sb_kattach()
  23 */
  24
  25 struct sb_pub {
  26
  27         uint    bustype;                /* SB_BUS, PCI_BUS  */
  28         uint    buscoretype;            /* SB_PCI, SB_PCMCIA, SB_PCIE */
  29         uint    buscorerev;             /* buscore rev */
  30         uint    buscoreidx;             /* buscore index */
  31         int     ccrev;                  /* chip common core rev */
  32         uint    boardtype;              /* board type */
  33         uint    boardvendor;            /* board vendor */
  34         uint    chip;                   /* chip number */
  35         uint    chiprev;                /* chip revision */
  36         uint    chippkg;                /* chip package option */
  37         uint    sonicsrev;              /* sonics backplane rev */
  38 };
  39
  40 typedef const struct sb_pub  sb_t;
  41
  42 /*
  43  * Many of the routines below take an 'sbh' handle as their first arg.
  44  * Allocate this by calling sb_attach().  Free it by calling sb_detach().
  45  * At any one time, the sbh is logically focused on one particular sb core
  46  * (the "current core").
  47  * Use sb_setcore() or sb_setcoreidx() to change the association to another core.
  48  */
  49
  50 #define SB_OSH          NULL    /* Use for sb_kattach when no osh is available */
  51 /* exported externs */
  52 extern sb_t *sb_attach(uint pcidev, osl_t *osh, void *regs, uint bustype,
  53                        void *sdh, char **vars, uint *varsz);
  54 extern sb_t *sb_kattach(void);
  55 extern void sb_detach(sb_t *sbh);
  56 extern uint sb_chip(sb_t *sbh);
  57 extern uint sb_chiprev(sb_t *sbh);
  58 extern uint sb_chipcrev(sb_t *sbh);
  59 extern uint sb_chippkg(sb_t *sbh);
  60 extern uint sb_pcirev(sb_t *sbh);
  61 extern bool sb_war16165(sb_t *sbh);
  62 extern uint sb_pcmciarev(sb_t *sbh);
  63 extern uint sb_boardvendor(sb_t *sbh);
  64 extern uint sb_boardtype(sb_t *sbh);
  65 extern uint sb_bus(sb_t *sbh);
  66 extern uint sb_buscoretype(sb_t *sbh);
  67 extern uint sb_buscorerev(sb_t *sbh);
  68 extern uint sb_corelist(sb_t *sbh, uint coreid[]);
  69 extern uint sb_coreid(sb_t *sbh);
  70 extern uint sb_coreidx(sb_t *sbh);
  71 extern uint sb_coreunit(sb_t *sbh);
  72 extern uint sb_corevendor(sb_t *sbh);
  73 extern uint sb_corerev(sb_t *sbh);
  74 extern void *sb_osh(sb_t *sbh);
  75 extern void sb_setosh(sb_t *sbh, osl_t *osh);
  76 extern void *sb_coreregs(sb_t *sbh);
  77 extern uint32 sb_coreflags(sb_t *sbh, uint32 mask, uint32 val);
  78 extern uint32 sb_coreflagshi(sb_t *sbh, uint32 mask, uint32 val);
  79 extern bool sb_iscoreup(sb_t *sbh);
  80 extern void *sb_setcoreidx(sb_t *sbh, uint coreidx);
  81 extern void *sb_setcore(sb_t *sbh, uint coreid, uint coreunit);
  82 extern int sb_corebist(sb_t *sbh);
  83 extern void sb_commit(sb_t *sbh);
  84 extern uint32 sb_base(uint32 admatch);
  85 extern uint32 sb_size(uint32 admatch);
  86 extern void sb_core_reset(sb_t *sbh, uint32 bits, uint32 resetbits);
  87 extern void sb_core_tofixup(sb_t *sbh);
  88 extern void sb_core_disable(sb_t *sbh, uint32 bits);
  89 extern uint32 sb_clock_rate(uint32 pll_type, uint32 n, uint32 m);
  90 extern uint32 sb_clock(sb_t *sbh);
  91 extern void sb_pci_setup(sb_t *sbh, uint coremask);
  92 extern void sb_pcmcia_init(sb_t *sbh);
  93 extern void sb_watchdog(sb_t *sbh, uint ticks);
  94 extern void *sb_gpiosetcore(sb_t *sbh);
  95 extern uint32 sb_gpiocontrol(sb_t *sbh, uint32 mask, uint32 val, uint8 priority);
  96 extern uint32 sb_gpioouten(sb_t *sbh, uint32 mask, uint32 val, uint8 priority);
  97 extern uint32 sb_gpioout(sb_t *sbh, uint32 mask, uint32 val, uint8 priority);
  98 extern uint32 sb_gpioin(sb_t *sbh);
  99 extern uint32 sb_gpiointpolarity(sb_t *sbh, uint32 mask, uint32 val, uint8 priority);
 100 extern uint32 sb_gpiointmask(sb_t *sbh, uint32 mask, uint32 val, uint8 priority);
 101 extern uint32 sb_gpioled(sb_t *sbh, uint32 mask, uint32 val);
 102 extern uint32 sb_gpioreserve(sb_t *sbh, uint32 gpio_num, uint8 priority);
 103 extern uint32 sb_gpiorelease(sb_t *sbh, uint32 gpio_num, uint8 priority);
 104
 105 extern void sb_clkctl_init(sb_t *sbh);
 106 extern uint16 sb_clkctl_fast_pwrup_delay(sb_t *sbh);
 107 extern bool sb_clkctl_clk(sb_t *sbh, uint mode);
 108 extern int sb_clkctl_xtal(sb_t *sbh, uint what, bool on);
 109 extern void sb_register_intr_callback(sb_t *sbh, void *intrsoff_fn, void *intrsrestore_fn,
 110                                       void *intrsenabled_fn, void *intr_arg);
 111 extern uint32 sb_set_initiator_to(sb_t *sbh, uint32 to);
 112 extern int sb_corepciid(sb_t *sbh, uint func, uint16 *pcivendor, uint16 *pcidevice,
 113                         uint8 *pciclass, uint8 *pcisubclass, uint8 *pciprogif,
 114                         uint8 *pciheader);
 115 extern uint sb_pcie_readreg(void *sbh, void* arg1, uint offset);
 116 extern uint sb_pcie_writereg(sb_t *sbh, void *arg1,  uint offset, uint val);
 117 extern uint32 sb_gpiotimerval(sb_t *sbh, uint32 mask, uint32 val);
 118 extern bool sb_backplane64(sb_t *sbh);
 119 extern void sb_btcgpiowar(sb_t *sbh);
 120
 121
 122
 123
 124 extern bool sb_deviceremoved(sb_t *sbh);
 125 extern uint32 sb_socram_size(sb_t *sbh);
 126
 127 /*
 128 * Build device path. Path size must be >= SB_DEVPATH_BUFSZ.
 129 * The returned path is NULL terminated and has trailing '/'.
 130 * Return 0 on success, nonzero otherwise.
 131 */
 132 extern int sb_devpath(sb_t *sbh, char *path, int size);
 133
 134 /* clkctl xtal what flags */
 135 #define XTAL                    0x1             /* primary crystal oscillator (2050) */
 136 #define PLL                     0x2             /* main chip pll */
 137
 138 /* clkctl clk mode */
 139 #define CLK_FAST                0               /* force fast (pll) clock */
 140 #define CLK_DYNAMIC             2               /* enable dynamic clock control */
 141
 142
 143 /* GPIO usage priorities */
 144 #define GPIO_DRV_PRIORITY       0               /* Driver */
 145 #define GPIO_APP_PRIORITY       1               /* Application */
 146 #define GPIO_HI_PRIORITY   2            /* Highest priority. Ignore GPIO reservation */
 147
 148 /* device path */
 149 #define SB_DEVPATH_BUFSZ        16              /* min buffer size in bytes */
 150
 151 #endif  /* _sbutils_h_ */