package/madwifi/patches/450-new_hal.patch

   1 --- a/ath_hal/ah_os.h
   2 +++ b/ath_hal/ah_os.h
   3 @@ -156,80 +156,23 @@ extern u_int32_t __ahdecl ath_hal_getupt
   4  #endif
   5  #endif                         /* AH_BYTE_ORDER */
   6
   7 -/*
   8 - * Some big-endian architectures don't set CONFIG_GENERIC_IOMAP, but fail to
   9 - * implement iowrite32be and ioread32be.  Provide compatibility macros when
  10 - * it's needed.
  11 - *
  12 - * As of Linux 2.6.24, only MIPS, PARISC and PowerPC implement iowrite32be and
  13 - * ioread32be as functions.
  14 - *
  15 - * The downside or the replacement macros it that we may be byte-swapping data
  16 - * for the second time, so the native implementations should be preferred.
  17 - */
  18 -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)) && \
  19 -       !defined(CONFIG_GENERIC_IOMAP) && (AH_BYTE_ORDER == AH_BIG_ENDIAN) && \
  20 -       !defined(__mips__) && !defined(__hppa__) && !defined(__powerpc__)
  21 -# ifndef iowrite32be
  22 -#  define iowrite32be(_val, _addr) iowrite32(swab32((_val)), (_addr))
  23 -# endif
  24 -# ifndef ioread32be
  25 -#  define ioread32be(_addr) swab32(ioread32((_addr)))
  26 -# endif
  27 -#endif
  28 +#define IS_SWAPPED(_ah, _reg) \
  29 +       ((_ah)->ah_swapped && \
  30 +               (((0x4000 <= (_reg)) && ((_reg) < 0x5000)) || \
  31 +                ((0x7000 <= (_reg)) && ((_reg) < 0x8000))))
  32 +
  33 +#define SWAPREG(_ah, _reg, _val) \
  34 +       (IS_SWAPPED(_ah, _reg) ? cpu_to_le32(_val) : (_val))
  35
  36  /*
  37   * The register accesses are done using target-specific functions when
  38   * debugging is enabled (AH_DEBUG) or it's explicitly requested for the target.
  39 - *
  40 - * The hardware registers use little-endian byte order natively.  Big-endian
  41 - * systems are configured by HAL to enable hardware byte-swap of register reads
  42 - * and writes at reset.  This avoid the need to byte-swap the data in software.
  43 - * However, the registers in a certain area from 0x4000 to 0x4fff (PCI clock
  44 - * domain registers) are not byte swapped!
  45 - *
  46 - * Since Linux I/O primitives default to little-endian operations, we only
  47 - * need to suppress byte-swapping on big-endian systems outside the area used
  48 - * by the PCI clock domain registers.
  49   */
  50 -#if (AH_BYTE_ORDER == AH_BIG_ENDIAN)
  51 -#define is_reg_le(__reg) ((0x4000 <= (__reg) && (__reg) < 0x5000))
  52 -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
  53 -#define _OS_REG_WRITE(_ah, _reg, _val) do {                    \
  54 -        is_reg_le(_reg) ?                                      \
  55 -        iowrite32((_val), (_ah)->ah_sh + (_reg)) :             \
  56 -        iowrite32be((_val), (_ah)->ah_sh + (_reg));            \
  57 -       } while (0)
  58 -#define _OS_REG_READ(_ah, _reg)                                        \
  59 -       (is_reg_le(_reg) ?                                      \
  60 -        ioread32((_ah)->ah_sh + (_reg)) :                      \
  61 -        ioread32be((_ah)->ah_sh + (_reg)))
  62 -#else
  63 -#define _OS_REG_WRITE(_ah, _reg, _val) do {                    \
  64 -        writel(is_reg_le(_reg) ?                               \
  65 -               (_val) : cpu_to_le32(_val),                     \
  66 -               (_ah)->ah_sh + (_reg));                         \
  67 -       } while (0)
  68 -#define _OS_REG_READ(_ah, _reg)                                        \
  69 -       (is_reg_le(_reg) ?                                      \
  70 -        readl((_ah)->ah_sh + (_reg)) :                         \
  71 -        cpu_to_le32(readl((_ah)->ah_sh + (_reg))))
  72 -#endif                         /* KERNEL_VERSION(2,6,12) */
  73 -#else                          /* AH_BYTE_ORDER != AH_BIG_ENDIAN */
  74 -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
  75 -#define _OS_REG_WRITE(_ah, _reg, _val) do {                    \
  76 -        iowrite32((_val), (_ah)->ah_sh + (_reg));              \
  77 -       } while (0)
  78 -#define _OS_REG_READ(_ah, _reg)                                        \
  79 -       ioread32((_ah)->ah_sh + (_reg))
  80 -#else
  81  #define _OS_REG_WRITE(_ah, _reg, _val) do {                    \
  82 -        writel((_val), (_ah)->ah_sh + (_reg));                 \
  83 -       } while (0)
  84 +        __raw_writel(SWAPREG(_ah, _reg, _val), (_ah)->ah_sh + (_reg));         \
  85 +} while (0)
  86  #define _OS_REG_READ(_ah, _reg)                                        \
  87 -       readl((_ah)->ah_sh + (_reg))
  88 -#endif                         /* KERNEL_VERSION(2,6,12) */
  89 -#endif                         /* AH_BYTE_ORDER != AH_BIG_ENDIAN */
  90 +        SWAPREG(_ah, _reg, __raw_readl((_ah)->ah_sh + (_reg)))
  91
  92  /*
  93   * The functions in this section are not intended to be invoked by MadWifi
  94 --- a/ath/if_ath.c
  95 +++ b/ath/if_ath.c
  96 @@ -606,6 +606,14 @@ ath_attach(u_int16_t devid, struct net_d
  97         }
  98         sc->sc_ah = ah;
  99
 100 +       /* WAR for AR7100 PCI bug */
 101 +#ifdef CONFIG_ATHEROS_AR71XX
 102 +       if ((ar_device(sc->devid) >= 5210) && (ar_device(sc->devid) < 5416)) {
 103 +               ath_hal_setcapability(ah, HAL_CAP_DMABURST_RX, 0, HAL_DMABURST_4B, NULL);
 104 +               ath_hal_setcapability(ah, HAL_CAP_DMABURST_TX, 0, HAL_DMABURST_4B, NULL);
 105 +       }
 106 +#endif
 107 +
 108         /*
 109          * Check if the MAC has multi-rate retry support.
 110          * We do this by trying to setup a fake extended
 111 @@ -7555,7 +7563,7 @@ ath_txq_setup(struct ath_softc *sc, int
 112         if (qtype == HAL_TX_QUEUE_UAPSD)
 113                 qi.tqi_qflags = HAL_TXQ_TXDESCINT_ENABLE;
 114         else
 115 -               qi.tqi_qflags = HAL_TXQ_TXEOLINT_ENABLE |
 116 +               qi.tqi_qflags = HAL_TXQ_TXEOLINT_ENABLE | HAL_TXQ_TXOKINT_ENABLE |
 117                         HAL_TXQ_TXDESCINT_ENABLE;
 118         qnum = ath_hal_setuptxqueue(ah, qtype, &qi);
 119         if (qnum == -1) {
 120 --- a/ath_hal/ah_os.c
 121 +++ b/ath_hal/ah_os.c
 122 @@ -126,6 +126,13 @@ ath_hal_printf(struct ath_hal *ah, const
 123  }
 124  EXPORT_SYMBOL(ath_hal_printf);
 125
 126 +void __ahdecl
 127 +ath_hal_printstr(struct ath_hal *ah, const char *str)
 128 +{
 129 +       printk("%s", str);
 130 +}
 131 +EXPORT_SYMBOL(ath_hal_printstr);
 132 +
 133  /*
 134   * Format an Ethernet MAC for printing.
 135   */