ixp4xx: fix lzma/jffs2 config options
[openwrt.git] / target / linux / ixp4xx / patches-2.6.33 / 190-cambria_support.patch
1 --- /dev/null
2 +++ b/arch/arm/mach-ixp4xx/cambria-pci.c
3 @@ -0,0 +1,74 @@
4 +/*
5 + * arch/arch/mach-ixp4xx/cambria-pci.c
6 + *
7 + * PCI setup routines for Gateworks Cambria series
8 + *
9 + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
10 + *
11 + * based on coyote-pci.c:
12 + * Copyright (C) 2002 Jungo Software Technologies.
13 + * Copyright (C) 2003 MontaVista Softwrae, Inc.
14 + *
15 + * Maintainer: Imre Kaloz <kaloz@openwrt.org>
16 + *
17 + * This program is free software; you can redistribute it and/or modify
18 + * it under the terms of the GNU General Public License version 2 as
19 + * published by the Free Software Foundation.
20 + *
21 + */
22 +
23 +#include <linux/kernel.h>
24 +#include <linux/pci.h>
25 +#include <linux/init.h>
26 +#include <linux/irq.h>
27 +
28 +#include <asm/mach-types.h>
29 +#include <mach/hardware.h>
30 +#include <asm/irq.h>
31 +
32 +#include <asm/mach/pci.h>
33 +
34 +extern void ixp4xx_pci_preinit(void);
35 +extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
36 +extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
37 +
38 +void __init cambria_pci_preinit(void)
39 +{
40 + set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
41 + set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
42 + set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
43 + set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
44 +
45 + ixp4xx_pci_preinit();
46 +}
47 +
48 +static int __init cambria_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
49 +{
50 + if (slot == 1)
51 + return IRQ_IXP4XX_GPIO11;
52 + else if (slot == 2)
53 + return IRQ_IXP4XX_GPIO10;
54 + else if (slot == 3)
55 + return IRQ_IXP4XX_GPIO9;
56 + else if (slot == 4)
57 + return IRQ_IXP4XX_GPIO8;
58 + else return -1;
59 +}
60 +
61 +struct hw_pci cambria_pci __initdata = {
62 + .nr_controllers = 1,
63 + .preinit = cambria_pci_preinit,
64 + .swizzle = pci_std_swizzle,
65 + .setup = ixp4xx_setup,
66 + .scan = ixp4xx_scan_bus,
67 + .map_irq = cambria_map_irq,
68 +};
69 +
70 +int __init cambria_pci_init(void)
71 +{
72 + if (machine_is_cambria())
73 + pci_common_init(&cambria_pci);
74 + return 0;
75 +}
76 +
77 +subsys_initcall(cambria_pci_init);
78 --- /dev/null
79 +++ b/arch/arm/mach-ixp4xx/cambria-setup.c
80 @@ -0,0 +1,429 @@
81 +/*
82 + * arch/arm/mach-ixp4xx/cambria-setup.c
83 + *
84 + * Board setup for the Gateworks Cambria series
85 + *
86 + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
87 + *
88 + * based on coyote-setup.c:
89 + * Copyright (C) 2003-2005 MontaVista Software, Inc.
90 + *
91 + * Author: Imre Kaloz <kaloz@openwrt.org>
92 + */
93 +
94 +#include <linux/device.h>
95 +#include <linux/i2c.h>
96 +#include <linux/i2c-gpio.h>
97 +#include <linux/i2c/at24.h>
98 +#include <linux/if_ether.h>
99 +#include <linux/init.h>
100 +#include <linux/kernel.h>
101 +#include <linux/leds.h>
102 +#include <linux/memory.h>
103 +#include <linux/netdevice.h>
104 +#include <linux/serial.h>
105 +#include <linux/serial_8250.h>
106 +#include <linux/slab.h>
107 +#include <linux/socket.h>
108 +#include <linux/types.h>
109 +#include <linux/tty.h>
110 +
111 +#include <mach/hardware.h>
112 +#include <asm/irq.h>
113 +#include <asm/mach-types.h>
114 +#include <asm/mach/arch.h>
115 +#include <asm/mach/flash.h>
116 +#include <asm/setup.h>
117 +
118 +struct cambria_board_info {
119 + unsigned char *model;
120 + void (*setup)(void);
121 +};
122 +
123 +static struct cambria_board_info *cambria_info __initdata;
124 +
125 +static struct flash_platform_data cambria_flash_data = {
126 + .map_name = "cfi_probe",
127 + .width = 2,
128 +};
129 +
130 +static struct resource cambria_flash_resource = {
131 + .flags = IORESOURCE_MEM,
132 +};
133 +
134 +static struct platform_device cambria_flash = {
135 + .name = "IXP4XX-Flash",
136 + .id = 0,
137 + .dev = {
138 + .platform_data = &cambria_flash_data,
139 + },
140 + .num_resources = 1,
141 + .resource = &cambria_flash_resource,
142 +};
143 +
144 +static struct i2c_gpio_platform_data cambria_i2c_gpio_data = {
145 + .sda_pin = 7,
146 + .scl_pin = 6,
147 +};
148 +
149 +static struct platform_device cambria_i2c_gpio = {
150 + .name = "i2c-gpio",
151 + .id = 0,
152 + .dev = {
153 + .platform_data = &cambria_i2c_gpio_data,
154 + },
155 +};
156 +
157 +static struct eth_plat_info cambria_npec_data = {
158 + .phy = 1,
159 + .rxq = 4,
160 + .txreadyq = 21,
161 +};
162 +
163 +static struct eth_plat_info cambria_npea_data = {
164 + .phy = 2,
165 + .rxq = 2,
166 + .txreadyq = 19,
167 +};
168 +
169 +static struct platform_device cambria_npec_device = {
170 + .name = "ixp4xx_eth",
171 + .id = IXP4XX_ETH_NPEC,
172 + .dev.platform_data = &cambria_npec_data,
173 +};
174 +
175 +static struct platform_device cambria_npea_device = {
176 + .name = "ixp4xx_eth",
177 + .id = IXP4XX_ETH_NPEA,
178 + .dev.platform_data = &cambria_npea_data,
179 +};
180 +
181 +static struct resource cambria_uart_resource = {
182 + .start = IXP4XX_UART1_BASE_PHYS,
183 + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
184 + .flags = IORESOURCE_MEM,
185 +};
186 +
187 +static struct plat_serial8250_port cambria_uart_data[] = {
188 + {
189 + .mapbase = IXP4XX_UART1_BASE_PHYS,
190 + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
191 + .irq = IRQ_IXP4XX_UART1,
192 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
193 + .iotype = UPIO_MEM,
194 + .regshift = 2,
195 + .uartclk = IXP4XX_UART_XTAL,
196 + },
197 + { },
198 +};
199 +
200 +static struct platform_device cambria_uart = {
201 + .name = "serial8250",
202 + .id = PLAT8250_DEV_PLATFORM,
203 + .dev = {
204 + .platform_data = cambria_uart_data,
205 + },
206 + .num_resources = 1,
207 + .resource = &cambria_uart_resource,
208 +};
209 +
210 +static struct resource cambria_pata_resources[] = {
211 + {
212 + .flags = IORESOURCE_MEM
213 + },
214 + {
215 + .flags = IORESOURCE_MEM,
216 + },
217 + {
218 + .name = "intrq",
219 + .start = IRQ_IXP4XX_GPIO12,
220 + .end = IRQ_IXP4XX_GPIO12,
221 + .flags = IORESOURCE_IRQ,
222 + },
223 +};
224 +
225 +static struct ixp4xx_pata_data cambria_pata_data = {
226 + .cs0_bits = 0xbfff3c03,
227 + .cs1_bits = 0xbfff3c03,
228 +};
229 +
230 +static struct platform_device cambria_pata = {
231 + .name = "pata_ixp4xx_cf",
232 + .id = 0,
233 + .dev.platform_data = &cambria_pata_data,
234 + .num_resources = ARRAY_SIZE(cambria_pata_resources),
235 + .resource = cambria_pata_resources,
236 +};
237 +
238 +static struct gpio_led cambria_gpio_leds[] = {
239 + {
240 + .name = "user", /* green led */
241 + .gpio = 5,
242 + .active_low = 1,
243 + }
244 +};
245 +
246 +static struct gpio_led_platform_data cambria_gpio_leds_data = {
247 + .num_leds = 1,
248 + .leds = cambria_gpio_leds,
249 +};
250 +
251 +static struct platform_device cambria_gpio_leds_device = {
252 + .name = "leds-gpio",
253 + .id = -1,
254 + .dev.platform_data = &cambria_gpio_leds_data,
255 +};
256 +
257 +static struct latch_led cambria_latch_leds[] = {
258 + {
259 + .name = "ledA", /* green led */
260 + .bit = 0,
261 + },
262 + {
263 + .name = "ledB", /* green led */
264 + .bit = 1,
265 + },
266 + {
267 + .name = "ledC", /* green led */
268 + .bit = 2,
269 + },
270 + {
271 + .name = "ledD", /* green led */
272 + .bit = 3,
273 + },
274 + {
275 + .name = "ledE", /* green led */
276 + .bit = 4,
277 + },
278 + {
279 + .name = "ledF", /* green led */
280 + .bit = 5,
281 + },
282 + {
283 + .name = "ledG", /* green led */
284 + .bit = 6,
285 + },
286 + {
287 + .name = "ledH", /* green led */
288 + .bit = 7,
289 + }
290 +};
291 +
292 +static struct latch_led_platform_data cambria_latch_leds_data = {
293 + .num_leds = 8,
294 + .leds = cambria_latch_leds,
295 + .mem = 0x53F40000,
296 +};
297 +
298 +static struct platform_device cambria_latch_leds_device = {
299 + .name = "leds-latch",
300 + .id = -1,
301 + .dev.platform_data = &cambria_latch_leds_data,
302 +};
303 +
304 +static struct resource cambria_usb0_resources[] = {
305 + {
306 + .start = 0xCD000000,
307 + .end = 0xCD000300,
308 + .flags = IORESOURCE_MEM,
309 + },
310 + {
311 + .start = 32,
312 + .flags = IORESOURCE_IRQ,
313 + },
314 +};
315 +
316 +static struct resource cambria_usb1_resources[] = {
317 + {
318 + .start = 0xCE000000,
319 + .end = 0xCE000300,
320 + .flags = IORESOURCE_MEM,
321 + },
322 + {
323 + .start = 33,
324 + .flags = IORESOURCE_IRQ,
325 + },
326 +};
327 +
328 +static u64 ehci_dma_mask = ~(u32)0;
329 +
330 +static struct platform_device cambria_usb0_device = {
331 + .name = "ixp4xx-ehci",
332 + .id = 0,
333 + .resource = cambria_usb0_resources,
334 + .num_resources = ARRAY_SIZE(cambria_usb0_resources),
335 + .dev = {
336 + .dma_mask = &ehci_dma_mask,
337 + .coherent_dma_mask = 0xffffffff,
338 + },
339 +};
340 +
341 +static struct platform_device cambria_usb1_device = {
342 + .name = "ixp4xx-ehci",
343 + .id = 1,
344 + .resource = cambria_usb1_resources,
345 + .num_resources = ARRAY_SIZE(cambria_usb1_resources),
346 + .dev = {
347 + .dma_mask = &ehci_dma_mask,
348 + .coherent_dma_mask = 0xffffffff,
349 + },
350 +};
351 +
352 +static struct platform_device *cambria_devices[] __initdata = {
353 + &cambria_i2c_gpio,
354 + &cambria_flash,
355 + &cambria_uart,
356 +};
357 +
358 +static void __init cambria_gw23xx_setup(void)
359 +{
360 + platform_device_register(&cambria_npec_device);
361 + platform_device_register(&cambria_npea_device);
362 +}
363 +
364 +static void __init cambria_gw2350_setup(void)
365 +{
366 + platform_device_register(&cambria_npec_device);
367 + platform_device_register(&cambria_npea_device);
368 +
369 + platform_device_register(&cambria_usb0_device);
370 + platform_device_register(&cambria_usb1_device);
371 +
372 + platform_device_register(&cambria_gpio_leds_device);
373 +}
374 +
375 +static void __init cambria_gw2358_setup(void)
376 +{
377 + platform_device_register(&cambria_npec_device);
378 + platform_device_register(&cambria_npea_device);
379 +
380 + platform_device_register(&cambria_usb0_device);
381 + platform_device_register(&cambria_usb1_device);
382 +
383 + platform_device_register(&cambria_pata);
384 +
385 + platform_device_register(&cambria_latch_leds_device);
386 +}
387 +
388 +static struct cambria_board_info cambria_boards[] __initdata = {
389 + {
390 + .model = "GW2350",
391 + .setup = cambria_gw2350_setup,
392 + }, {
393 + .model = "GW2358",
394 + .setup = cambria_gw2358_setup,
395 + }
396 +};
397 +
398 +static struct cambria_board_info * __init cambria_find_board_info(char *model)
399 +{
400 + int i;
401 + model[6] = '\0';
402 +
403 + for (i = 0; i < ARRAY_SIZE(cambria_boards); i++) {
404 + struct cambria_board_info *info = &cambria_boards[i];
405 + if (strcmp(info->model, model) == 0)
406 + return info;
407 + }
408 +
409 + return NULL;
410 +}
411 +
412 +static struct memory_accessor *at24_mem_acc;
413 +
414 +static void at24_setup(struct memory_accessor *mem_acc, void *context)
415 +{
416 + char mac_addr[ETH_ALEN];
417 + char model[7];
418 +
419 + at24_mem_acc = mem_acc;
420 +
421 + /* Read MAC addresses */
422 + if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x0, 6) == 6) {
423 + memcpy(&cambria_npec_data.hwaddr, mac_addr, ETH_ALEN);
424 + }
425 + if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x6, 6) == 6) {
426 + memcpy(&cambria_npea_data.hwaddr, mac_addr, ETH_ALEN);
427 + }
428 +
429 + /* Read the first 6 bytes of the model number */
430 + if (at24_mem_acc->read(at24_mem_acc, model, 0x20, 6) == 6) {
431 + cambria_info = cambria_find_board_info(model);
432 + }
433 +
434 +}
435 +
436 +static struct at24_platform_data cambria_eeprom_info = {
437 + .byte_len = 1024,
438 + .page_size = 16,
439 + .flags = AT24_FLAG_READONLY,
440 + .setup = at24_setup,
441 +};
442 +
443 +static struct i2c_board_info __initdata cambria_i2c_board_info[] = {
444 + {
445 + I2C_BOARD_INFO("ds1672", 0x68),
446 + },
447 + {
448 + I2C_BOARD_INFO("ad7418", 0x28),
449 + },
450 + {
451 + I2C_BOARD_INFO("24c08", 0x51),
452 + .platform_data = &cambria_eeprom_info
453 + },
454 +};
455 +
456 +static void __init cambria_init(void)
457 +{
458 + ixp4xx_sys_init();
459 +
460 + cambria_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
461 + cambria_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
462 +
463 + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
464 + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
465 +
466 + platform_add_devices(cambria_devices, ARRAY_SIZE(cambria_devices));
467 +
468 + cambria_pata_resources[0].start = 0x53e00000;
469 + cambria_pata_resources[0].end = 0x53e3ffff;
470 +
471 + cambria_pata_resources[1].start = 0x53e40000;
472 + cambria_pata_resources[1].end = 0x53e7ffff;
473 +
474 + cambria_pata_data.cs0_cfg = IXP4XX_EXP_CS3;
475 + cambria_pata_data.cs1_cfg = IXP4XX_EXP_CS3;
476 +
477 + i2c_register_board_info(0, cambria_i2c_board_info,
478 + ARRAY_SIZE(cambria_i2c_board_info));
479 +}
480 +
481 +static int __init cambria_model_setup(void)
482 +{
483 + if (!machine_is_cambria())
484 + return 0;
485 +
486 + if (cambria_info) {
487 + printk(KERN_DEBUG "Running on Gateworks Cambria %s\n",
488 + cambria_info->model);
489 + cambria_info->setup();
490 + } else {
491 + printk(KERN_INFO "Unknown/missing Cambria model number"
492 + " -- defaults will be used\n");
493 + cambria_gw23xx_setup();
494 + }
495 +
496 + return 0;
497 +}
498 +late_initcall(cambria_model_setup);
499 +
500 +MACHINE_START(CAMBRIA, "Gateworks Cambria series")
501 + /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
502 + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
503 + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
504 + .map_io = ixp4xx_map_io,
505 + .init_irq = ixp4xx_init_irq,
506 + .timer = &ixp4xx_timer,
507 + .boot_params = 0x0100,
508 + .init_machine = cambria_init,
509 +MACHINE_END
510 --- a/arch/arm/mach-ixp4xx/Kconfig
511 +++ b/arch/arm/mach-ixp4xx/Kconfig
512 @@ -25,6 +25,14 @@ config MACH_AVILA
513 Avila Network Platform. For more information on this platform,
514 see <file:Documentation/arm/IXP4xx>.
515
516 +config MACH_CAMBRIA
517 + bool "Cambria"
518 + select PCI
519 + help
520 + Say 'Y' here if you want your kernel to support the Gateworks
521 + Cambria series. For more information on this platform,
522 + see <file:Documentation/arm/IXP4xx>.
523 +
524 config MACH_LOFT
525 bool "Loft"
526 depends on MACH_AVILA
527 @@ -214,7 +222,7 @@ config CPU_IXP46X
528
529 config CPU_IXP43X
530 bool
531 - depends on MACH_KIXRP435
532 + depends on MACH_KIXRP435 || MACH_CAMBRIA
533 default y
534
535 config MACH_GTWX5715
536 --- a/arch/arm/mach-ixp4xx/Makefile
537 +++ b/arch/arm/mach-ixp4xx/Makefile
538 @@ -7,6 +7,7 @@ obj-pci-n :=
539
540 obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o
541 obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o
542 +obj-pci-$(CONFIG_MACH_CAMBRIA) += cambria-pci.o
543 obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o
544 obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o
545 obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o
546 @@ -29,6 +30,7 @@ obj-y += common.o
547
548 obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o
549 obj-$(CONFIG_MACH_AVILA) += avila-setup.o
550 +obj-$(CONFIG_MACH_CAMBRIA) += cambria-setup.o
551 obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o
552 obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o
553 obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o
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