ixp4xx: fix lzma/jffs2 config options
[openwrt.git] / target / linux / ixp4xx / patches-2.6.33 / 207-npe_driver_multiphy_support.patch
1 TODO: take care of additional PHYs through the PHY abstraction layer
2
3 --- a/arch/arm/mach-ixp4xx/include/mach/platform.h
4 +++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
5 @@ -72,7 +72,7 @@ extern unsigned long ixp4xx_exp_bus_size
6 /*
7 * Clock Speed Definitions.
8 */
9 -#define IXP4XX_PERIPHERAL_BUS_CLOCK (66) /* 66Mhzi APB BUS */
10 +#define IXP4XX_PERIPHERAL_BUS_CLOCK (66) /* 66Mhzi APB BUS */
11 #define IXP4XX_UART_XTAL 14745600
12
13 /*
14 @@ -95,12 +95,23 @@ struct sys_timer;
15 #define IXP4XX_ETH_NPEB 0x10
16 #define IXP4XX_ETH_NPEC 0x20
17
18 +#define IXP4XX_ETH_PHY_MAX_ADDR 32
19 +
20 /* Information about built-in Ethernet MAC interfaces */
21 struct eth_plat_info {
22 u8 phy; /* MII PHY ID, 0 - 31 */
23 u8 rxq; /* configurable, currently 0 - 31 only */
24 u8 txreadyq;
25 u8 hwaddr[6];
26 +
27 + u32 phy_mask;
28 +#if 0
29 + int speed;
30 + int duplex;
31 +#else
32 + int speed_10;
33 + int half_duplex;
34 +#endif
35 };
36
37 /* Information about built-in HSS (synchronous serial) interfaces */
38 --- a/drivers/net/arm/ixp4xx_eth.c
39 +++ b/drivers/net/arm/ixp4xx_eth.c
40 @@ -417,6 +417,37 @@ static int ixp4xx_phy_connect(struct net
41 struct eth_plat_info *plat = port->plat;
42 char phy_id[MII_BUS_ID_SIZE + 3];
43
44 + if (plat->phy == IXP4XX_ETH_PHY_MAX_ADDR) {
45 +#if 0
46 + switch (plat->speed) {
47 + case SPEED_10:
48 + case SPEED_100:
49 + break;
50 + default:
51 + printk(KERN_ERR "%s: invalid speed (%d)\n",
52 + dev->name, plat->speed);
53 + return -EINVAL;
54 + }
55 +
56 + switch (plat->duplex) {
57 + case DUPLEX_HALF:
58 + case DUPLEX_FULL:
59 + break;
60 + default:
61 + printk(KERN_ERR "%s: invalid duplex mode (%d)\n",
62 + dev->name, plat->duplex);
63 + return -EINVAL;
64 + }
65 + port->speed = plat->speed;
66 + port->duplex = plat->duplex;
67 +#else
68 + port->speed = plat->speed_10 ? SPEED_10 : SPEED_100;
69 + port->duplex = plat->half_duplex ? DUPLEX_HALF : DUPLEX_FULL;
70 +#endif
71 +
72 + return 0;
73 + }
74 +
75 snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, "0", plat->phy);
76 port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, 0,
77 PHY_INTERFACE_MODE_MII);
78 @@ -438,21 +469,32 @@ static void ixp4xx_phy_disconnect(struct
79 {
80 struct port *port = netdev_priv(dev);
81
82 - phy_disconnect(port->phydev);
83 + if (port->phydev)
84 + phy_disconnect(port->phydev);
85 }
86
87 static void ixp4xx_phy_start(struct net_device *dev)
88 {
89 struct port *port = netdev_priv(dev);
90
91 - phy_start(port->phydev);
92 + if (port->phydev) {
93 + phy_start(port->phydev);
94 + } else {
95 + port->link = 1;
96 + ixp4xx_update_link(dev);
97 + }
98 }
99
100 static void ixp4xx_phy_stop(struct net_device *dev)
101 {
102 struct port *port = netdev_priv(dev);
103
104 - phy_stop(port->phydev);
105 + if (port->phydev) {
106 + phy_stop(port->phydev);
107 + } else {
108 + port->link = 0;
109 + ixp4xx_update_link(dev);
110 + }
111 }
112
113 static inline void debug_pkt(struct net_device *dev, const char *func,
114 @@ -826,6 +868,10 @@ static int eth_ioctl(struct net_device *
115
116 if (!netif_running(dev))
117 return -EINVAL;
118 +
119 + if (!port->phydev)
120 + return -EOPNOTSUPP;
121 +
122 return phy_mii_ioctl(port->phydev, if_mii(req), cmd);
123 }
124
125 @@ -845,18 +891,30 @@ static void ixp4xx_get_drvinfo(struct ne
126 static int ixp4xx_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
127 {
128 struct port *port = netdev_priv(dev);
129 +
130 + if (!port->phydev)
131 + return -EOPNOTSUPP;
132 +
133 return phy_ethtool_gset(port->phydev, cmd);
134 }
135
136 static int ixp4xx_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
137 {
138 struct port *port = netdev_priv(dev);
139 +
140 + if (!port->phydev)
141 + return -EOPNOTSUPP;
142 +
143 return phy_ethtool_sset(port->phydev, cmd);
144 }
145
146 static int ixp4xx_nway_reset(struct net_device *dev)
147 {
148 struct port *port = netdev_priv(dev);
149 +
150 + if (!port->phydev)
151 + return -EOPNOTSUPP;
152 +
153 return phy_start_aneg(port->phydev);
154 }
155
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