target/linux/ar71xx/patches-3.2/123-MIPS-ath79-add-SoC-detection-code-for-AR934X.patch

   1 From 9c19e86a7eccf8efd159ba213290830164f33a71 Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <juhosg@openwrt.org>
   3 Date: Sun, 11 Dec 2011 17:36:42 +0100
   4 Subject: [PATCH 23/35] MIPS: ath79: add SoC detection code for AR934X
   5
   6 Also add 'soc_is_ar934[124x]' helper functions and a Kconfig
   7 symbol for the AR934X SoCs.
   8
   9 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  10 Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
  11 ---
  12  arch/mips/ath79/Kconfig                        |    4 ++++
  13  arch/mips/ath79/setup.c                        |   21 ++++++++++++++++++++-
  14  arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    2 ++
  15  arch/mips/include/asm/mach-ath79/ath79.h       |   23 +++++++++++++++++++++++
  16  4 files changed, 49 insertions(+), 1 deletions(-)
  17
  18 --- a/arch/mips/ath79/Kconfig
  19 +++ b/arch/mips/ath79/Kconfig
  20 @@ -69,6 +69,10 @@ config SOC_AR933X
  21         select USB_ARCH_HAS_EHCI
  22         def_bool n
  23
  24 +config SOC_AR934X
  25 +       select USB_ARCH_HAS_EHCI
  26 +       def_bool n
  27 +
  28  config ATH79_DEV_GPIO_BUTTONS
  29         def_bool n
  30
  31 --- a/arch/mips/ath79/setup.c
  32 +++ b/arch/mips/ath79/setup.c
  33 @@ -1,10 +1,11 @@
  34  /*
  35   *  Atheros AR71XX/AR724X/AR913X specific setup
  36   *
  37 + *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
  38   *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  39   *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  40   *
  41 - *  Parts of this file are based on Atheros' 2.6.15 BSP
  42 + *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
  43   *
  44   *  This program is free software; you can redistribute it and/or modify it
  45   *  under the terms of the GNU General Public License version 2 as published
  46 @@ -145,6 +146,24 @@ static void __init ath79_detect_sys_type
  47                 rev = id & AR933X_REV_ID_REVISION_MASK;
  48                 break;
  49
  50 +       case REV_ID_MAJOR_AR9341:
  51 +               ath79_soc = ATH79_SOC_AR9341;
  52 +               chip = "9341";
  53 +               rev = id & AR934X_REV_ID_REVISION_MASK;
  54 +               break;
  55 +
  56 +       case REV_ID_MAJOR_AR9342:
  57 +               ath79_soc = ATH79_SOC_AR9342;
  58 +               chip = "9342";
  59 +               rev = id & AR934X_REV_ID_REVISION_MASK;
  60 +               break;
  61 +
  62 +       case REV_ID_MAJOR_AR9344:
  63 +               ath79_soc = ATH79_SOC_AR9344;
  64 +               chip = "9344";
  65 +               rev = id & AR934X_REV_ID_REVISION_MASK;
  66 +               break;
  67 +
  68         default:
  69                 panic("ath79: unknown SoC, id:0x%08x\n", id);
  70         }
  71 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
  72 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
  73 @@ -271,6 +271,8 @@
  74
  75  #define AR724X_REV_ID_REVISION_MASK    0x3
  76
  77 +#define AR934X_REV_ID_REVISION_MASK     0xf
  78 +
  79  /*
  80   * SPI block
  81   */
  82 --- a/arch/mips/include/asm/mach-ath79/ath79.h
  83 +++ b/arch/mips/include/asm/mach-ath79/ath79.h
  84 @@ -29,6 +29,9 @@ enum ath79_soc_type {
  85         ATH79_SOC_AR9132,
  86         ATH79_SOC_AR9330,
  87         ATH79_SOC_AR9331,
  88 +       ATH79_SOC_AR9341,
  89 +       ATH79_SOC_AR9342,
  90 +       ATH79_SOC_AR9344,
  91  };
  92
  93  extern enum ath79_soc_type ath79_soc;
  94 @@ -75,6 +78,26 @@ static inline int soc_is_ar933x(void)
  95                 ath79_soc == ATH79_SOC_AR9331);
  96  }
  97
  98 +static inline int soc_is_ar9341(void)
  99 +{
 100 +       return (ath79_soc == ATH79_SOC_AR9341);
 101 +}
 102 +
 103 +static inline int soc_is_ar9342(void)
 104 +{
 105 +       return (ath79_soc == ATH79_SOC_AR9342);
 106 +}
 107 +
 108 +static inline int soc_is_ar9344(void)
 109 +{
 110 +       return (ath79_soc == ATH79_SOC_AR9344);
 111 +}
 112 +
 113 +static inline int soc_is_ar934x(void)
 114 +{
 115 +       return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
 116 +}
 117 +
 118  extern void __iomem *ath79_ddr_base;
 119  extern void __iomem *ath79_pll_base;
 120  extern void __iomem *ath79_reset_base;