target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch

   1 --- a/arch/mips/ath79/dev-eth.c
   2 +++ b/arch/mips/ath79/dev-eth.c
   3 @@ -331,6 +331,10 @@ static void ar934x_set_speed_ge1(int spe
   4         /* TODO */
   5  }
   6
   7 +static void ath79_ddr_no_flush(void)
   8 +{
   9 +}
  10 +
  11  static void ath79_ddr_flush_ge0(void)
  12  {
  13         ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0);
  14 @@ -371,16 +375,6 @@ static void ar933x_ddr_flush_ge1(void)
  15         ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1);
  16  }
  17
  18 -static void ar934x_ddr_flush_ge0(void)
  19 -{
  20 -       ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE0);
  21 -}
  22 -
  23 -static void ar934x_ddr_flush_ge1(void)
  24 -{
  25 -       ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE1);
  26 -}
  27 -
  28  static struct resource ath79_eth0_resources[] = {
  29         {
  30                 .name   = "mac_base",
  31 @@ -817,17 +811,16 @@ void __init ath79_register_eth(unsigned
  32                 if (id == 0) {
  33                         pdata->reset_bit = AR934X_RESET_GE0_MAC |
  34                                            AR934X_RESET_GE0_MDIO;
  35 -                       pdata->ddr_flush =ar934x_ddr_flush_ge0;
  36                         pdata->set_speed = ar934x_set_speed_ge0;
  37                 } else {
  38                         pdata->reset_bit = AR934X_RESET_GE1_MAC |
  39                                            AR934X_RESET_GE1_MDIO;
  40 -                       pdata->ddr_flush = ar934x_ddr_flush_ge1;
  41                         pdata->set_speed = ar934x_set_speed_ge1;
  42
  43                         pdata->switch_data = &ath79_switch_data;
  44                 }
  45
  46 +               pdata->ddr_flush = ath79_ddr_no_flush;
  47                 pdata->has_gbit = 1;
  48                 pdata->is_ar724x = 1;
  49