ar71xx: add default network config for the RB433UAH board
[openwrt.git] / package / ar7-atm / patches-D7.05.01.00 / 160-module-params.patch
1 Index: sangam_atm-D7.05.01.00/tn7atm.c
2 ===================================================================
3 --- sangam_atm-D7.05.01.00.orig/tn7atm.c 2010-03-07 18:27:11.000000000 +0100
4 +++ sangam_atm-D7.05.01.00/tn7atm.c 2010-03-07 18:27:34.000000000 +0100
5 @@ -95,6 +95,146 @@
6 MODULE_LICENSE("GPL");
7 MODULE_DESCRIPTION ("Tnetd73xx ATM Device Driver");
8 MODULE_AUTHOR ("Zhicheng Tang");
9 +
10 +int mp_sar_ipacemax = -1;
11 +module_param_named(ipacemax, mp_sar_ipacemax, int, 0);
12 +MODULE_PARM_DESC(ipacemax, "Interrupt pacing");
13 +
14 +char *mp_macc = NULL;
15 +module_param_named(macc, mp_macc, charp, 0);
16 +MODULE_PARM_DESC(macc, "MAC address");
17 +
18 +int mp_dsp_noboost = -1;
19 +module_param_named(dsp_noboost, mp_dsp_noboost, int, 0);
20 +MODULE_PARM_DESC(dsp_noboost, "Suppress DSP frequency boost");
21 +
22 +int mp_dsp_freq = -1;
23 +module_param_named(dsp_freq, mp_dsp_freq, int, 0);
24 +MODULE_PARM_DESC(dsp_freq, "Frequency to boost the DSP to");
25 +
26 +char *mp_featctl0 = NULL;
27 +module_param_named(featctl0, mp_featctl0, charp, 0);
28 +MODULE_PARM_DESC(featctl0, "DSL feature control 0");
29 +
30 +char *mp_featctl1 = NULL;
31 +module_param_named(featctl1, mp_featctl1, charp, 0);
32 +MODULE_PARM_DESC(featctl1, "DSL feature control 1");
33 +
34 +char *mp_phyctl0 = NULL;
35 +module_param_named(phyctl0, mp_phyctl0, charp, 0);
36 +MODULE_PARM_DESC(phyctl0, "DSL PHY control 0");
37 +
38 +char *mp_phyctl1 = NULL;
39 +module_param_named(phyctl1, mp_phyctl1, charp, 0);
40 +MODULE_PARM_DESC(phyctl1, "DSL PHY control 1");
41 +
42 +int mp_turbodsl = -1;
43 +module_param_named(turbodsl, mp_turbodsl, int, 0);
44 +MODULE_PARM_DESC(turbodsl, "Enable TurboDSL");
45 +
46 +int mp_sar_rxbuf = -1;
47 +module_param_named(sar_rxbuf, mp_sar_rxbuf, int, 0);
48 +MODULE_PARM_DESC(sar_rxbuf, "SAR RxBuf size");
49 +
50 +int mp_sar_rxmax = -1;
51 +module_param_named(sar_rxmax, mp_sar_rxmax, int, 0);
52 +MODULE_PARM_DESC(sar_rxmax, "SAR RxMax size");
53 +
54 +int mp_sar_txbuf = -1;
55 +module_param_named(sar_txbuf, mp_sar_txbuf, int, 0);
56 +MODULE_PARM_DESC(sar_txbuf, "SAR TxBuf size");
57 +
58 +int mp_sar_txmax = -1;
59 +module_param_named(sar_txmax, mp_sar_txmax, int, 0);
60 +MODULE_PARM_DESC(sar_txmax, "SAR TxMax size");
61 +
62 +char *mp_modulation = NULL;
63 +module_param_named(modulation, mp_modulation, charp, 0);
64 +MODULE_PARM_DESC(modulation, "Modulation");
65 +
66 +int mp_fine_gain_control = -1;
67 +module_param_named(fine_gain_control, mp_fine_gain_control, int, 0);
68 +MODULE_PARM_DESC(fine_gain_control, "Fine gain control");
69 +
70 +int mp_fine_gain_value = -1;
71 +module_param_named(fine_gain_value, mp_fine_gain_value, int, 0);
72 +MODULE_PARM_DESC(fine_gain_value, "Fine gain value");
73 +
74 +int mp_enable_margin_retrain = -1;
75 +module_param_named(enable_margin_retrain, mp_enable_margin_retrain, int, 0);
76 +MODULE_PARM_DESC(enable_margin_retrain, "Enable margin retrain");
77 +
78 +int mp_margin_threshold = -1;
79 +module_param_named(margin_threshold, mp_margin_threshold, int, 0);
80 +MODULE_PARM_DESC(margin_threshold, "Margin retrain treshold");
81 +
82 +int mp_enable_rate_adapt = -1;
83 +module_param_named(enable_rate_adapt, mp_enable_rate_adapt, int, 0);
84 +MODULE_PARM_DESC(enable_rate_adapt, "Enable rate adaption");
85 +
86 +int mp_powercutback = -1;
87 +module_param_named(powercutback, mp_powercutback, int, 0);
88 +MODULE_PARM_DESC(powercutback, "Enable / disable powercutback");
89 +
90 +int mp_trellis = -1;
91 +module_param_named(trellis, mp_trellis, int, 0);
92 +MODULE_PARM_DESC(trellis, "Enable / disable trellis coding");
93 +
94 +int mp_bitswap = -1;
95 +module_param_named(bitswap, mp_bitswap, int, 0);
96 +MODULE_PARM_DESC(bitswap, "Enable / disable bitswap");
97 +
98 +int mp_maximum_bits_per_carrier = -1;
99 +module_param_named(maximum_bits_per_carrier, mp_maximum_bits_per_carrier, int, 0);
100 +MODULE_PARM_DESC(maximum_bits_per_carrier, "Maximum bits per carrier");
101 +
102 +int mp_maximum_interleave_depth = -1;
103 +module_param_named(maximum_interleave_depth, mp_maximum_interleave_depth, int, 0);
104 +MODULE_PARM_DESC(maximum_interleave_depth, "Maximum interleave depth");
105 +
106 +int mp_pair_selection = -1;
107 +module_param_named(pair_selection, mp_pair_selection, int, 0);
108 +MODULE_PARM_DESC(pair_selection, "Pair selection");
109 +
110 +int mp_dgas_polarity = -1;
111 +module_param_named(dgas_polarity, mp_dgas_polarity, int, 0);
112 +MODULE_PARM_DESC(dgas_polarity, "DGAS polarity");
113 +
114 +int mp_los_alarm = -1;
115 +module_param_named(los_alarm, mp_los_alarm, int, 0);
116 +MODULE_PARM_DESC(los_alarm, "LOS alarm");
117 +
118 +char *mp_eoc_vendor_id = NULL;
119 +module_param_named(eoc_vendor_id, mp_eoc_vendor_id, charp, 0);
120 +MODULE_PARM_DESC(eoc_vendor_id, "EOC vendor id");
121 +
122 +int mp_eoc_vendor_revision = -1;
123 +module_param_named(eoc_vendor_revision, mp_eoc_vendor_revision, int, 0);
124 +MODULE_PARM_DESC(eoc_vendor_revision, "EOC vendor revision");
125 +
126 +char *mp_eoc_vendor_serialnum = NULL;
127 +module_param_named(eoc_vendor_serialnum, mp_eoc_vendor_serialnum, charp, 0);
128 +MODULE_PARM_DESC(eoc_vendor_serialnum, "EOC vendor serial number");
129 +
130 +char *mp_invntry_vernum = NULL;
131 +module_param_named(invntry_vernum, mp_invntry_vernum, charp, 0);
132 +MODULE_PARM_DESC(invntry_vernum, "Inventory revision number");
133 +
134 +int mp_dsl_bit_tmode = -1;
135 +module_param_named(dsl_bit_tmode, mp_dsl_bit_tmode, int, 0);
136 +MODULE_PARM_DESC(dsl_bit_tmode, "DSL bit training mode");
137 +
138 +int mp_high_precision = -1;
139 +module_param_named(high_precision, mp_high_precision, int, 0);
140 +MODULE_PARM_DESC(high_precision, "High precision");
141 +
142 +int mp_autopvc_enable = -1;
143 +module_param_named(autopvc_enable, mp_autopvc_enable, int, 0);
144 +MODULE_PARM_DESC(autopvc_enable, "Enable / disable automatic PVC");
145 +
146 +int mp_oam_lb_timeout = -1;
147 +module_param_named(oam_lb_timeout, mp_oam_lb_timeout, int, 0);
148 +MODULE_PARM_DESC(oam_lb_timeout, "OAM LB timeout");
149 #endif
150
151 #ifndef TRUE
152 @@ -728,9 +868,9 @@
153 * interrupt pacing
154 */
155 ptr = prom_getenv ("sar_ipacemax");
156 - if (ptr)
157 + if (ptr || mp_sar_ipacemax != -1)
158 {
159 - def_sar_inter_pace = os_atoi (ptr);
160 + def_sar_inter_pace = mp_sar_ipacemax == -1 ? os_atoi (ptr) : mp_sar_ipacemax;
161 }
162 /* avalanche_request_pacing (priv->sar_irq, ATM_SAR_INT_PACING_BLOCK_NUM,
163 def_sar_inter_pace); */
164 @@ -880,7 +1020,7 @@
165 char esi_addr[ESI_LEN] = { 0x00, 0x00, 0x11, 0x22, 0x33, 0x44 };
166 char *esiaddr_str = NULL;
167
168 - esiaddr_str = prom_getenv ("macc");
169 + esiaddr_str = mp_macc ? mp_macc : prom_getenv ("maca");
170
171 if (!esiaddr_str)
172 {
173 @@ -2139,15 +2279,15 @@
174 //UR8_MERGE_END CQ10450*
175
176 cp = prom_getenv ("dsp_noboost");
177 - if (cp)
178 + if (cp || mp_dsp_noboost != -1)
179 {
180 - dsp_noboost = os_atoi (cp);
181 + dsp_noboost = mp_dsp_noboost == -1 ? os_atoi (cp) : mp_dsp_noboost;
182 }
183
184 cp = (char *) prom_getenv ("dsp_freq");
185 - if (cp)
186 + if (cp || mp_dsp_freq != -1)
187 {
188 - dspfreq = os_atoi (cp);
189 + dspfreq = mp_dsp_freq == -1 ? os_atoi (cp) : mp_dsp_freq;
190 if (dspfreq == 250)
191 {
192 boostDsp = 1;
193 @@ -2396,15 +2536,17 @@
194 // Inter-Op DSL phy Control
195 // Note the setting of _dsl_Feature_0 and _dsl_Feature_1 must before
196 // dslhal_api_dslStartup (in tn7dsl_init()).
197 - if ((ptr = prom_getenv ("DSL_FEATURE_CNTL_0")) != NULL)
198 + if ((ptr = prom_getenv ("DSL_FEATURE_CNTL_0")) != NULL || mp_featctl0 != NULL)
199 {
200 - _dsl_Feature_0 = os_atoih (ptr);
201 + if (mp_featctl0 != NULL) ptr = mp_featctl0;
202 + _dsl_Feature_0 = os_atoh (ptr);
203 _dsl_Feature_0_defined = 1;
204 }
205
206 - if ((ptr = prom_getenv ("DSL_FEATURE_CNTL_1")) != NULL)
207 + if ((ptr = prom_getenv ("DSL_FEATURE_CNTL_1")) != NULL || mp_featctl1 != NULL)
208 {
209 - _dsl_Feature_1 = os_atoih (ptr);
210 + if (mp_featctl1 != NULL) ptr = mp_featctl1;
211 + _dsl_Feature_1 = os_atoh (ptr);
212 _dsl_Feature_1_defined = 1;
213 }
214
215 @@ -2412,15 +2554,17 @@
216 // DSL phy Feature Control
217 // Note the setting of _dsl_PhyControl_0 and _dsl_PhyControl_1 must before
218 // dslhal_api_dslStartup (in tn7dsl_init()).
219 - if ((ptr = prom_getenv ("DSL_PHY_CNTL_0")) != NULL)
220 + if ((ptr = prom_getenv ("DSL_PHY_CNTL_0")) != NULL || mp_phyctl0 != NULL)
221 {
222 - _dsl_PhyControl_0 = os_atoih (ptr);
223 + if (mp_phyctl0 != NULL) ptr = mp_phyctl0;
224 + _dsl_PhyControl_0 = os_atoh (ptr);
225 _dsl_PhyControl_0_defined = 1;
226 }
227
228 - if ((ptr = prom_getenv ("DSL_PHY_CNTL_1")) != NULL)
229 + if ((ptr = prom_getenv ("DSL_PHY_CNTL_1")) != NULL || mp_phyctl1 != NULL)
230 {
231 - _dsl_PhyControl_1 = os_atoih (ptr);
232 + if (mp_phyctl1 != NULL) ptr = mp_phyctl1;
233 + _dsl_PhyControl_1 = os_atoh (ptr);
234 _dsl_PhyControl_1_defined = 1;
235 }
236
237 @@ -2440,12 +2584,12 @@
238 // read config for turbo dsl
239
240 ptr = prom_getenv ("TurboDSL");
241 - if (ptr)
242 + if (ptr || mp_turbodsl != -1)
243 {
244 #if 1 //[KT]
245 bTurboDsl = os_atoi (ptr);
246 #else
247 - priv->bTurboDsl = os_atoi (ptr);
248 + priv->bTurboDsl = mp_turbodsl == -1 ? os_atoi (ptr) : mp_turbodsl;
249 #endif
250 }
251 else
252 @@ -2459,33 +2603,33 @@
253 priv->sarRxBuf = RX_BUFFER_NUM;
254 ptr = NULL;
255 ptr = prom_getenv ("SarRxBuf");
256 - if (ptr)
257 + if (ptr || mp_sar_rxbuf != -1)
258 {
259 - priv->sarRxBuf = os_atoi (ptr);
260 + priv->sarRxBuf = mp_sar_rxbuf == -1 ? os_atoi (ptr) : mp_sar_rxbuf;
261 }
262
263 priv->sarRxMax = RX_SERVICE_MAX;
264 ptr = NULL;
265 ptr = prom_getenv ("SarRxMax");
266 - if (ptr)
267 + if (ptr || mp_sar_rxmax != -1)
268 {
269 - priv->sarRxMax = os_atoi (ptr);
270 + priv->sarRxMax = mp_sar_rxmax == -1 ? os_atoi (ptr) : mp_sar_rxmax;
271 }
272
273 priv->sarTxBuf = TX_BUFFER_NUM;
274 ptr = NULL;
275 ptr = prom_getenv ("SarTxBuf");
276 - if (ptr)
277 + if (ptr || mp_sar_txbuf != -1)
278 {
279 - priv->sarTxBuf = os_atoi (ptr);
280 + priv->sarTxBuf = mp_sar_txbuf == -1 ? os_atoi (ptr) : mp_sar_txbuf;
281 }
282
283 priv->sarTxMax = TX_SERVICE_MAX;
284 ptr = NULL;
285 ptr = prom_getenv ("SarTxMax");
286 - if (ptr)
287 + if (ptr || mp_sar_txmax != -1)
288 {
289 - priv->sarTxMax = os_atoi (ptr);
290 + priv->sarTxMax = mp_sar_txmax == -1 ? os_atoi (ptr) : mp_sar_txmax;
291 }
292
293 #ifdef AR7_EFM
294 Index: sangam_atm-D7.05.01.00/tn7dsl.c
295 ===================================================================
296 --- sangam_atm-D7.05.01.00.orig/tn7dsl.c 2010-03-07 18:27:11.000000000 +0100
297 +++ sangam_atm-D7.05.01.00/tn7dsl.c 2010-03-07 18:28:15.000000000 +0100
298 @@ -148,6 +148,27 @@
299 #define NEW_TRAINING_VAL_T1413 128
300 #define NEW_TRAINING_VAL_MMODE 255
301
302 +extern char *mp_modulation;
303 +extern int mp_fine_gain_control;
304 +extern int mp_fine_gain_value;
305 +extern int mp_enable_margin_retrain;
306 +extern int mp_margin_threshold;
307 +extern int mp_enable_rate_adapt;
308 +extern int mp_powercutback;
309 +extern int mp_trellis;
310 +extern int mp_bitswap;
311 +extern int mp_maximum_bits_per_carrier;
312 +extern int mp_maximum_interleave_depth;
313 +extern int mp_pair_selection;
314 +extern int mp_dgas_polarity;
315 +extern int mp_los_alarm;
316 +extern char *mp_eoc_vendor_id;
317 +extern int mp_eoc_vendor_revision;
318 +extern char *mp_eoc_vendor_serialnum;
319 +extern char *mp_invntry_vernum;
320 +extern int mp_dsl_bit_tmode;
321 +extern int mp_high_precision;
322 +
323 int testflag1 = 0;
324 extern int __guDbgLevel;
325 extern sar_stat_t sarStat;
326 @@ -2933,24 +2954,24 @@
327 (unsigned char *) &oamFeature, 4);
328
329 ptr = prom_getenv("DSL_FEATURE_CNTL_0");
330 - if(!ptr)
331 - prom_setenv("DSL_FEATURE_CNTL_0", "0x00004000");
332 + //if(!ptr)
333 + //prom_setenv("DSL_FEATURE_CNTL_0", "0x00004000");
334
335 ptr = prom_getenv("DSL_FEATURE_CNTL_1");
336 - if(!ptr)
337 - prom_setenv("DSL_FEATURE_CNTL_1", "0x00000000");
338 + //if(!ptr)
339 + //prom_setenv("DSL_FEATURE_CNTL_1", "0x00000000");
340
341 ptr = prom_getenv("DSL_PHY_CNTL_0");
342 - if(!ptr)
343 - prom_setenv("DSL_PHY_CNTL_0", "0x00000400");
344 + //if(!ptr)
345 + //prom_setenv("DSL_PHY_CNTL_0", "0x00000400");
346
347 ptr = prom_getenv("enable_margin_retrain");
348 - if(!ptr)
349 - prom_setenv("enable_margin_retrain", "0");
350 + //if(!ptr)
351 + //prom_setenv("enable_margin_retrain", "0");
352
353 ptr = prom_getenv("modulation");
354 - if(!ptr)
355 - prom_setenv("modulation", "0xbf");
356 + //if(!ptr)
357 + //prom_setenv("modulation", "0xbf");
358
359 #define EOC_VENDOR_ID "4200534153000000"
360 #define EOC_VENDOR_REVISION "FW370090708b1_55"
361 @@ -2959,25 +2980,25 @@
362 ptr = prom_getenv("eoc_vendor_id");
363 if(!ptr || strcmp(ptr,EOC_VENDOR_ID) != 0 || strlen(ptr) != strlen(EOC_VENDOR_ID))
364 {
365 - if(ptr)
366 - prom_unsetenv("eoc_vendor_id");
367 - prom_setenv("eoc_vendor_id",EOC_VENDOR_ID);
368 + //if(ptr)
369 + //prom_unsetenv("eoc_vendor_id");
370 + //prom_setenv("eoc_vendor_id",EOC_VENDOR_ID);
371 }
372
373 ptr = prom_getenv("eoc_vendor_revision");
374 if(!ptr || strcmp(ptr,EOC_VENDOR_REVISION) != 0 || strlen(ptr) != strlen(EOC_VENDOR_REVISION))
375 {
376 - if(ptr)
377 - prom_unsetenv("eoc_vendor_revision");
378 - prom_setenv("eoc_vendor_revision",EOC_VENDOR_REVISION);
379 + //if(ptr)
380 + //prom_unsetenv("eoc_vendor_revision");
381 + //prom_setenv("eoc_vendor_revision",EOC_VENDOR_REVISION);
382 }
383
384 ptr = prom_getenv("eoc_vendor_serialnum");
385 if(!ptr || strcmp(ptr,EOC_VENDOR_SERIALNUM) != 0 || strlen(ptr) != strlen(EOC_VENDOR_SERIALNUM))
386 {
387 - if(ptr)
388 - prom_unsetenv("eoc_vendor_serialnum");
389 - prom_setenv("eoc_vendor_serialnum",EOC_VENDOR_SERIALNUM);
390 + //if(ptr)
391 + // prom_unsetenv("eoc_vendor_serialnum");
392 + //prom_setenv("eoc_vendor_serialnum",EOC_VENDOR_SERIALNUM);
393 }
394
395 /* Do only if we are in the new Base PSP 7.4.*/
396 @@ -2994,92 +3015,88 @@
397 we clear the modulation environment variable, as this could potentially
398 not have the same meaning in the new mode.
399 */
400 - prom_unsetenv("modulation");
401 - prom_setenv("DSL_UPG_DONE", "1");
402 + //prom_unsetenv("modulation");
403 + //prom_setenv("DSL_UPG_DONE", "1");
404 }
405 }
406 #endif
407
408 // modulation
409 ptr = prom_getenv("modulation");
410 - if (ptr)
411 + if (ptr || mp_modulation != NULL)
412 {
413 - tn7dsl_set_modulation(ptr, FALSE);
414 + tn7dsl_set_modulation(mp_modulation == NULL ? ptr : mp_modulation, FALSE);
415 }
416
417 // Fine Gains
418 ptr = prom_getenv("fine_gain_control");
419 - if (ptr)
420 + if (ptr || mp_fine_gain_control != -1)
421 {
422 - value = os_atoi(ptr);
423 + value = mp_fine_gain_control == -1 ? os_atoi(ptr) : mp_fine_gain_control;
424 tn7dsl_ctrl_fineGain(value);
425 }
426 ptr = NULL;
427 ptr = prom_getenv("fine_gain_value");
428 - if(ptr)
429 - tn7dsl_set_fineGainValue(os_atoh(ptr));
430 + if(ptr || mp_fine_gain_value != -1)
431 + tn7dsl_set_fineGainValue(mp_fine_gain_value == -1 ? os_atoh(ptr) : mp_fine_gain_value);
432
433 // margin retrain
434 ptr = NULL;
435 ptr = prom_getenv("enable_margin_retrain");
436 - if(ptr)
437 + value = mp_enable_margin_retrain == -1 ? (ptr ? os_atoi(ptr) : 0) : mp_enable_margin_retrain;
438 +
439 + if (value == 1)
440 {
441 - value = os_atoi(ptr);
442 - if(value == 1)
443 + dslhal_api_setMarginMonitorFlags(pIhw, 0, 1);
444 + bMarginRetrainEnable = 1;
445 + //printk("enable showtime margin monitor.\n");
446 +
447 + ptr = NULL;
448 + ptr = prom_getenv("margin_threshold");
449 + value = mp_margin_threshold == -1 ? (ptr ? os_atoi(ptr) : 0) : mp_margin_threshold;
450 +
451 + if(value >= 0)
452 {
453 - dslhal_api_setMarginMonitorFlags(pIhw, 0, 1);
454 - bMarginRetrainEnable = 1;
455 - //printk("enable showtime margin monitor.\n");
456 - ptr = NULL;
457 - ptr = prom_getenv("margin_threshold");
458 - if(ptr)
459 - {
460 - value = os_atoi(ptr);
461 - //printk("Set margin threshold to %d x 0.5 db\n",value);
462 - if(value >= 0)
463 - {
464 - dslhal_api_setMarginThreshold(pIhw, value);
465 - bMarginThConfig=1;
466 - }
467 - }
468 + dslhal_api_setMarginThreshold(pIhw, value);
469 + bMarginThConfig=1;
470 }
471 }
472
473 // rate adapt
474 ptr = NULL;
475 ptr = prom_getenv("enable_rate_adapt");
476 - if(ptr)
477 + if(ptr || mp_enable_rate_adapt != -1)
478 {
479 - dslhal_api_setRateAdaptFlag(pIhw, os_atoi(ptr));
480 + dslhal_api_setRateAdaptFlag(pIhw, mp_enable_rate_adapt == -1 ? os_atoi(ptr) : mp_enable_rate_adapt);
481 }
482
483 // set powercutback
484 ptr = NULL;
485 ptr = prom_getenv("powercutback");
486 - if(ptr)
487 + if(ptr || mp_powercutback != -1)
488 {
489 - dslhal_advcfg_onOffPcb(pIhw, os_atoi(ptr));
490 + dslhal_advcfg_onOffPcb(pIhw, mp_powercutback == -1 ? os_atoi(ptr) : mp_powercutback);
491 }
492
493 // trellis
494 ptr = NULL;
495 ptr = prom_getenv("trellis");
496 - if(ptr)
497 + if(ptr || mp_trellis != -1)
498 {
499 - dslhal_api_setTrellisFlag(pIhw, os_atoi(ptr));
500 - trellis = os_atoi(ptr);
501 + trellis = mp_trellis == -1 ? os_atoi(ptr) : mp_trellis;
502 + dslhal_api_setTrellisFlag(pIhw, trellis);
503 //printk("trellis=%d\n");
504 }
505
506 // bitswap
507 ptr = NULL;
508 ptr = prom_getenv("bitswap");
509 - if(ptr)
510 + if(ptr || mp_bitswap != -1)
511 {
512 int offset[2] = {33, 0};
513 unsigned int bitswap;
514
515 - bitswap = os_atoi(ptr);
516 + bitswap = mp_bitswap == -1 ? os_atoi(ptr) : mp_bitswap;
517
518 tn7dsl_generic_read(2, offset);
519 dslReg &= dslhal_support_byteSwap32(0xFFFFFF00);
520 @@ -3097,46 +3114,47 @@
521 // maximum bits per carrier
522 ptr = NULL;
523 ptr = prom_getenv("maximum_bits_per_carrier");
524 - if(ptr)
525 + if(ptr || mp_maximum_bits_per_carrier != -1)
526 {
527 - dslhal_api_setMaxBitsPerCarrierUpstream(pIhw, os_atoi(ptr));
528 + dslhal_api_setMaxBitsPerCarrierUpstream(pIhw, mp_maximum_bits_per_carrier == -1 ? os_atoi(ptr) : mp_maximum_bits_per_carrier);
529 }
530
531 // maximum interleave depth
532 ptr = NULL;
533 ptr = prom_getenv("maximum_interleave_depth");
534 - if(ptr)
535 + if(ptr || mp_maximum_interleave_depth != -1)
536 {
537 - dslhal_api_setMaxInterleaverDepth(pIhw, os_atoi(ptr));
538 + dslhal_api_setMaxInterleaverDepth(pIhw, mp_maximum_interleave_depth == -1 ? os_atoi(ptr) : mp_maximum_interleave_depth);
539 }
540
541 // inner and outer pairs
542 ptr = NULL;
543 ptr = prom_getenv("pair_selection");
544 - if(ptr)
545 + if(ptr || mp_pair_selection != -1)
546 {
547 - dslhal_api_selectInnerOuterPair(pIhw, os_atoi(ptr));
548 + dslhal_api_selectInnerOuterPair(pIhw, mp_pair_selection == -1 ? os_atoi(ptr) : mp_pair_selection);
549 }
550
551 ptr = NULL;
552 ptr = prom_getenv("dgas_polarity");
553 - if(ptr)
554 + if(ptr || mp_dgas_polarity != -1)
555 {
556 dslhal_api_configureDgaspLpr(pIhw, 1, 1);
557 - dslhal_api_configureDgaspLpr(pIhw, 0, os_atoi(ptr));
558 + dslhal_api_configureDgaspLpr(pIhw, 0, mp_dgas_polarity == -1 ? os_atoi(ptr) : mp_dgas_polarity);
559 }
560
561 ptr = NULL;
562 ptr = prom_getenv("los_alarm");
563 - if(ptr)
564 + if(ptr || mp_los_alarm != -1)
565 {
566 - dslhal_api_disableLosAlarm(pIhw, os_atoi(ptr));
567 + dslhal_api_disableLosAlarm(pIhw, mp_los_alarm == -1 ? os_atoi(ptr) : mp_los_alarm);
568 }
569
570 ptr = NULL;
571 ptr = prom_getenv("eoc_vendor_id");
572 - if(ptr)
573 + if(ptr || mp_eoc_vendor_id != NULL)
574 {
575 + ptr = mp_eoc_vendor_id == NULL ? ptr : mp_eoc_vendor_id;
576 for(i=0;i<8;i++)
577 {
578 tmp[0]=ptr[i*2];
579 @@ -3161,26 +3179,26 @@
580 }
581 ptr = NULL;
582 ptr = prom_getenv("eoc_vendor_revision");
583 - if(ptr)
584 + if(ptr || mp_eoc_vendor_revision != -1)
585 {
586 - value = os_atoi(ptr);
587 + value = mp_eoc_vendor_revision == -1 ? os_atoi(ptr) : mp_eoc_vendor_revision;
588 //printk("eoc rev=%d\n", os_atoi(ptr));
589 dslhal_api_setEocRevisionNumber(pIhw, (char *)&value);
590
591 }
592 ptr = NULL;
593 ptr = prom_getenv("eoc_vendor_serialnum");
594 - if(ptr)
595 + if(ptr || mp_eoc_vendor_serialnum != NULL)
596 {
597 - dslhal_api_setEocSerialNumber(pIhw, ptr);
598 + dslhal_api_setEocSerialNumber(pIhw, mp_eoc_vendor_serialnum == NULL ? ptr : mp_eoc_vendor_serialnum);
599 }
600
601 // CQ10037 Added invntry_vernum environment variable to be able to set version number in ADSL2, ADSL2+ modes.
602 ptr = NULL;
603 ptr = prom_getenv("invntry_vernum");
604 - if(ptr)
605 + if(ptr || mp_invntry_vernum != NULL)
606 {
607 - dslhal_api_setEocRevisionNumber(pIhw, ptr);
608 + dslhal_api_setEocRevisionNumber(pIhw, mp_invntry_vernum == NULL ? ptr : mp_invntry_vernum);
609 }
610
611 return 0;
612 @@ -3225,7 +3243,7 @@
613 * backward compatibility.
614 */
615 cp = prom_getenv("DSL_BIT_TMODE");
616 - if (cp)
617 + if (cp || mp_dsl_bit_tmode != -1)
618 {
619 printk("%s : env var DSL_BIT_TMODE is set\n", __FUNCTION__);
620 /*
621 @@ -3254,9 +3272,9 @@
622
623 // UR8_MERGE_START CQ11054 Jack Zhang
624 cp = prom_getenv("high_precision");
625 - if (cp)
626 + if (cp || mp_high_precision != -1)
627 {
628 - high_precision_selected = os_atoi(cp);
629 + high_precision_selected = mp_high_precision == -1 ? os_atoi(cp) : mp_high_precision;
630 }
631 if ( high_precision_selected)
632 {
633 Index: sangam_atm-D7.05.01.00/tn7sar.c
634 ===================================================================
635 --- sangam_atm-D7.05.01.00.orig/tn7sar.c 2010-03-07 18:27:11.000000000 +0100
636 +++ sangam_atm-D7.05.01.00/tn7sar.c 2010-03-07 18:27:34.000000000 +0100
637 @@ -76,6 +76,8 @@
638 #include "tn7atm.h"
639 #include "tn7api.h"
640
641 +extern int mp_oam_lb_timeout;
642 +extern int mp_autopvc_enable;
643
644 /* PDSP Firmware files */
645 #include "tnetd7300_sar_firm.h"
646 @@ -932,9 +934,9 @@
647 pHalDev = (HAL_DEVICE *)priv->pSarHalDev;
648
649 pauto_pvc = prom_getenv("autopvc_enable");
650 - if(pauto_pvc) //CQ10273
651 + if(pauto_pvc || mp_autopvc_enable != -1) //CQ10273
652 {
653 - auto_pvc =tn7sar_strtoul(pauto_pvc, NULL, 10);
654 + auto_pvc = mp_autopvc_enable == -1 ? tn7sar_strtoul(pauto_pvc, NULL, 10) : mp_autopvc_enable;
655 }
656
657 memset(&chInfo, 0xff, sizeof(chInfo));
658 @@ -1133,9 +1135,9 @@
659
660 /* read in oam lb timeout value */
661 pLbTimeout = prom_getenv("oam_lb_timeout");
662 - if(pLbTimeout)
663 + if(pLbTimeout || mp_oam_lb_timeout != -1)
664 {
665 - lbTimeout =tn7sar_strtoul(pLbTimeout, NULL, 10);
666 + lbTimeout = mp_oam_lb_timeout == -1 ? tn7sar_strtoul(pLbTimeout, NULL, 10) : mp_oam_lb_timeout;
667 oamLbTimeout = lbTimeout;
668 pHalFunc->Control(pHalDev,"OamLbTimeout", "Set", &lbTimeout);
669 }
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