ramips: rt288x: don't register the PCI controller on each board
[openwrt.git] / target / linux / ramips / files / arch / mips / ralink / rt288x / clock.c
1 /*
2 * Ralink RT288X clock API
3 *
4 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/err.h>
15 #include <linux/clk.h>
16
17 #include <asm/mach-ralink/common.h>
18 #include <asm/mach-ralink/rt288x.h>
19 #include <asm/mach-ralink/rt288x_regs.h>
20 #include "common.h"
21
22 struct clk {
23 unsigned long rate;
24 };
25
26 static struct clk rt288x_cpu_clk;
27 static struct clk rt288x_sys_clk;
28 static struct clk rt288x_wdt_clk;
29 static struct clk rt288x_uart_clk;
30
31 void __init rt288x_clocks_init(void)
32 {
33 u32 t;
34
35 t = rt288x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
36 t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
37
38 switch (t) {
39 case SYSTEM_CONFIG_CPUCLK_250:
40 rt288x_cpu_clk.rate = 250000000;
41 break;
42 case SYSTEM_CONFIG_CPUCLK_266:
43 rt288x_cpu_clk.rate = 266666667;
44 break;
45 case SYSTEM_CONFIG_CPUCLK_280:
46 rt288x_cpu_clk.rate = 280000000;
47 break;
48 case SYSTEM_CONFIG_CPUCLK_300:
49 rt288x_cpu_clk.rate = 300000000;
50 break;
51 }
52
53 rt288x_sys_clk.rate = rt288x_cpu_clk.rate / 2;
54 rt288x_uart_clk.rate = rt288x_sys_clk.rate;
55 rt288x_wdt_clk.rate = rt288x_sys_clk.rate;
56 }
57
58 /*
59 * Linux clock API
60 */
61 struct clk *clk_get(struct device *dev, const char *id)
62 {
63 if (!strcmp(id, "sys"))
64 return &rt288x_sys_clk;
65
66 if (!strcmp(id, "cpu"))
67 return &rt288x_cpu_clk;
68
69 if (!strcmp(id, "wdt"))
70 return &rt288x_wdt_clk;
71
72 if (!strcmp(id, "uart"))
73 return &rt288x_uart_clk;
74
75 return ERR_PTR(-ENOENT);
76 }
77 EXPORT_SYMBOL(clk_get);
78
79 int clk_enable(struct clk *clk)
80 {
81 return 0;
82 }
83 EXPORT_SYMBOL(clk_enable);
84
85 void clk_disable(struct clk *clk)
86 {
87 }
88 EXPORT_SYMBOL(clk_disable);
89
90 unsigned long clk_get_rate(struct clk *clk)
91 {
92 return clk->rate;
93 }
94 EXPORT_SYMBOL(clk_get_rate);
95
96 void clk_put(struct clk *clk)
97 {
98 }
99 EXPORT_SYMBOL(clk_put);
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