target/linux/ar71xx/files/drivers/mtd/wrt160nl_part.c

   1 /*
   2  * Copyright (C) 2009 Christian Daniel <cd@maintech.de>
   3  * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  18  *
  19  * TRX flash partition table.
  20  * Based on ar7 map by Felix Fietkau <nbd@openwrt.org>
  21  *
  22  */
  23
  24 #include <linux/kernel.h>
  25 #include <linux/slab.h>
  26 #include <linux/vmalloc.h>
  27
  28 #include <linux/mtd/mtd.h>
  29 #include <linux/mtd/partitions.h>
  30
  31 struct cybertan_header {
  32         char    magic[4];
  33         u8      res1[4];
  34         char    fw_date[3];
  35         char    fw_ver[3];
  36         char    id[4];
  37         char    hw_ver;
  38         char    unused;
  39         u8      flags[2];
  40         u8      res2[10];
  41 };
  42
  43 #define TRX_PARTS       6
  44 #define TRX_MAGIC       0x30524448
  45 #define TRX_MAX_OFFSET  3
  46
  47 struct trx_header {
  48         uint32_t magic;           /* "HDR0" */
  49         uint32_t len;             /* Length of file including header */
  50         uint32_t crc32;           /* 32-bit CRC from flag_version to end of file */
  51         uint32_t flag_version;    /* 0:15 flags, 16:31 version */
  52         uint32_t offsets[TRX_MAX_OFFSET]; /* Offsets of partitions from start of header */
  53 };
  54
  55 #define IH_MAGIC        0x27051956      /* Image Magic Number */
  56 #define IH_NMLEN        32              /* Image Name Length */
  57
  58 struct uimage_header {
  59         uint32_t        ih_magic;       /* Image Header Magic Number */
  60         uint32_t        ih_hcrc;        /* Image Header CRC Checksum */
  61         uint32_t        ih_time;        /* Image Creation Timestamp */
  62         uint32_t        ih_size;        /* Image Data Size */
  63         uint32_t        ih_load;        /* Data» Load  Address */
  64         uint32_t        ih_ep;          /* Entry Point Address */
  65         uint32_t        ih_dcrc;        /* Image Data CRC Checksum */
  66         uint8_t         ih_os;          /* Operating System */
  67         uint8_t         ih_arch;        /* CPU architecture */
  68         uint8_t         ih_type;        /* Image Type */
  69         uint8_t         ih_comp;        /* Compression Type */
  70         uint8_t         ih_name[IH_NMLEN];      /* Image Name */
  71 };
  72
  73 struct wrt160nl_header {
  74         struct cybertan_header  cybertan;
  75         struct trx_header       trx;
  76         struct uimage_header    uimage;
  77 } __attribute__ ((packed));
  78
  79 static struct mtd_partition trx_parts[TRX_PARTS];
  80
  81 static int wrt160nl_parse_partitions(struct mtd_info *master,
  82                                      struct mtd_partition **pparts,
  83                                      unsigned long origin)
  84 {
  85         struct wrt160nl_header *header;
  86         struct trx_header *theader;
  87         struct uimage_header *uheader;
  88         size_t retlen;
  89         unsigned int kernel_len;
  90         int ret;
  91
  92         header = vmalloc(sizeof(*header));
  93         if (!header) {
  94                 return -ENOMEM;
  95                 goto out;
  96         }
  97
  98         ret = master->read(master, 4 * master->erasesize, sizeof(*header),
  99                            &retlen, (void *) header);
 100         if (ret)
 101                 goto free_hdr;
 102
 103         if (retlen != sizeof(*header)) {
 104                 ret = -EIO;
 105                 goto free_hdr;
 106         }
 107
 108         if (strncmp(header->cybertan.magic, "NL16", 4) != 0) {
 109                 printk(KERN_NOTICE "%s: no WRT160NL signature found\n",
 110                         master->name);
 111                 goto free_hdr;
 112         }
 113
 114         theader = &header->trx;
 115         if (le32_to_cpu(theader->magic) != TRX_MAGIC) {
 116                 printk(KERN_NOTICE "%s: no TRX header found\n", master->name);
 117                 goto free_hdr;
 118         }
 119
 120         uheader = &header->uimage;
 121         if (uheader->ih_magic != IH_MAGIC) {
 122                 printk(KERN_NOTICE "%s: no uImage found\n", master->name);
 123                 goto free_hdr;
 124         }
 125
 126         kernel_len = uheader->ih_size / master->erasesize;
 127         if (uheader->ih_size % master->erasesize)
 128                 kernel_len++;
 129
 130         kernel_len++;
 131         kernel_len *= master->erasesize;
 132
 133         trx_parts[0].name = "u-boot";
 134         trx_parts[0].offset = 0;
 135         trx_parts[0].size = 4 * master->erasesize;
 136         trx_parts[0].mask_flags = MTD_WRITEABLE;
 137
 138         trx_parts[1].name = "kernel";
 139         trx_parts[1].offset = trx_parts[0].offset + trx_parts[0].size;
 140         trx_parts[1].size = kernel_len;
 141         trx_parts[1].mask_flags = 0;
 142
 143         trx_parts[2].name = "rootfs";
 144         trx_parts[2].offset = trx_parts[1].offset + trx_parts[1].size;
 145         trx_parts[2].size = master->size - 6 * master->erasesize - trx_parts[1].size;
 146         trx_parts[2].mask_flags = 0;
 147
 148         trx_parts[3].name = "nvram";
 149         trx_parts[3].offset = master->size - 2 * master->erasesize;
 150         trx_parts[3].size = master->erasesize;
 151         trx_parts[3].mask_flags = MTD_WRITEABLE;
 152
 153         trx_parts[4].name = "art";
 154         trx_parts[4].offset = master->size - master->erasesize;
 155         trx_parts[4].size = master->erasesize;
 156         trx_parts[4].mask_flags = MTD_WRITEABLE;
 157
 158         trx_parts[5].name = "firmware";
 159         trx_parts[5].offset = 4 * master->erasesize;
 160         trx_parts[5].size = master->size - 6 * master->erasesize;
 161         trx_parts[5].mask_flags = 0;
 162
 163         *pparts = trx_parts;
 164         ret = TRX_PARTS;
 165
 166  free_hdr:
 167         vfree(header);
 168  out:
 169         return ret;
 170 }
 171
 172 static struct mtd_part_parser wrt160nl_parser = {
 173         .owner          = THIS_MODULE,
 174         .parse_fn       = wrt160nl_parse_partitions,
 175         .name           = "wrt160nl",
 176 };
 177
 178 static int __init wrt160nl_parser_init(void)
 179 {
 180         return register_mtd_parser(&wrt160nl_parser);
 181 }
 182
 183 module_init(wrt160nl_parser_init);
 184
 185 MODULE_LICENSE("GPL");
 186 MODULE_AUTHOR("Christian Daniel <cd@maintech.de>");