target/linux/ar7/patches-2.6.32/100-board_support.patch

   1 --- a/arch/mips/kernel/traps.c
   2 +++ b/arch/mips/kernel/traps.c
   3 @@ -1256,9 +1256,22 @@ void *set_except_vector(int n, void *add
   4
   5         exception_handlers[n] = handler;
   6         if (n == 0 && cpu_has_divec) {
   7 -               *(u32 *)(ebase + 0x200) = 0x08000000 |
   8 -                                         (0x03ffffff & (handler >> 2));
   9 -               local_flush_icache_range(ebase + 0x200, ebase + 0x204);
  10 +               if ((handler ^ (ebase + 4)) & 0xfc000000) {
  11 +                       /* lui k0, 0x0000 */
  12 +                       *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16);
  13 +                       /* ori k0, 0x0000 */
  14 +                       *(u32 *)(ebase + 0x204) =
  15 +                                       0x375a0000 | (handler & 0xffff);
  16 +                       /* jr k0 */
  17 +                       *(u32 *)(ebase + 0x208) = 0x03400008;
  18 +                       /* nop */
  19 +                       *(u32 *)(ebase + 0x20C) = 0x00000000;
  20 +                       flush_icache_range(ebase + 0x200, ebase + 0x210);
  21 +               } else {
  22 +                       *(u32 *)(ebase + 0x200) =
  23 +                               0x08000000 | (0x03ffffff & (handler >> 2));
  24 +                       flush_icache_range(ebase + 0x200, ebase + 0x204);
  25 +               }
  26         }
  27         return (void *)old_handler;
  28  }