[ar71xx] tune rtl8366s default config, make vlan 1 cpu port tagged and use eth0.1...
[openwrt.git] / target / linux / brcm63xx / patches-2.6.35 / 170-board_livebox.patch
1 --- a/arch/mips/bcm63xx/boards/Kconfig
2 +++ b/arch/mips/bcm63xx/boards/Kconfig
3 @@ -8,4 +8,10 @@ config BOARD_BCM963XX
4 select SSB
5 help
6
7 +config BOARD_LIVEBOX
8 + bool "Inventel Livebox(es) boards"
9 + select SSB
10 + help
11 + Inventel Livebox boards using the RedBoot bootloader.
12 +
13 endchoice
14 --- a/arch/mips/bcm63xx/boards/Makefile
15 +++ b/arch/mips/bcm63xx/boards/Makefile
16 @@ -1,3 +1,4 @@
17 obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
18 +obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o
19
20 EXTRA_CFLAGS += -Werror
21 --- /dev/null
22 +++ b/arch/mips/bcm63xx/boards/board_livebox.c
23 @@ -0,0 +1,228 @@
24 +/*
25 + * This file is subject to the terms and conditions of the GNU General Public
26 + * License. See the file "COPYING" in the main directory of this archive
27 + * for more details.
28 + *
29 + * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
30 + */
31 +
32 +#include <linux/init.h>
33 +#include <linux/kernel.h>
34 +#include <linux/string.h>
35 +#include <linux/platform_device.h>
36 +#include <linux/mtd/mtd.h>
37 +#include <linux/mtd/partitions.h>
38 +#include <linux/mtd/physmap.h>
39 +#include <linux/input.h>
40 +#include <linux/gpio_buttons.h>
41 +#include <asm/addrspace.h>
42 +#include <bcm63xx_board.h>
43 +#include <bcm63xx_cpu.h>
44 +#include <bcm63xx_regs.h>
45 +#include <bcm63xx_io.h>
46 +#include <bcm63xx_dev_uart.h>
47 +#include <bcm63xx_dev_pci.h>
48 +#include <bcm63xx_dev_enet.h>
49 +#include <bcm63xx_dev_pcmcia.h>
50 +#include <bcm63xx_dev_usb_ohci.h>
51 +#include <bcm63xx_dev_usb_ehci.h>
52 +#include <board_bcm963xx.h>
53 +
54 +#define PFX "board_livebox: "
55 +
56 +static unsigned int mac_addr_used = 0;
57 +static struct board_info board;
58 +
59 +/*
60 + * known 6348 boards
61 + */
62 +#ifdef CONFIG_BCM63XX_CPU_6348
63 +static struct board_info __initdata board_livebox = {
64 + .name = "Livebox",
65 + .expected_cpu_id = 0x6348,
66 +
67 + .has_uart0 = 1,
68 + .has_enet0 = 1,
69 + .has_enet1 = 1,
70 + .has_pci = 1,
71 +
72 + .enet0 = {
73 + .has_phy = 1,
74 + .use_internal_phy = 1,
75 + },
76 +
77 + .enet1 = {
78 + .force_speed_100 = 1,
79 + .force_duplex_full = 1,
80 + },
81 +
82 + .has_ohci0 = 1,
83 + .has_pccard = 1,
84 + .has_ehci0 = 1,
85 +};
86 +#endif
87 +
88 +/*
89 + * all boards
90 + */
91 +static const struct board_info __initdata *bcm963xx_boards[] = {
92 +#ifdef CONFIG_BCM63XX_CPU_6348
93 + &board_livebox
94 +#endif
95 +};
96 +
97 +/*
98 + * early init callback
99 + */
100 +void __init board_prom_init(void)
101 +{
102 + u32 val;
103 +
104 + /* read base address of boot chip select (0) */
105 + val = bcm_mpi_readl(MPI_CSBASE_REG(0));
106 + val &= MPI_CSBASE_BASE_MASK;
107 +
108 + /* assume board is a Livebox */
109 + memcpy(&board, bcm963xx_boards[0], sizeof(board));
110 +
111 + /* setup pin multiplexing depending on board enabled device,
112 + * this has to be done this early since PCI init is done
113 + * inside arch_initcall */
114 + val = 0;
115 +
116 + if (board.has_pci) {
117 + bcm63xx_pci_enabled = 1;
118 + if (BCMCPU_IS_6348())
119 + val |= GPIO_MODE_6348_G2_PCI;
120 + }
121 +
122 + if (board.has_pccard) {
123 + if (BCMCPU_IS_6348())
124 + val |= GPIO_MODE_6348_G1_MII_PCCARD;
125 + }
126 +
127 + if (board.has_enet0 && !board.enet0.use_internal_phy) {
128 + if (BCMCPU_IS_6348())
129 + val |= GPIO_MODE_6348_G3_EXT_MII |
130 + GPIO_MODE_6348_G0_EXT_MII;
131 + }
132 +
133 + if (board.has_enet1 && !board.enet1.use_internal_phy) {
134 + if (BCMCPU_IS_6348())
135 + val |= GPIO_MODE_6348_G3_EXT_MII |
136 + GPIO_MODE_6348_G0_EXT_MII;
137 + }
138 +
139 + bcm_gpio_writel(val, GPIO_MODE_REG);
140 +}
141 +
142 +/*
143 + * second stage init callback, good time to panic if we couldn't
144 + * identify on which board we're running since early printk is working
145 + */
146 +void __init board_setup(void)
147 +{
148 + if (!board.name[0])
149 + panic("unable to detect bcm963xx board");
150 + printk(KERN_INFO PFX "board name: %s\n", board.name);
151 +
152 + /* make sure we're running on expected cpu */
153 + if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
154 + panic("unexpected CPU for bcm963xx board");
155 +}
156 +
157 +/*
158 + * return board name for /proc/cpuinfo
159 + */
160 +const char *board_get_name(void)
161 +{
162 + return board.name;
163 +}
164 +
165 +/*
166 + * register & return a new board mac address
167 + */
168 +
169 +static int board_get_mac_address(u8 *mac)
170 +{
171 + u8 default_mac[ETH_ALEN] = {0x00, 0x07, 0x3A, 0x00, 0x00, 0x00};
172 + u8 *p;
173 + int count;
174 +
175 + memcpy(mac, default_mac, ETH_ALEN);
176 +
177 + p = mac + ETH_ALEN - 1;
178 + count = mac_addr_used;
179 +
180 + while (count--) {
181 + do {
182 + (*p)++;
183 + if (*p != 0)
184 + break;
185 + p--;
186 + } while (p != mac);
187 + }
188 +
189 + if (p == mac) {
190 + printk(KERN_ERR PFX "unable to fetch mac address\n");
191 + return -ENODEV;
192 + }
193 + mac_addr_used++;
194 +
195 + return 0;
196 +}
197 +
198 +static struct resource mtd_resources[] = {
199 + {
200 + .start = 0, /* filled at runtime */
201 + .end = 0, /* filled at runtime */
202 + .flags = IORESOURCE_MEM,
203 + }
204 +};
205 +
206 +static struct platform_device mtd_dev = {
207 + .name = "bcm963xx-flash",
208 + .resource = mtd_resources,
209 + .num_resources = ARRAY_SIZE(mtd_resources),
210 +};
211 +
212 +
213 +/*
214 + * third stage init callback, register all board devices.
215 + */
216 +int __init board_register_devices(void)
217 +{
218 + u32 val;
219 +
220 + if (board.has_uart0)
221 + bcm63xx_uart_register(0);
222 +
223 + if (board.has_pccard)
224 + bcm63xx_pcmcia_register();
225 +
226 + if (board.has_enet0 &&
227 + !board_get_mac_address(board.enet0.mac_addr))
228 + bcm63xx_enet_register(0, &board.enet0);
229 +
230 + if (board.has_enet1 &&
231 + !board_get_mac_address(board.enet1.mac_addr))
232 + bcm63xx_enet_register(1, &board.enet1);
233 +
234 + if (board.has_ohci0)
235 + bcm63xx_ohci_register();
236 +
237 + if (board.has_ehci0)
238 + bcm63xx_ehci_register();
239 +
240 +
241 + /* read base address of boot chip select (0) */
242 + val = bcm_mpi_readl(MPI_CSBASE_REG(0));
243 + val &= MPI_CSBASE_BASE_MASK;
244 + mtd_resources[0].start = val;
245 + mtd_resources[0].end = 0x1FFFFFFF;
246 +
247 + platform_device_register(&mtd_dev);
248 +
249 + return 0;
250 +}
251 +
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