target/linux/xburst/patches-2.6.35/051-fb.patch

   1 From 91ead9db8aabb54f4867e5a7ed4782dcca2273f5 Mon Sep 17 00:00:00 2001
   2 From: Lars-Peter Clausen <lars@metafoo.de>
   3 Date: Sat, 17 Jul 2010 11:14:34 +0000
   4 Subject: [PATCH] FBDEV: JZ4740: Add framebuffer driver
   5
   6 Add support for the LCD controller on JZ4740 SoCs.
   7
   8 Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
   9 Cc: Andrew Morton <akpm@linux-foundation.org>
  10 Cc: linux-fbdev@vger.kernel.org
  11 Cc: linux-mips@linux-mips.org
  12 Cc: linux-kernel@vger.kernel.org
  13 Patchwork: https://patchwork.linux-mips.org/patch/1470/
  14 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
  15 ---
  16  arch/mips/include/asm/mach-jz4740/jz4740_fb.h |   67 ++
  17  drivers/video/Kconfig                         |    9 +
  18  drivers/video/Makefile                        |    1 +
  19  drivers/video/jz4740_fb.c                     |  847 +++++++++++++++++++++++++
  20  4 files changed, 924 insertions(+), 0 deletions(-)
  21  create mode 100644 arch/mips/include/asm/mach-jz4740/jz4740_fb.h
  22  create mode 100644 drivers/video/jz4740_fb.c
  23
  24 --- /dev/null
  25 +++ b/arch/mips/include/asm/mach-jz4740/jz4740_fb.h
  26 @@ -0,0 +1,67 @@
  27 +/*
  28 + *  Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
  29 + *
  30 + *  This program is free software; you can redistribute         it and/or modify it
  31 + *  under  the terms of         the GNU General  Public License as published by the
  32 + *  Free Software Foundation;  either version 2 of the License, or (at your
  33 + *  option) any later version.
  34 + *
  35 + *  You should have received a copy of the  GNU General Public License along
  36 + *  with this program; if not, write  to the Free Software Foundation, Inc.,
  37 + *  675 Mass Ave, Cambridge, MA 02139, USA.
  38 + *
  39 + */
  40 +
  41 +#ifndef __ASM_MACH_JZ4740_JZ4740_FB_H__
  42 +#define __ASM_MACH_JZ4740_JZ4740_FB_H__
  43 +
  44 +#include <linux/fb.h>
  45 +
  46 +enum jz4740_fb_lcd_type {
  47 +       JZ_LCD_TYPE_GENERIC_16_BIT = 0,
  48 +       JZ_LCD_TYPE_GENERIC_18_BIT = 0 | (1 << 4),
  49 +       JZ_LCD_TYPE_SPECIAL_TFT_1 = 1,
  50 +       JZ_LCD_TYPE_SPECIAL_TFT_2 = 2,
  51 +       JZ_LCD_TYPE_SPECIAL_TFT_3 = 3,
  52 +       JZ_LCD_TYPE_NON_INTERLACED_CCIR656 = 5,
  53 +       JZ_LCD_TYPE_INTERLACED_CCIR656 = 7,
  54 +       JZ_LCD_TYPE_SINGLE_COLOR_STN = 8,
  55 +       JZ_LCD_TYPE_SINGLE_MONOCHROME_STN = 9,
  56 +       JZ_LCD_TYPE_DUAL_COLOR_STN = 10,
  57 +       JZ_LCD_TYPE_DUAL_MONOCHROME_STN = 11,
  58 +       JZ_LCD_TYPE_8BIT_SERIAL = 12,
  59 +};
  60 +
  61 +#define JZ4740_FB_SPECIAL_TFT_CONFIG(start, stop) (((start) << 16) | (stop))
  62 +
  63 +/*
  64 +* width: width of the lcd display in mm
  65 +* height: height of the lcd display in mm
  66 +* num_modes: size of modes
  67 +* modes: list of valid video modes
  68 +* bpp: bits per pixel for the lcd
  69 +* lcd_type: lcd type
  70 +*/
  71 +
  72 +struct jz4740_fb_platform_data {
  73 +       unsigned int width;
  74 +       unsigned int height;
  75 +
  76 +       size_t num_modes;
  77 +       struct fb_videomode *modes;
  78 +
  79 +       unsigned int bpp;
  80 +       enum jz4740_fb_lcd_type lcd_type;
  81 +
  82 +       struct {
  83 +               uint32_t spl;
  84 +               uint32_t cls;
  85 +               uint32_t ps;
  86 +               uint32_t rev;
  87 +       } special_tft_config;
  88 +
  89 +       unsigned pixclk_falling_edge:1;
  90 +       unsigned date_enable_active_low:1;
  91 +};
  92 +
  93 +#endif
  94 --- a/drivers/video/Kconfig
  95 +++ b/drivers/video/Kconfig
  96 @@ -2229,6 +2229,15 @@ config FB_BROADSHEET
  97           and could also have been called by other names when coupled with
  98           a bridge adapter.
  99
 100 +config FB_JZ4740
 101 +       tristate "JZ4740 LCD framebuffer support"
 102 +       depends on FB
 103 +       select FB_SYS_FILLRECT
 104 +       select FB_SYS_COPYAREA
 105 +       select FB_SYS_IMAGEBLIT
 106 +       help
 107 +         Framebuffer support for the JZ4740 SoC.
 108 +
 109  source "drivers/video/omap/Kconfig"
 110  source "drivers/video/omap2/Kconfig"
 111
 112 --- a/drivers/video/Makefile
 113 +++ b/drivers/video/Makefile
 114 @@ -131,6 +131,7 @@ obj-$(CONFIG_FB_CARMINE)          += car
 115  obj-$(CONFIG_FB_MB862XX)         += mb862xx/
 116  obj-$(CONFIG_FB_MSM)              += msm/
 117  obj-$(CONFIG_FB_NUC900)           += nuc900fb.o
 118 +obj-$(CONFIG_FB_JZ4740)                  += jz4740_fb.o
 119
 120  # Platform or fallback drivers go here
 121  obj-$(CONFIG_FB_UVESA)            += uvesafb.o
 122 --- /dev/null
 123 +++ b/drivers/video/jz4740_fb.c
 124 @@ -0,0 +1,847 @@
 125 +/*
 126 + *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
 127 + *     JZ4740 SoC LCD framebuffer driver
 128 + *
 129 + *  This program is free software; you can redistribute it and/or modify it
 130 + *  under  the terms of  the GNU General Public License as published by the
 131 + *  Free Software Foundation;  either version 2 of the License, or (at your
 132 + *  option) any later version.
 133 + *
 134 + *  You should have received a copy of the GNU General Public License along
 135 + *  with this program; if not, write to the Free Software Foundation, Inc.,
 136 + *  675 Mass Ave, Cambridge, MA 02139, USA.
 137 + *
 138 + */
 139 +
 140 +#include <linux/kernel.h>
 141 +#include <linux/module.h>
 142 +#include <linux/mutex.h>
 143 +#include <linux/platform_device.h>
 144 +
 145 +#include <linux/clk.h>
 146 +#include <linux/delay.h>
 147 +
 148 +#include <linux/console.h>
 149 +#include <linux/fb.h>
 150 +
 151 +#include <linux/dma-mapping.h>
 152 +
 153 +#include <asm/mach-jz4740/jz4740_fb.h>
 154 +#include <asm/mach-jz4740/gpio.h>
 155 +
 156 +#define JZ_REG_LCD_CFG         0x00
 157 +#define JZ_REG_LCD_VSYNC       0x04
 158 +#define JZ_REG_LCD_HSYNC       0x08
 159 +#define JZ_REG_LCD_VAT         0x0C
 160 +#define JZ_REG_LCD_DAH         0x10
 161 +#define JZ_REG_LCD_DAV         0x14
 162 +#define JZ_REG_LCD_PS          0x18
 163 +#define JZ_REG_LCD_CLS         0x1C
 164 +#define JZ_REG_LCD_SPL         0x20
 165 +#define JZ_REG_LCD_REV         0x24
 166 +#define JZ_REG_LCD_CTRL                0x30
 167 +#define JZ_REG_LCD_STATE       0x34
 168 +#define JZ_REG_LCD_IID         0x38
 169 +#define JZ_REG_LCD_DA0         0x40
 170 +#define JZ_REG_LCD_SA0         0x44
 171 +#define JZ_REG_LCD_FID0                0x48
 172 +#define JZ_REG_LCD_CMD0                0x4C
 173 +#define JZ_REG_LCD_DA1         0x50
 174 +#define JZ_REG_LCD_SA1         0x54
 175 +#define JZ_REG_LCD_FID1                0x58
 176 +#define JZ_REG_LCD_CMD1                0x5C
 177 +
 178 +#define JZ_LCD_CFG_SLCD                        BIT(31)
 179 +#define JZ_LCD_CFG_PS_DISABLE          BIT(23)
 180 +#define JZ_LCD_CFG_CLS_DISABLE         BIT(22)
 181 +#define JZ_LCD_CFG_SPL_DISABLE         BIT(21)
 182 +#define JZ_LCD_CFG_REV_DISABLE         BIT(20)
 183 +#define JZ_LCD_CFG_HSYNCM              BIT(19)
 184 +#define JZ_LCD_CFG_PCLKM               BIT(18)
 185 +#define JZ_LCD_CFG_INV                 BIT(17)
 186 +#define JZ_LCD_CFG_SYNC_DIR            BIT(16)
 187 +#define JZ_LCD_CFG_PS_POLARITY         BIT(15)
 188 +#define JZ_LCD_CFG_CLS_POLARITY                BIT(14)
 189 +#define JZ_LCD_CFG_SPL_POLARITY                BIT(13)
 190 +#define JZ_LCD_CFG_REV_POLARITY                BIT(12)
 191 +#define JZ_LCD_CFG_HSYNC_ACTIVE_LOW    BIT(11)
 192 +#define JZ_LCD_CFG_PCLK_FALLING_EDGE   BIT(10)
 193 +#define JZ_LCD_CFG_DE_ACTIVE_LOW       BIT(9)
 194 +#define JZ_LCD_CFG_VSYNC_ACTIVE_LOW    BIT(8)
 195 +#define JZ_LCD_CFG_18_BIT              BIT(7)
 196 +#define JZ_LCD_CFG_PDW                 (BIT(5) | BIT(4))
 197 +#define JZ_LCD_CFG_MODE_MASK 0xf
 198 +
 199 +#define JZ_LCD_CTRL_BURST_4            (0x0 << 28)
 200 +#define JZ_LCD_CTRL_BURST_8            (0x1 << 28)
 201 +#define JZ_LCD_CTRL_BURST_16           (0x2 << 28)
 202 +#define JZ_LCD_CTRL_RGB555             BIT(27)
 203 +#define JZ_LCD_CTRL_OFUP               BIT(26)
 204 +#define JZ_LCD_CTRL_FRC_GRAYSCALE_16   (0x0 << 24)
 205 +#define JZ_LCD_CTRL_FRC_GRAYSCALE_4    (0x1 << 24)
 206 +#define JZ_LCD_CTRL_FRC_GRAYSCALE_2    (0x2 << 24)
 207 +#define JZ_LCD_CTRL_PDD_MASK           (0xff << 16)
 208 +#define JZ_LCD_CTRL_EOF_IRQ            BIT(13)
 209 +#define JZ_LCD_CTRL_SOF_IRQ            BIT(12)
 210 +#define JZ_LCD_CTRL_OFU_IRQ            BIT(11)
 211 +#define JZ_LCD_CTRL_IFU0_IRQ           BIT(10)
 212 +#define JZ_LCD_CTRL_IFU1_IRQ           BIT(9)
 213 +#define JZ_LCD_CTRL_DD_IRQ             BIT(8)
 214 +#define JZ_LCD_CTRL_QDD_IRQ            BIT(7)
 215 +#define JZ_LCD_CTRL_REVERSE_ENDIAN     BIT(6)
 216 +#define JZ_LCD_CTRL_LSB_FISRT          BIT(5)
 217 +#define JZ_LCD_CTRL_DISABLE            BIT(4)
 218 +#define JZ_LCD_CTRL_ENABLE             BIT(3)
 219 +#define JZ_LCD_CTRL_BPP_1              0x0
 220 +#define JZ_LCD_CTRL_BPP_2              0x1
 221 +#define JZ_LCD_CTRL_BPP_4              0x2
 222 +#define JZ_LCD_CTRL_BPP_8              0x3
 223 +#define JZ_LCD_CTRL_BPP_15_16          0x4
 224 +#define JZ_LCD_CTRL_BPP_18_24          0x5
 225 +
 226 +#define JZ_LCD_CMD_SOF_IRQ BIT(15)
 227 +#define JZ_LCD_CMD_EOF_IRQ BIT(16)
 228 +#define JZ_LCD_CMD_ENABLE_PAL BIT(12)
 229 +
 230 +#define JZ_LCD_SYNC_MASK 0x3ff
 231 +
 232 +#define JZ_LCD_STATE_DISABLED BIT(0)
 233 +
 234 +struct jzfb_framedesc {
 235 +       uint32_t next;
 236 +       uint32_t addr;
 237 +       uint32_t id;
 238 +       uint32_t cmd;
 239 +} __packed;
 240 +
 241 +struct jzfb {
 242 +       struct fb_info *fb;
 243 +       struct platform_device *pdev;
 244 +       void __iomem *base;
 245 +       struct resource *mem;
 246 +       struct jz4740_fb_platform_data *pdata;
 247 +
 248 +       size_t vidmem_size;
 249 +       void *vidmem;
 250 +       dma_addr_t vidmem_phys;
 251 +       struct jzfb_framedesc *framedesc;
 252 +       dma_addr_t framedesc_phys;
 253 +
 254 +       struct clk *ldclk;
 255 +       struct clk *lpclk;
 256 +
 257 +       unsigned is_enabled:1;
 258 +       struct mutex lock;
 259 +
 260 +       uint32_t pseudo_palette[16];
 261 +};
 262 +
 263 +static const struct fb_fix_screeninfo jzfb_fix __devinitdata = {
 264 +       .id             = "JZ4740 FB",
 265 +       .type           = FB_TYPE_PACKED_PIXELS,
 266 +       .visual         = FB_VISUAL_TRUECOLOR,
 267 +       .xpanstep       = 0,
 268 +       .ypanstep       = 0,
 269 +       .ywrapstep      = 0,
 270 +       .accel          = FB_ACCEL_NONE,
 271 +};
 272 +
 273 +static const struct jz_gpio_bulk_request jz_lcd_ctrl_pins[] = {
 274 +       JZ_GPIO_BULK_PIN(LCD_PCLK),
 275 +       JZ_GPIO_BULK_PIN(LCD_HSYNC),
 276 +       JZ_GPIO_BULK_PIN(LCD_VSYNC),
 277 +       JZ_GPIO_BULK_PIN(LCD_DE),
 278 +       JZ_GPIO_BULK_PIN(LCD_PS),
 279 +       JZ_GPIO_BULK_PIN(LCD_REV),
 280 +       JZ_GPIO_BULK_PIN(LCD_CLS),
 281 +       JZ_GPIO_BULK_PIN(LCD_SPL),
 282 +};
 283 +
 284 +static const struct jz_gpio_bulk_request jz_lcd_data_pins[] = {
 285 +       JZ_GPIO_BULK_PIN(LCD_DATA0),
 286 +       JZ_GPIO_BULK_PIN(LCD_DATA1),
 287 +       JZ_GPIO_BULK_PIN(LCD_DATA2),
 288 +       JZ_GPIO_BULK_PIN(LCD_DATA3),
 289 +       JZ_GPIO_BULK_PIN(LCD_DATA4),
 290 +       JZ_GPIO_BULK_PIN(LCD_DATA5),
 291 +       JZ_GPIO_BULK_PIN(LCD_DATA6),
 292 +       JZ_GPIO_BULK_PIN(LCD_DATA7),
 293 +       JZ_GPIO_BULK_PIN(LCD_DATA8),
 294 +       JZ_GPIO_BULK_PIN(LCD_DATA9),
 295 +       JZ_GPIO_BULK_PIN(LCD_DATA10),
 296 +       JZ_GPIO_BULK_PIN(LCD_DATA11),
 297 +       JZ_GPIO_BULK_PIN(LCD_DATA12),
 298 +       JZ_GPIO_BULK_PIN(LCD_DATA13),
 299 +       JZ_GPIO_BULK_PIN(LCD_DATA14),
 300 +       JZ_GPIO_BULK_PIN(LCD_DATA15),
 301 +       JZ_GPIO_BULK_PIN(LCD_DATA16),
 302 +       JZ_GPIO_BULK_PIN(LCD_DATA17),
 303 +};
 304 +
 305 +static unsigned int jzfb_num_ctrl_pins(struct jzfb *jzfb)
 306 +{
 307 +       unsigned int num;
 308 +
 309 +       switch (jzfb->pdata->lcd_type) {
 310 +       case JZ_LCD_TYPE_GENERIC_16_BIT:
 311 +               num = 4;
 312 +               break;
 313 +       case JZ_LCD_TYPE_GENERIC_18_BIT:
 314 +               num = 4;
 315 +               break;
 316 +       case JZ_LCD_TYPE_8BIT_SERIAL:
 317 +               num = 3;
 318 +               break;
 319 +       case JZ_LCD_TYPE_SPECIAL_TFT_1:
 320 +       case JZ_LCD_TYPE_SPECIAL_TFT_2:
 321 +       case JZ_LCD_TYPE_SPECIAL_TFT_3:
 322 +               num = 8;
 323 +               break;
 324 +       default:
 325 +               num = 0;
 326 +               break;
 327 +       }
 328 +       return num;
 329 +}
 330 +
 331 +static unsigned int jzfb_num_data_pins(struct jzfb *jzfb)
 332 +{
 333 +       unsigned int num;
 334 +
 335 +       switch (jzfb->pdata->lcd_type) {
 336 +       case JZ_LCD_TYPE_GENERIC_16_BIT:
 337 +               num = 16;
 338 +               break;
 339 +       case JZ_LCD_TYPE_GENERIC_18_BIT:
 340 +               num = 18;
 341 +               break;
 342 +       case JZ_LCD_TYPE_8BIT_SERIAL:
 343 +               num = 8;
 344 +               break;
 345 +       case JZ_LCD_TYPE_SPECIAL_TFT_1:
 346 +       case JZ_LCD_TYPE_SPECIAL_TFT_2:
 347 +       case JZ_LCD_TYPE_SPECIAL_TFT_3:
 348 +               if (jzfb->pdata->bpp == 18)
 349 +                       num = 18;
 350 +               else
 351 +                       num = 16;
 352 +               break;
 353 +       default:
 354 +               num = 0;
 355 +               break;
 356 +       }
 357 +       return num;
 358 +}
 359 +
 360 +/* Based on CNVT_TOHW macro from skeletonfb.c */
 361 +static inline uint32_t jzfb_convert_color_to_hw(unsigned val,
 362 +       struct fb_bitfield *bf)
 363 +{
 364 +       return (((val << bf->length) + 0x7FFF - val) >> 16) << bf->offset;
 365 +}
 366 +
 367 +static int jzfb_setcolreg(unsigned regno, unsigned red, unsigned green,
 368 +                       unsigned blue, unsigned transp, struct fb_info *fb)
 369 +{
 370 +       uint32_t color;
 371 +
 372 +       if (regno >= 16)
 373 +               return -EINVAL;
 374 +
 375 +       color = jzfb_convert_color_to_hw(red, &fb->var.red);
 376 +       color |= jzfb_convert_color_to_hw(green, &fb->var.green);
 377 +       color |= jzfb_convert_color_to_hw(blue, &fb->var.blue);
 378 +       color |= jzfb_convert_color_to_hw(transp, &fb->var.transp);
 379 +
 380 +       ((uint32_t *)(fb->pseudo_palette))[regno] = color;
 381 +
 382 +       return 0;
 383 +}
 384 +
 385 +static int jzfb_get_controller_bpp(struct jzfb *jzfb)
 386 +{
 387 +       switch (jzfb->pdata->bpp) {
 388 +       case 18:
 389 +       case 24:
 390 +               return 32;
 391 +       case 15:
 392 +               return 16;
 393 +       default:
 394 +               return jzfb->pdata->bpp;
 395 +       }
 396 +}
 397 +
 398 +static struct fb_videomode *jzfb_get_mode(struct jzfb *jzfb,
 399 +       struct fb_var_screeninfo *var)
 400 +{
 401 +       size_t i;
 402 +       struct fb_videomode *mode = jzfb->pdata->modes;
 403 +
 404 +       for (i = 0; i < jzfb->pdata->num_modes; ++i, ++mode) {
 405 +               if (mode->xres == var->xres && mode->yres == var->yres)
 406 +                       return mode;
 407 +       }
 408 +
 409 +       return NULL;
 410 +}
 411 +
 412 +static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fb)
 413 +{
 414 +       struct jzfb *jzfb = fb->par;
 415 +       struct fb_videomode *mode;
 416 +
 417 +       if (var->bits_per_pixel != jzfb_get_controller_bpp(jzfb) &&
 418 +               var->bits_per_pixel != jzfb->pdata->bpp)
 419 +               return -EINVAL;
 420 +
 421 +       mode = jzfb_get_mode(jzfb, var);
 422 +       if (mode == NULL)
 423 +               return -EINVAL;
 424 +
 425 +       fb_videomode_to_var(var, mode);
 426 +
 427 +       switch (jzfb->pdata->bpp) {
 428 +       case 8:
 429 +               break;
 430 +       case 15:
 431 +               var->red.offset = 10;
 432 +               var->red.length = 5;
 433 +               var->green.offset = 6;
 434 +               var->green.length = 5;
 435 +               var->blue.offset = 0;
 436 +               var->blue.length = 5;
 437 +               break;
 438 +       case 16:
 439 +               var->red.offset = 11;
 440 +               var->red.length = 5;
 441 +               var->green.offset = 5;
 442 +               var->green.length = 6;
 443 +               var->blue.offset = 0;
 444 +               var->blue.length = 5;
 445 +               break;
 446 +       case 18:
 447 +               var->red.offset = 16;
 448 +               var->red.length = 6;
 449 +               var->green.offset = 8;
 450 +               var->green.length = 6;
 451 +               var->blue.offset = 0;
 452 +               var->blue.length = 6;
 453 +               var->bits_per_pixel = 32;
 454 +               break;
 455 +       case 32:
 456 +       case 24:
 457 +               var->transp.offset = 24;
 458 +               var->transp.length = 8;
 459 +               var->red.offset = 16;
 460 +               var->red.length = 8;
 461 +               var->green.offset = 8;
 462 +               var->green.length = 8;
 463 +               var->blue.offset = 0;
 464 +               var->blue.length = 8;
 465 +               var->bits_per_pixel = 32;
 466 +               break;
 467 +       default:
 468 +               break;
 469 +       }
 470 +
 471 +       return 0;
 472 +}
 473 +
 474 +static int jzfb_set_par(struct fb_info *info)
 475 +{
 476 +       struct jzfb *jzfb = info->par;
 477 +       struct jz4740_fb_platform_data *pdata = jzfb->pdata;
 478 +       struct fb_var_screeninfo *var = &info->var;
 479 +       struct fb_videomode *mode;
 480 +       uint16_t hds, vds;
 481 +       uint16_t hde, vde;
 482 +       uint16_t ht, vt;
 483 +       uint32_t ctrl;
 484 +       uint32_t cfg;
 485 +       unsigned long rate;
 486 +
 487 +       mode = jzfb_get_mode(jzfb, var);
 488 +       if (mode == NULL)
 489 +               return -EINVAL;
 490 +
 491 +       if (mode == info->mode)
 492 +               return 0;
 493 +
 494 +       info->mode = mode;
 495 +
 496 +       hds = mode->hsync_len + mode->left_margin;
 497 +       hde = hds + mode->xres;
 498 +       ht = hde + mode->right_margin;
 499 +
 500 +       vds = mode->vsync_len + mode->upper_margin;
 501 +       vde = vds + mode->yres;
 502 +       vt = vde + mode->lower_margin;
 503 +
 504 +       ctrl = JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16;
 505 +
 506 +       switch (pdata->bpp) {
 507 +       case 1:
 508 +               ctrl |= JZ_LCD_CTRL_BPP_1;
 509 +               break;
 510 +       case 2:
 511 +               ctrl |= JZ_LCD_CTRL_BPP_2;
 512 +               break;
 513 +       case 4:
 514 +               ctrl |= JZ_LCD_CTRL_BPP_4;
 515 +               break;
 516 +       case 8:
 517 +               ctrl |= JZ_LCD_CTRL_BPP_8;
 518 +       break;
 519 +       case 15:
 520 +               ctrl |= JZ_LCD_CTRL_RGB555; /* Falltrough */
 521 +       case 16:
 522 +               ctrl |= JZ_LCD_CTRL_BPP_15_16;
 523 +               break;
 524 +       case 18:
 525 +       case 24:
 526 +       case 32:
 527 +               ctrl |= JZ_LCD_CTRL_BPP_18_24;
 528 +               break;
 529 +       default:
 530 +               break;
 531 +       }
 532 +
 533 +       cfg = pdata->lcd_type & 0xf;
 534 +
 535 +       if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT))
 536 +               cfg |= JZ_LCD_CFG_HSYNC_ACTIVE_LOW;
 537 +
 538 +       if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
 539 +               cfg |= JZ_LCD_CFG_VSYNC_ACTIVE_LOW;
 540 +
 541 +       if (pdata->pixclk_falling_edge)
 542 +               cfg |= JZ_LCD_CFG_PCLK_FALLING_EDGE;
 543 +
 544 +       if (pdata->date_enable_active_low)
 545 +               cfg |= JZ_LCD_CFG_DE_ACTIVE_LOW;
 546 +
 547 +       if (pdata->lcd_type == JZ_LCD_TYPE_GENERIC_18_BIT)
 548 +               cfg |= JZ_LCD_CFG_18_BIT;
 549 +
 550 +       if (mode->pixclock) {
 551 +               rate = PICOS2KHZ(mode->pixclock) * 1000;
 552 +               mode->refresh = rate / vt / ht;
 553 +       } else {
 554 +               if (pdata->lcd_type == JZ_LCD_TYPE_8BIT_SERIAL)
 555 +                       rate = mode->refresh * (vt + 2 * mode->xres) * ht;
 556 +               else
 557 +                       rate = mode->refresh * vt * ht;
 558 +
 559 +               mode->pixclock = KHZ2PICOS(rate / 1000);
 560 +       }
 561 +
 562 +       mutex_lock(&jzfb->lock);
 563 +       if (!jzfb->is_enabled)
 564 +               clk_enable(jzfb->ldclk);
 565 +       else
 566 +               ctrl |= JZ_LCD_CTRL_ENABLE;
 567 +
 568 +       switch (pdata->lcd_type) {
 569 +       case JZ_LCD_TYPE_SPECIAL_TFT_1:
 570 +       case JZ_LCD_TYPE_SPECIAL_TFT_2:
 571 +       case JZ_LCD_TYPE_SPECIAL_TFT_3:
 572 +               writel(pdata->special_tft_config.spl, jzfb->base + JZ_REG_LCD_SPL);
 573 +               writel(pdata->special_tft_config.cls, jzfb->base + JZ_REG_LCD_CLS);
 574 +               writel(pdata->special_tft_config.ps, jzfb->base + JZ_REG_LCD_PS);
 575 +               writel(pdata->special_tft_config.ps, jzfb->base + JZ_REG_LCD_REV);
 576 +               break;
 577 +       default:
 578 +               cfg |= JZ_LCD_CFG_PS_DISABLE;
 579 +               cfg |= JZ_LCD_CFG_CLS_DISABLE;
 580 +               cfg |= JZ_LCD_CFG_SPL_DISABLE;
 581 +               cfg |= JZ_LCD_CFG_REV_DISABLE;
 582 +               break;
 583 +       }
 584 +
 585 +       writel(mode->hsync_len, jzfb->base + JZ_REG_LCD_HSYNC);
 586 +       writel(mode->vsync_len, jzfb->base + JZ_REG_LCD_VSYNC);
 587 +
 588 +       writel((ht << 16) | vt, jzfb->base + JZ_REG_LCD_VAT);
 589 +
 590 +       writel((hds << 16) | hde, jzfb->base + JZ_REG_LCD_DAH);
 591 +       writel((vds << 16) | vde, jzfb->base + JZ_REG_LCD_DAV);
 592 +
 593 +       writel(cfg, jzfb->base + JZ_REG_LCD_CFG);
 594 +
 595 +       writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 596 +
 597 +       if (!jzfb->is_enabled)
 598 +               clk_disable(jzfb->ldclk);
 599 +
 600 +       mutex_unlock(&jzfb->lock);
 601 +
 602 +       clk_set_rate(jzfb->lpclk, rate);
 603 +       clk_set_rate(jzfb->ldclk, rate * 3);
 604 +
 605 +       return 0;
 606 +}
 607 +
 608 +static void jzfb_enable(struct jzfb *jzfb)
 609 +{
 610 +       uint32_t ctrl;
 611 +
 612 +       clk_enable(jzfb->ldclk);
 613 +
 614 +       jz_gpio_bulk_resume(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
 615 +       jz_gpio_bulk_resume(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
 616 +
 617 +       writel(0, jzfb->base + JZ_REG_LCD_STATE);
 618 +
 619 +       writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
 620 +
 621 +       ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
 622 +       ctrl |= JZ_LCD_CTRL_ENABLE;
 623 +       ctrl &= ~JZ_LCD_CTRL_DISABLE;
 624 +       writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 625 +}
 626 +
 627 +static void jzfb_disable(struct jzfb *jzfb)
 628 +{
 629 +       uint32_t ctrl;
 630 +
 631 +       ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
 632 +       ctrl |= JZ_LCD_CTRL_DISABLE;
 633 +       writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 634 +       do {
 635 +               ctrl = readl(jzfb->base + JZ_REG_LCD_STATE);
 636 +       } while (!(ctrl & JZ_LCD_STATE_DISABLED));
 637 +
 638 +       jz_gpio_bulk_suspend(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
 639 +       jz_gpio_bulk_suspend(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
 640 +
 641 +       clk_disable(jzfb->ldclk);
 642 +}
 643 +
 644 +static int jzfb_blank(int blank_mode, struct fb_info *info)
 645 +{
 646 +       struct jzfb *jzfb = info->par;
 647 +
 648 +       switch (blank_mode) {
 649 +       case FB_BLANK_UNBLANK:
 650 +               mutex_lock(&jzfb->lock);
 651 +               if (jzfb->is_enabled) {
 652 +                       mutex_unlock(&jzfb->lock);
 653 +                       return 0;
 654 +               }
 655 +
 656 +               jzfb_enable(jzfb);
 657 +               jzfb->is_enabled = 1;
 658 +
 659 +               mutex_unlock(&jzfb->lock);
 660 +               break;
 661 +       default:
 662 +               mutex_lock(&jzfb->lock);
 663 +               if (!jzfb->is_enabled) {
 664 +                       mutex_unlock(&jzfb->lock);
 665 +                       return 0;
 666 +               }
 667 +
 668 +               jzfb_disable(jzfb);
 669 +               jzfb->is_enabled = 0;
 670 +
 671 +               mutex_unlock(&jzfb->lock);
 672 +               break;
 673 +       }
 674 +
 675 +       return 0;
 676 +}
 677 +
 678 +static int jzfb_alloc_devmem(struct jzfb *jzfb)
 679 +{
 680 +       int max_videosize = 0;
 681 +       struct fb_videomode *mode = jzfb->pdata->modes;
 682 +       void *page;
 683 +       int i;
 684 +
 685 +       for (i = 0; i < jzfb->pdata->num_modes; ++mode, ++i) {
 686 +               if (max_videosize < mode->xres * mode->yres)
 687 +                       max_videosize = mode->xres * mode->yres;
 688 +       }
 689 +
 690 +       max_videosize *= jzfb_get_controller_bpp(jzfb) >> 3;
 691 +
 692 +       jzfb->framedesc = dma_alloc_coherent(&jzfb->pdev->dev,
 693 +                                       sizeof(*jzfb->framedesc),
 694 +                                       &jzfb->framedesc_phys, GFP_KERNEL);
 695 +
 696 +       if (!jzfb->framedesc)
 697 +               return -ENOMEM;
 698 +
 699 +       jzfb->vidmem_size = PAGE_ALIGN(max_videosize);
 700 +       jzfb->vidmem = dma_alloc_coherent(&jzfb->pdev->dev,
 701 +                                       jzfb->vidmem_size,
 702 +                                       &jzfb->vidmem_phys, GFP_KERNEL);
 703 +
 704 +       if (!jzfb->vidmem)
 705 +               goto err_free_framedesc;
 706 +
 707 +       for (page = jzfb->vidmem;
 708 +                page < jzfb->vidmem + PAGE_ALIGN(jzfb->vidmem_size);
 709 +                page += PAGE_SIZE) {
 710 +               SetPageReserved(virt_to_page(page));
 711 +       }
 712 +
 713 +       jzfb->framedesc->next = jzfb->framedesc_phys;
 714 +       jzfb->framedesc->addr = jzfb->vidmem_phys;
 715 +       jzfb->framedesc->id = 0xdeafbead;
 716 +       jzfb->framedesc->cmd = 0;
 717 +       jzfb->framedesc->cmd |= max_videosize / 4;
 718 +
 719 +       return 0;
 720 +
 721 +err_free_framedesc:
 722 +       dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc),
 723 +                               jzfb->framedesc, jzfb->framedesc_phys);
 724 +       return -ENOMEM;
 725 +}
 726 +
 727 +static void jzfb_free_devmem(struct jzfb *jzfb)
 728 +{
 729 +       dma_free_coherent(&jzfb->pdev->dev, jzfb->vidmem_size,
 730 +                               jzfb->vidmem, jzfb->vidmem_phys);
 731 +       dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc),
 732 +                               jzfb->framedesc, jzfb->framedesc_phys);
 733 +}
 734 +
 735 +static struct  fb_ops jzfb_ops = {
 736 +       .owner = THIS_MODULE,
 737 +       .fb_check_var = jzfb_check_var,
 738 +       .fb_set_par = jzfb_set_par,
 739 +       .fb_blank = jzfb_blank,
 740 +       .fb_fillrect    = sys_fillrect,
 741 +       .fb_copyarea    = sys_copyarea,
 742 +       .fb_imageblit   = sys_imageblit,
 743 +       .fb_setcolreg = jzfb_setcolreg,
 744 +};
 745 +
 746 +static int __devinit jzfb_probe(struct platform_device *pdev)
 747 +{
 748 +       int ret;
 749 +       struct jzfb *jzfb;
 750 +       struct fb_info *fb;
 751 +       struct jz4740_fb_platform_data *pdata = pdev->dev.platform_data;
 752 +       struct resource *mem;
 753 +
 754 +       if (!pdata) {
 755 +               dev_err(&pdev->dev, "Missing platform data\n");
 756 +               return -ENXIO;
 757 +       }
 758 +
 759 +       mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 760 +       if (!mem) {
 761 +               dev_err(&pdev->dev, "Failed to get register memory resource\n");
 762 +               return -ENXIO;
 763 +       }
 764 +
 765 +       mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
 766 +       if (!mem) {
 767 +               dev_err(&pdev->dev, "Failed to request register memory region\n");
 768 +               return -EBUSY;
 769 +       }
 770 +
 771 +       fb = framebuffer_alloc(sizeof(struct jzfb), &pdev->dev);
 772 +       if (!fb) {
 773 +               dev_err(&pdev->dev, "Failed to allocate framebuffer device\n");
 774 +               ret = -ENOMEM;
 775 +               goto err_release_mem_region;
 776 +       }
 777 +
 778 +       fb->fbops = &jzfb_ops;
 779 +       fb->flags = FBINFO_DEFAULT;
 780 +
 781 +       jzfb = fb->par;
 782 +       jzfb->pdev = pdev;
 783 +       jzfb->pdata = pdata;
 784 +       jzfb->mem = mem;
 785 +
 786 +       jzfb->ldclk = clk_get(&pdev->dev, "lcd");
 787 +       if (IS_ERR(jzfb->ldclk)) {
 788 +               ret = PTR_ERR(jzfb->ldclk);
 789 +               dev_err(&pdev->dev, "Failed to get lcd clock: %d\n", ret);
 790 +               goto err_framebuffer_release;
 791 +       }
 792 +
 793 +       jzfb->lpclk = clk_get(&pdev->dev, "lcd_pclk");
 794 +       if (IS_ERR(jzfb->lpclk)) {
 795 +               ret = PTR_ERR(jzfb->lpclk);
 796 +               dev_err(&pdev->dev, "Failed to get lcd pixel clock: %d\n", ret);
 797 +               goto err_put_ldclk;
 798 +       }
 799 +
 800 +       jzfb->base = ioremap(mem->start, resource_size(mem));
 801 +       if (!jzfb->base) {
 802 +               dev_err(&pdev->dev, "Failed to ioremap register memory region\n");
 803 +               ret = -EBUSY;
 804 +               goto err_put_lpclk;
 805 +       }
 806 +
 807 +       platform_set_drvdata(pdev, jzfb);
 808 +
 809 +       mutex_init(&jzfb->lock);
 810 +
 811 +       fb_videomode_to_modelist(pdata->modes, pdata->num_modes,
 812 +                                &fb->modelist);
 813 +       fb_videomode_to_var(&fb->var, pdata->modes);
 814 +       fb->var.bits_per_pixel = pdata->bpp;
 815 +       jzfb_check_var(&fb->var, fb);
 816 +
 817 +       ret = jzfb_alloc_devmem(jzfb);
 818 +       if (ret) {
 819 +               dev_err(&pdev->dev, "Failed to allocate video memory\n");
 820 +               goto err_iounmap;
 821 +       }
 822 +
 823 +       fb->fix = jzfb_fix;
 824 +       fb->fix.line_length = fb->var.bits_per_pixel * fb->var.xres / 8;
 825 +       fb->fix.mmio_start = mem->start;
 826 +       fb->fix.mmio_len = resource_size(mem);
 827 +       fb->fix.smem_start = jzfb->vidmem_phys;
 828 +       fb->fix.smem_len =  fb->fix.line_length * fb->var.yres;
 829 +       fb->screen_base = jzfb->vidmem;
 830 +       fb->pseudo_palette = jzfb->pseudo_palette;
 831 +
 832 +       fb_alloc_cmap(&fb->cmap, 256, 0);
 833 +
 834 +       clk_enable(jzfb->ldclk);
 835 +       jzfb->is_enabled = 1;
 836 +
 837 +       writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
 838 +
 839 +       fb->mode = NULL;
 840 +       jzfb_set_par(fb);
 841 +
 842 +       jz_gpio_bulk_request(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
 843 +       jz_gpio_bulk_request(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
 844 +
 845 +       ret = register_framebuffer(fb);
 846 +       if (ret) {
 847 +               dev_err(&pdev->dev, "Failed to register framebuffer: %d\n", ret);
 848 +               goto err_free_devmem;
 849 +       }
 850 +
 851 +       jzfb->fb = fb;
 852 +
 853 +       return 0;
 854 +
 855 +err_free_devmem:
 856 +       jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
 857 +       jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
 858 +
 859 +       fb_dealloc_cmap(&fb->cmap);
 860 +       jzfb_free_devmem(jzfb);
 861 +err_iounmap:
 862 +       iounmap(jzfb->base);
 863 +err_put_lpclk:
 864 +       clk_put(jzfb->lpclk);
 865 +err_put_ldclk:
 866 +       clk_put(jzfb->ldclk);
 867 +err_framebuffer_release:
 868 +       framebuffer_release(fb);
 869 +err_release_mem_region:
 870 +       release_mem_region(mem->start, resource_size(mem));
 871 +       return ret;
 872 +}
 873 +
 874 +static int __devexit jzfb_remove(struct platform_device *pdev)
 875 +{
 876 +       struct jzfb *jzfb = platform_get_drvdata(pdev);
 877 +
 878 +       jzfb_blank(FB_BLANK_POWERDOWN, jzfb->fb);
 879 +
 880 +       jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
 881 +       jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
 882 +
 883 +       iounmap(jzfb->base);
 884 +       release_mem_region(jzfb->mem->start, resource_size(jzfb->mem));
 885 +
 886 +       fb_dealloc_cmap(&jzfb->fb->cmap);
 887 +       jzfb_free_devmem(jzfb);
 888 +
 889 +       platform_set_drvdata(pdev, NULL);
 890 +
 891 +       clk_put(jzfb->lpclk);
 892 +       clk_put(jzfb->ldclk);
 893 +
 894 +       framebuffer_release(jzfb->fb);
 895 +
 896 +       return 0;
 897 +}
 898 +
 899 +#ifdef CONFIG_PM
 900 +
 901 +static int jzfb_suspend(struct device *dev)
 902 +{
 903 +       struct jzfb *jzfb = dev_get_drvdata(dev);
 904 +
 905 +       acquire_console_sem();
 906 +       fb_set_suspend(jzfb->fb, 1);
 907 +       release_console_sem();
 908 +
 909 +       mutex_lock(&jzfb->lock);
 910 +       if (jzfb->is_enabled)
 911 +               jzfb_disable(jzfb);
 912 +       mutex_unlock(&jzfb->lock);
 913 +
 914 +       return 0;
 915 +}
 916 +
 917 +static int jzfb_resume(struct device *dev)
 918 +{
 919 +       struct jzfb *jzfb = dev_get_drvdata(dev);
 920 +       clk_enable(jzfb->ldclk);
 921 +
 922 +       mutex_lock(&jzfb->lock);
 923 +       if (jzfb->is_enabled)
 924 +               jzfb_enable(jzfb);
 925 +       mutex_unlock(&jzfb->lock);
 926 +
 927 +       acquire_console_sem();
 928 +       fb_set_suspend(jzfb->fb, 0);
 929 +       release_console_sem();
 930 +
 931 +       return 0;
 932 +}
 933 +
 934 +static const struct dev_pm_ops jzfb_pm_ops = {
 935 +       .suspend        = jzfb_suspend,
 936 +       .resume         = jzfb_resume,
 937 +       .poweroff       = jzfb_suspend,
 938 +       .restore        = jzfb_resume,
 939 +};
 940 +
 941 +#define JZFB_PM_OPS (&jzfb_pm_ops)
 942 +
 943 +#else
 944 +#define JZFB_PM_OPS NULL
 945 +#endif
 946 +
 947 +static struct platform_driver jzfb_driver = {
 948 +       .probe = jzfb_probe,
 949 +       .remove = __devexit_p(jzfb_remove),
 950 +       .driver = {
 951 +               .name = "jz4740-fb",
 952 +               .pm = JZFB_PM_OPS,
 953 +       },
 954 +};
 955 +
 956 +static int __init jzfb_init(void)
 957 +{
 958 +       return platform_driver_register(&jzfb_driver);
 959 +}
 960 +module_init(jzfb_init);
 961 +
 962 +static void __exit jzfb_exit(void)
 963 +{
 964 +       platform_driver_unregister(&jzfb_driver);
 965 +}
 966 +module_exit(jzfb_exit);
 967 +
 968 +MODULE_LICENSE("GPL");
 969 +MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 970 +MODULE_DESCRIPTION("JZ4740 SoC LCD framebuffer driver");
 971 +MODULE_ALIAS("platform:jz4740-fb");