ar71xx: add support for the TL-WR841N v1.5 board
[openwrt.git] / target / linux / generic-2.6 / patches-2.6.28 / 920-00-spi-gpio.patch
1 Port of the SPI-GPIO driver from 2.6.29-rc4.
2
3 --mb
4
5
6
7 --- /dev/null
8 +++ b/drivers/spi/spi_gpio.c
9 @@ -0,0 +1,360 @@
10 +/*
11 + * spi_gpio.c - SPI master driver using generic bitbanged GPIO
12 + *
13 + * Copyright (C) 2006,2008 David Brownell
14 + *
15 + * This program is free software; you can redistribute it and/or modify
16 + * it under the terms of the GNU General Public License as published by
17 + * the Free Software Foundation; either version 2 of the License, or
18 + * (at your option) any later version.
19 + *
20 + * This program is distributed in the hope that it will be useful,
21 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 + * GNU General Public License for more details.
24 + *
25 + * You should have received a copy of the GNU General Public License
26 + * along with this program; if not, write to the Free Software
27 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 + */
29 +#include <linux/kernel.h>
30 +#include <linux/init.h>
31 +#include <linux/platform_device.h>
32 +#include <linux/gpio.h>
33 +
34 +#include <linux/spi/spi.h>
35 +#include <linux/spi/spi_bitbang.h>
36 +#include <linux/spi/spi_gpio.h>
37 +
38 +
39 +/*
40 + * This bitbanging SPI master driver should help make systems usable
41 + * when a native hardware SPI engine is not available, perhaps because
42 + * its driver isn't yet working or because the I/O pins it requires
43 + * are used for other purposes.
44 + *
45 + * platform_device->driver_data ... points to spi_gpio
46 + *
47 + * spi->controller_state ... reserved for bitbang framework code
48 + * spi->controller_data ... holds chipselect GPIO
49 + *
50 + * spi->master->dev.driver_data ... points to spi_gpio->bitbang
51 + */
52 +
53 +struct spi_gpio {
54 + struct spi_bitbang bitbang;
55 + struct spi_gpio_platform_data pdata;
56 + struct platform_device *pdev;
57 +};
58 +
59 +/*----------------------------------------------------------------------*/
60 +
61 +/*
62 + * Because the overhead of going through four GPIO procedure calls
63 + * per transferred bit can make performance a problem, this code
64 + * is set up so that you can use it in either of two ways:
65 + *
66 + * - The slow generic way: set up platform_data to hold the GPIO
67 + * numbers used for MISO/MOSI/SCK, and issue procedure calls for
68 + * each of them. This driver can handle several such busses.
69 + *
70 + * - The quicker inlined way: only helps with platform GPIO code
71 + * that inlines operations for constant GPIOs. This can give
72 + * you tight (fast!) inner loops, but each such bus needs a
73 + * new driver. You'll define a new C file, with Makefile and
74 + * Kconfig support; the C code can be a total of six lines:
75 + *
76 + * #define DRIVER_NAME "myboard_spi2"
77 + * #define SPI_MISO_GPIO 119
78 + * #define SPI_MOSI_GPIO 120
79 + * #define SPI_SCK_GPIO 121
80 + * #define SPI_N_CHIPSEL 4
81 + * #include "spi_gpio.c"
82 + */
83 +
84 +#ifndef DRIVER_NAME
85 +#define DRIVER_NAME "spi_gpio"
86 +
87 +#define GENERIC_BITBANG /* vs tight inlines */
88 +
89 +/* all functions referencing these symbols must define pdata */
90 +#define SPI_MISO_GPIO ((pdata)->miso)
91 +#define SPI_MOSI_GPIO ((pdata)->mosi)
92 +#define SPI_SCK_GPIO ((pdata)->sck)
93 +
94 +#define SPI_N_CHIPSEL ((pdata)->num_chipselect)
95 +
96 +#endif
97 +
98 +/*----------------------------------------------------------------------*/
99 +
100 +static inline const struct spi_gpio_platform_data * __pure
101 +spi_to_pdata(const struct spi_device *spi)
102 +{
103 + const struct spi_bitbang *bang;
104 + const struct spi_gpio *spi_gpio;
105 +
106 + bang = spi_master_get_devdata(spi->master);
107 + spi_gpio = container_of(bang, struct spi_gpio, bitbang);
108 + return &spi_gpio->pdata;
109 +}
110 +
111 +/* this is #defined to avoid unused-variable warnings when inlining */
112 +#define pdata spi_to_pdata(spi)
113 +
114 +static inline void setsck(const struct spi_device *spi, int is_on)
115 +{
116 + gpio_set_value(SPI_SCK_GPIO, is_on);
117 +}
118 +
119 +static inline void setmosi(const struct spi_device *spi, int is_on)
120 +{
121 + gpio_set_value(SPI_MOSI_GPIO, is_on);
122 +}
123 +
124 +static inline int getmiso(const struct spi_device *spi)
125 +{
126 + return gpio_get_value(SPI_MISO_GPIO);
127 +}
128 +
129 +#undef pdata
130 +
131 +/*
132 + * NOTE: this clocks "as fast as we can". It "should" be a function of the
133 + * requested device clock. Software overhead means we usually have trouble
134 + * reaching even one Mbit/sec (except when we can inline bitops), so for now
135 + * we'll just assume we never need additional per-bit slowdowns.
136 + */
137 +#define spidelay(nsecs) do {} while (0)
138 +
139 +#define EXPAND_BITBANG_TXRX
140 +#include <linux/spi/spi_bitbang.h>
141 +
142 +/*
143 + * These functions can leverage inline expansion of GPIO calls to shrink
144 + * costs for a txrx bit, often by factors of around ten (by instruction
145 + * count). That is particularly visible for larger word sizes, but helps
146 + * even with default 8-bit words.
147 + *
148 + * REVISIT overheads calling these functions for each word also have
149 + * significant performance costs. Having txrx_bufs() calls that inline
150 + * the txrx_word() logic would help performance, e.g. on larger blocks
151 + * used with flash storage or MMC/SD. There should also be ways to make
152 + * GCC be less stupid about reloading registers inside the I/O loops,
153 + * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
154 + */
155 +
156 +static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
157 + unsigned nsecs, u32 word, u8 bits)
158 +{
159 + return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
160 +}
161 +
162 +static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
163 + unsigned nsecs, u32 word, u8 bits)
164 +{
165 + return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
166 +}
167 +
168 +static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
169 + unsigned nsecs, u32 word, u8 bits)
170 +{
171 + return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
172 +}
173 +
174 +static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
175 + unsigned nsecs, u32 word, u8 bits)
176 +{
177 + return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
178 +}
179 +
180 +/*----------------------------------------------------------------------*/
181 +
182 +static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
183 +{
184 + unsigned long cs = (unsigned long) spi->controller_data;
185 +
186 + /* set initial clock polarity */
187 + if (is_active)
188 + setsck(spi, spi->mode & SPI_CPOL);
189 +
190 + /* SPI is normally active-low */
191 + gpio_set_value(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
192 +}
193 +
194 +static int spi_gpio_setup(struct spi_device *spi)
195 +{
196 + unsigned long cs = (unsigned long) spi->controller_data;
197 + int status = 0;
198 +
199 + if (spi->bits_per_word > 32)
200 + return -EINVAL;
201 +
202 + if (!spi->controller_state) {
203 + status = gpio_request(cs, spi->dev.bus_id);
204 + if (status)
205 + return status;
206 + status = gpio_direction_output(cs, spi->mode & SPI_CS_HIGH);
207 + }
208 + if (!status)
209 + status = spi_bitbang_setup(spi);
210 + if (status) {
211 + if (!spi->controller_state)
212 + gpio_free(cs);
213 + }
214 + return status;
215 +}
216 +
217 +static void spi_gpio_cleanup(struct spi_device *spi)
218 +{
219 + unsigned long cs = (unsigned long) spi->controller_data;
220 +
221 + gpio_free(cs);
222 + spi_bitbang_cleanup(spi);
223 +}
224 +
225 +static int __init spi_gpio_alloc(unsigned pin, const char *label, bool is_in)
226 +{
227 + int value;
228 +
229 + value = gpio_request(pin, label);
230 + if (value == 0) {
231 + if (is_in)
232 + value = gpio_direction_input(pin);
233 + else
234 + value = gpio_direction_output(pin, 0);
235 + }
236 + return value;
237 +}
238 +
239 +static int __init
240 +spi_gpio_request(struct spi_gpio_platform_data *pdata, const char *label)
241 +{
242 + int value;
243 +
244 + /* NOTE: SPI_*_GPIO symbols may reference "pdata" */
245 +
246 + value = spi_gpio_alloc(SPI_MOSI_GPIO, label, false);
247 + if (value)
248 + goto done;
249 +
250 + value = spi_gpio_alloc(SPI_MISO_GPIO, label, true);
251 + if (value)
252 + goto free_mosi;
253 +
254 + value = spi_gpio_alloc(SPI_SCK_GPIO, label, false);
255 + if (value)
256 + goto free_miso;
257 +
258 + goto done;
259 +
260 +free_miso:
261 + gpio_free(SPI_MISO_GPIO);
262 +free_mosi:
263 + gpio_free(SPI_MOSI_GPIO);
264 +done:
265 + return value;
266 +}
267 +
268 +static int __init spi_gpio_probe(struct platform_device *pdev)
269 +{
270 + int status;
271 + struct spi_master *master;
272 + struct spi_gpio *spi_gpio;
273 + struct spi_gpio_platform_data *pdata;
274 +
275 + pdata = pdev->dev.platform_data;
276 +#ifdef GENERIC_BITBANG
277 + if (!pdata || !pdata->num_chipselect)
278 + return -ENODEV;
279 +#endif
280 +
281 + status = spi_gpio_request(pdata, dev_name(&pdev->dev));
282 + if (status < 0)
283 + return status;
284 +
285 + master = spi_alloc_master(&pdev->dev, sizeof *spi_gpio);
286 + if (!master) {
287 + status = -ENOMEM;
288 + goto gpio_free;
289 + }
290 + spi_gpio = spi_master_get_devdata(master);
291 + platform_set_drvdata(pdev, spi_gpio);
292 +
293 + spi_gpio->pdev = pdev;
294 + if (pdata)
295 + spi_gpio->pdata = *pdata;
296 +
297 + master->bus_num = pdev->id;
298 + master->num_chipselect = SPI_N_CHIPSEL;
299 + master->setup = spi_gpio_setup;
300 + master->cleanup = spi_gpio_cleanup;
301 +
302 + spi_gpio->bitbang.master = spi_master_get(master);
303 + spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
304 + spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
305 + spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
306 + spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
307 + spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
308 + spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
309 + spi_gpio->bitbang.flags = SPI_CS_HIGH;
310 +
311 + status = spi_bitbang_start(&spi_gpio->bitbang);
312 + if (status < 0) {
313 + spi_master_put(spi_gpio->bitbang.master);
314 +gpio_free:
315 + gpio_free(SPI_MISO_GPIO);
316 + gpio_free(SPI_MOSI_GPIO);
317 + gpio_free(SPI_SCK_GPIO);
318 + spi_master_put(master);
319 + }
320 +
321 + return status;
322 +}
323 +
324 +static int __exit spi_gpio_remove(struct platform_device *pdev)
325 +{
326 + struct spi_gpio *spi_gpio;
327 + struct spi_gpio_platform_data *pdata;
328 + int status;
329 +
330 + spi_gpio = platform_get_drvdata(pdev);
331 + pdata = pdev->dev.platform_data;
332 +
333 + /* stop() unregisters child devices too */
334 + status = spi_bitbang_stop(&spi_gpio->bitbang);
335 + spi_master_put(spi_gpio->bitbang.master);
336 +
337 + platform_set_drvdata(pdev, NULL);
338 +
339 + gpio_free(SPI_MISO_GPIO);
340 + gpio_free(SPI_MOSI_GPIO);
341 + gpio_free(SPI_SCK_GPIO);
342 +
343 + return status;
344 +}
345 +
346 +MODULE_ALIAS("platform:" DRIVER_NAME);
347 +
348 +static struct platform_driver spi_gpio_driver = {
349 + .driver.name = DRIVER_NAME,
350 + .driver.owner = THIS_MODULE,
351 + .remove = __exit_p(spi_gpio_remove),
352 +};
353 +
354 +static int __init spi_gpio_init(void)
355 +{
356 + return platform_driver_probe(&spi_gpio_driver, spi_gpio_probe);
357 +}
358 +module_init(spi_gpio_init);
359 +
360 +static void __exit spi_gpio_exit(void)
361 +{
362 + platform_driver_unregister(&spi_gpio_driver);
363 +}
364 +module_exit(spi_gpio_exit);
365 +
366 +
367 +MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
368 +MODULE_AUTHOR("David Brownell");
369 +MODULE_LICENSE("GPL");
370 --- /dev/null
371 +++ b/include/linux/spi/spi_gpio.h
372 @@ -0,0 +1,60 @@
373 +#ifndef __LINUX_SPI_GPIO_H
374 +#define __LINUX_SPI_GPIO_H
375 +
376 +/*
377 + * For each bitbanged SPI bus, set up a platform_device node with:
378 + * - name "spi_gpio"
379 + * - id the same as the SPI bus number it implements
380 + * - dev.platform data pointing to a struct spi_gpio_platform_data
381 + *
382 + * Or, see the driver code for information about speedups that are
383 + * possible on platforms that support inlined access for GPIOs (no
384 + * spi_gpio_platform_data is used).
385 + *
386 + * Use spi_board_info with these busses in the usual way, being sure
387 + * that the controller_data being the GPIO used for each device's
388 + * chipselect:
389 + *
390 + * static struct spi_board_info ... [] = {
391 + * ...
392 + * // this slave uses GPIO 42 for its chipselect
393 + * .controller_data = (void *) 42,
394 + * ...
395 + * // this one uses GPIO 86 for its chipselect
396 + * .controller_data = (void *) 86,
397 + * ...
398 + * };
399 + *
400 + * If the bitbanged bus is later switched to a "native" controller,
401 + * that platform_device and controller_data should be removed.
402 + */
403 +
404 +/**
405 + * struct spi_gpio_platform_data - parameter for bitbanged SPI master
406 + * @sck: number of the GPIO used for clock output
407 + * @mosi: number of the GPIO used for Master Output, Slave In (MOSI) data
408 + * @miso: number of the GPIO used for Master Input, Slave Output (MISO) data
409 + * @num_chipselect: how many slaves to allow
410 + *
411 + * All GPIO signals used with the SPI bus managed through this driver
412 + * (chipselects, MOSI, MISO, SCK) must be configured as GPIOs, instead
413 + * of some alternate function.
414 + *
415 + * It can be convenient to use this driver with pins that have alternate
416 + * functions associated with a "native" SPI controller if a driver for that
417 + * controller is not available, or is missing important functionality.
418 + *
419 + * On platforms which can do so, configure MISO with a weak pullup unless
420 + * there's an external pullup on that signal. That saves power by avoiding
421 + * floating signals. (A weak pulldown would save power too, but many
422 + * drivers expect to see all-ones data as the no slave "response".)
423 + */
424 +struct spi_gpio_platform_data {
425 + unsigned sck;
426 + unsigned mosi;
427 + unsigned miso;
428 +
429 + u16 num_chipselect;
430 +};
431 +
432 +#endif /* __LINUX_SPI_GPIO_H */
433 --- a/drivers/spi/Kconfig
434 +++ b/drivers/spi/Kconfig
435 @@ -100,6 +100,22 @@ config SPI_BUTTERFLY
436 inexpensive battery powered microcontroller evaluation board.
437 This same cable can be used to flash new firmware.
438
439 +config SPI_GPIO
440 + tristate "GPIO-based bitbanging SPI Master"
441 + depends on GENERIC_GPIO
442 + select SPI_BITBANG
443 + help
444 + This simple GPIO bitbanging SPI master uses the arch-neutral GPIO
445 + interface to manage MOSI, MISO, SCK, and chipselect signals. SPI
446 + slaves connected to a bus using this driver are configured as usual,
447 + except that the spi_board_info.controller_data holds the GPIO number
448 + for the chipselect used by this controller driver.
449 +
450 + Note that this driver often won't achieve even 1 Mbit/sec speeds,
451 + making it unusually slow for SPI. If your platform can inline
452 + GPIO operations, you should be able to leverage that for better
453 + speed with a custom version of this driver; see the source code.
454 +
455 config SPI_IMX
456 tristate "Freescale iMX SPI controller"
457 depends on ARCH_IMX && EXPERIMENTAL
458 --- a/drivers/spi/Makefile
459 +++ b/drivers/spi/Makefile
460 @@ -16,6 +16,7 @@ obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.
461 obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o
462 obj-$(CONFIG_SPI_AU1550) += au1550_spi.o
463 obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o
464 +obj-$(CONFIG_SPI_GPIO) += spi_gpio.o
465 obj-$(CONFIG_SPI_IMX) += spi_imx.o
466 obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o
467 obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
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