ar71xx: add initial support for the Atheros DB120 board
[openwrt.git] / target / linux / ar71xx / files / drivers / net / ag71xx / ag71xx_mdio.c
1 /*
2 * Atheros AR71xx built-in ethernet mac driver
3 *
4 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Based on Atheros' AG7100 driver
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #include "ag71xx.h"
15
16 #define AG71XX_MDIO_RETRY 1000
17 #define AG71XX_MDIO_DELAY 5
18
19 static inline void ag71xx_mdio_wr(struct ag71xx_mdio *am, unsigned reg,
20 u32 value)
21 {
22 void __iomem *r;
23
24 r = am->mdio_base + reg;
25 __raw_writel(value, r);
26
27 /* flush write */
28 (void) __raw_readl(r);
29 }
30
31 static inline u32 ag71xx_mdio_rr(struct ag71xx_mdio *am, unsigned reg)
32 {
33 return __raw_readl(am->mdio_base + reg);
34 }
35
36 static void ag71xx_mdio_dump_regs(struct ag71xx_mdio *am)
37 {
38 DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n",
39 am->mii_bus->name,
40 ag71xx_mdio_rr(am, AG71XX_REG_MII_CFG),
41 ag71xx_mdio_rr(am, AG71XX_REG_MII_CMD),
42 ag71xx_mdio_rr(am, AG71XX_REG_MII_ADDR));
43 DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n",
44 am->mii_bus->name,
45 ag71xx_mdio_rr(am, AG71XX_REG_MII_CTRL),
46 ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS),
47 ag71xx_mdio_rr(am, AG71XX_REG_MII_IND));
48 }
49
50 int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg)
51 {
52 int ret;
53 int i;
54
55 ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE);
56 ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR,
57 ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff));
58 ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_READ);
59
60 i = AG71XX_MDIO_RETRY;
61 while (ag71xx_mdio_rr(am, AG71XX_REG_MII_IND) & MII_IND_BUSY) {
62 if (i-- == 0) {
63 printk(KERN_ERR "%s: mii_read timed out\n",
64 am->mii_bus->name);
65 ret = 0xffff;
66 goto out;
67 }
68 udelay(AG71XX_MDIO_DELAY);
69 }
70
71 ret = ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS) & 0xffff;
72 ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE);
73
74 DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, ret);
75
76 out:
77 return ret;
78 }
79
80 void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val)
81 {
82 int i;
83
84 DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr, reg, val);
85
86 ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR,
87 ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff));
88 ag71xx_mdio_wr(am, AG71XX_REG_MII_CTRL, val);
89
90 i = AG71XX_MDIO_RETRY;
91 while (ag71xx_mdio_rr(am, AG71XX_REG_MII_IND) & MII_IND_BUSY) {
92 if (i-- == 0) {
93 printk(KERN_ERR "%s: mii_write timed out\n",
94 am->mii_bus->name);
95 break;
96 }
97 udelay(AG71XX_MDIO_DELAY);
98 }
99 }
100
101 static int ag71xx_mdio_reset(struct mii_bus *bus)
102 {
103 struct ag71xx_mdio *am = bus->priv;
104 u32 t;
105
106 if (am->pdata->is_ar7240)
107 t = MII_CFG_CLK_DIV_6;
108 else
109 t = MII_CFG_CLK_DIV_28;
110
111 ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t | MII_CFG_RESET);
112 udelay(100);
113
114 ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t);
115 udelay(100);
116
117 return 0;
118 }
119
120 static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg)
121 {
122 struct ag71xx_mdio *am = bus->priv;
123
124 if (am->pdata->is_ar7240)
125 return ar7240sw_phy_read(bus, addr, reg);
126 else
127 return ag71xx_mdio_mii_read(am, addr, reg);
128 }
129
130 static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val)
131 {
132 struct ag71xx_mdio *am = bus->priv;
133
134 if (am->pdata->is_ar7240)
135 ar7240sw_phy_write(bus, addr, reg, val);
136 else
137 ag71xx_mdio_mii_write(am, addr, reg, val);
138 return 0;
139 }
140
141 static int __devinit ag71xx_mdio_probe(struct platform_device *pdev)
142 {
143 struct ag71xx_mdio_platform_data *pdata;
144 struct ag71xx_mdio *am;
145 struct resource *res;
146 int i;
147 int err;
148
149 pdata = pdev->dev.platform_data;
150 if (!pdata) {
151 dev_err(&pdev->dev, "no platform data specified\n");
152 return -EINVAL;
153 }
154
155 am = kzalloc(sizeof(*am), GFP_KERNEL);
156 if (!am) {
157 err = -ENOMEM;
158 goto err_out;
159 }
160
161 am->pdata = pdata;
162
163 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
164 if (!res) {
165 dev_err(&pdev->dev, "no iomem resource found\n");
166 err = -ENXIO;
167 goto err_out;
168 }
169
170 am->mdio_base = ioremap_nocache(res->start, res->end - res->start + 1);
171 if (!am->mdio_base) {
172 dev_err(&pdev->dev, "unable to ioremap registers\n");
173 err = -ENOMEM;
174 goto err_free_mdio;
175 }
176
177 am->mii_bus = mdiobus_alloc();
178 if (am->mii_bus == NULL) {
179 err = -ENOMEM;
180 goto err_iounmap;
181 }
182
183 am->mii_bus->name = "ag71xx_mdio";
184 am->mii_bus->read = ag71xx_mdio_read;
185 am->mii_bus->write = ag71xx_mdio_write;
186 am->mii_bus->reset = ag71xx_mdio_reset;
187 am->mii_bus->irq = am->mii_irq;
188 am->mii_bus->priv = am;
189 am->mii_bus->parent = &pdev->dev;
190 snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev));
191 am->mii_bus->phy_mask = pdata->phy_mask;
192
193 for (i = 0; i < PHY_MAX_ADDR; i++)
194 am->mii_irq[i] = PHY_POLL;
195
196 ag71xx_mdio_wr(am, AG71XX_REG_MAC_CFG1, 0);
197
198 err = mdiobus_register(am->mii_bus);
199 if (err)
200 goto err_free_bus;
201
202 ag71xx_mdio_dump_regs(am);
203
204 platform_set_drvdata(pdev, am);
205 return 0;
206
207 err_free_bus:
208 mdiobus_free(am->mii_bus);
209 err_iounmap:
210 iounmap(am->mdio_base);
211 err_free_mdio:
212 kfree(am);
213 err_out:
214 return err;
215 }
216
217 static int __devexit ag71xx_mdio_remove(struct platform_device *pdev)
218 {
219 struct ag71xx_mdio *am = platform_get_drvdata(pdev);
220
221 if (am) {
222 mdiobus_unregister(am->mii_bus);
223 mdiobus_free(am->mii_bus);
224 iounmap(am->mdio_base);
225 kfree(am);
226 platform_set_drvdata(pdev, NULL);
227 }
228
229 return 0;
230 }
231
232 static struct platform_driver ag71xx_mdio_driver = {
233 .probe = ag71xx_mdio_probe,
234 .remove = __exit_p(ag71xx_mdio_remove),
235 .driver = {
236 .name = "ag71xx-mdio",
237 }
238 };
239
240 int __init ag71xx_mdio_driver_init(void)
241 {
242 return platform_driver_register(&ag71xx_mdio_driver);
243 }
244
245 void ag71xx_mdio_driver_exit(void)
246 {
247 platform_driver_unregister(&ag71xx_mdio_driver);
248 }
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