generic: rtl8366: add rtl8366_smi_write_reg_noack helper
[openwrt.git] / target / linux / generic / files / crypto / ocf / kirkwood / cesa / mvLru.c
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64
65 #include "mvOs.h"
66 #include "mvLru.h"
67 /* LRU Cache support */
68
69
70 /* Init LRU cache database */
71 MV_LRU_CACHE* mvLruCacheInit(int numOfEntries)
72 {
73 int i;
74 MV_LRU_CACHE* pLruCache;
75
76 pLruCache = mvOsMalloc(sizeof(MV_LRU_CACHE));
77 if(pLruCache == NULL)
78 {
79 return NULL;
80 }
81 memset(pLruCache, 0, sizeof(MV_LRU_CACHE));
82
83 pLruCache->table = mvOsMalloc(numOfEntries*sizeof(MV_LRU_ENTRY));
84 if(pLruCache->table == NULL)
85 {
86 mvOsFree(pLruCache);
87 return NULL;
88 }
89 memset(pLruCache->table, 0, numOfEntries*sizeof(MV_LRU_ENTRY));
90 pLruCache->tableSize = numOfEntries;
91
92 for(i=0; i<numOfEntries; i++)
93 {
94 pLruCache->table[i].next = i+1;
95 pLruCache->table[i].prev = i-1;
96 }
97 pLruCache->least = 0;
98 pLruCache->most = numOfEntries-1;
99
100 return pLruCache;
101 }
102
103 void mvLruCacheFinish(MV_LRU_CACHE* pLruCache)
104 {
105 mvOsFree(pLruCache->table);
106 mvOsFree(pLruCache);
107 }
108
109 /* Update LRU cache database after using cache Index */
110 void mvLruCacheIdxUpdate(MV_LRU_CACHE* pLruHndl, int cacheIdx)
111 {
112 int prev, next;
113
114 if(cacheIdx == pLruHndl->most)
115 return;
116
117 next = pLruHndl->table[cacheIdx].next;
118 if(cacheIdx == pLruHndl->least)
119 {
120 pLruHndl->least = next;
121 }
122 else
123 {
124 prev = pLruHndl->table[cacheIdx].prev;
125
126 pLruHndl->table[next].prev = prev;
127 pLruHndl->table[prev].next = next;
128 }
129
130 pLruHndl->table[pLruHndl->most].next = cacheIdx;
131 pLruHndl->table[cacheIdx].prev = pLruHndl->most;
132 pLruHndl->most = cacheIdx;
133 }
134
135 /* Delete LRU cache entry */
136 void mvLruCacheIdxDelete(MV_LRU_CACHE* pLruHndl, int cacheIdx)
137 {
138 int prev, next;
139
140 if(cacheIdx == pLruHndl->least)
141 return;
142
143 prev = pLruHndl->table[cacheIdx].prev;
144 if(cacheIdx == pLruHndl->most)
145 {
146 pLruHndl->most = prev;
147 }
148 else
149 {
150 next = pLruHndl->table[cacheIdx].next;
151
152 pLruHndl->table[next].prev = prev;
153 pLruHndl->table[prev].next = next;
154 }
155 pLruHndl->table[pLruHndl->least].prev = cacheIdx;
156 pLruHndl->table[cacheIdx].next = pLruHndl->least;
157 pLruHndl->least = cacheIdx;
158 }
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