ar71xx: enable myloader partition parser on 2.6.30 and 2.6.31
[openwrt.git] / target / linux / ar7 / patches-2.6.27 / 910-cpmac_fixed_phy.patch
1 This is a hack to make cpmac work with the external switch on a DG834 v3; it
2 should also work on other similar routers. It has not been tested on hardware
3 with multiple cpmac devices or with no external switch. It may be safer to
4 move external_switch to pdata rather than trying to detect it, and to set
5 phy_mask correctly rather than moving the phy search loop.
6
7 --- a/drivers/net/cpmac.c 2008-11-11 06:18:24.000000000 +1100
8 +++ b/drivers/net/cpmac.c 2009-04-11 10:58:58.000000000 +1000
9 @@ -1124,8 +1124,8 @@
10
11 static int __devinit cpmac_probe(struct platform_device *pdev)
12 {
13 int rc, phy_id;
14 - char *mdio_bus_id = "0";
15 + char mdio_bus_id[BUS_ID_SIZE];
16 struct resource *mem;
17 struct cpmac_priv *priv;
18 struct net_device *dev;
19 @@ -1134,22 +1134,23 @@
20
21 pdata = pdev->dev.platform_data;
22
23 - for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
24 - if (!(pdata->phy_mask & (1 << phy_id)))
25 - continue;
26 - if (!cpmac_mii.phy_map[phy_id])
27 - continue;
28 - break;
29 + if (external_switch || dumb_switch) {
30 + strncpy(mdio_bus_id, "0", BUS_ID_SIZE); /* fixed phys bus */
31 + phy_id = pdev->id;
32 + } else {
33 + for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
34 + if (!(pdata->phy_mask & (1 << phy_id)))
35 + continue;
36 + if (!cpmac_mii.phy_map[phy_id])
37 + continue;
38 + strncpy(mdio_bus_id, cpmac_mii.id, BUS_ID_SIZE);
39 + break;
40 + }
41 }
42
43 if (phy_id == PHY_MAX_ADDR) {
44 - if (external_switch || dumb_switch) {
45 - mdio_bus_id = 0; /* fixed phys bus */
46 - phy_id = pdev->id;
47 - } else {
48 - dev_err(&pdev->dev, "no PHY present\n");
49 - return -ENODEV;
50 - }
51 + dev_err(&pdev->dev, "no PHY present\n");
52 + return -ENODEV;
53 }
54
55 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
56 @@ -1189,9 +1190,11 @@
57 priv->ring_size = 64;
58 priv->msg_enable = netif_msg_init(debug_level, 0xff);
59 memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
60 +
61 + snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
62
63 - priv->phy = phy_connect(dev, cpmac_mii.phy_map[phy_id]->dev.bus_id,
64 - &cpmac_adjust_link, 0, PHY_INTERFACE_MODE_MII);
65 + priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0,
66 + PHY_INTERFACE_MODE_MII);
67 if (IS_ERR(priv->phy)) {
68 if (netif_msg_drv(priv))
69 printk(KERN_ERR "%s: Could not attach to PHY\n",
70 @@ -1250,11 +1253,11 @@
71
72 cpmac_mii.reset(&cpmac_mii);
73
74 - for (i = 0; i < 300000; i++)
75 + for (i = 0; i < 300; i++)
76 if ((mask = cpmac_read(cpmac_mii.priv, CPMAC_MDIO_ALIVE)))
77 break;
78 else
79 - cpu_relax();
80 + msleep(10);
81
82 mask &= 0x7fffffff;
83 if (mask & (mask - 1)) {
84 @@ -1267,7 +1270,7 @@
85 }
86
87 cpmac_mii.phy_mask = ~(mask | 0x80000000);
88 - snprintf(cpmac_mii.id, MII_BUS_ID_SIZE, "0");
89 + snprintf(cpmac_mii.id, MII_BUS_ID_SIZE, "1");
90
91 res = mdiobus_register(&cpmac_mii);
92 if (res)
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