package/uboot-xburst/files/cpu/mips/mmc_protocol.h

   1 /*
   2 **********************************************************************
   3 *
   4 *                            uC/MMC
   5 *
   6 *             (c) Copyright 2005 - 2007, Ingenic Semiconductor, Inc
   7 *                      All rights reserved.
   8 *
   9 ***********************************************************************
  10
  11 ----------------------------------------------------------------------
  12 File        : mmc_protocol.h
  13 Purpose     : MMC protocol definitions.
  14
  15 ----------------------------------------------------------------------
  16 Version-Date-----Author-Explanation
  17 ----------------------------------------------------------------------
  18 1.00.00 20060831 WeiJianli     First release
  19
  20 ----------------------------------------------------------------------
  21 Known problems or limitations with current version
  22 ----------------------------------------------------------------------
  23 (none)
  24 ---------------------------END-OF-HEADER------------------------------
  25 */
  26
  27 #ifndef __MMC_PROTOCOL__
  28 #define __MMC_PROTOCOL__
  29
  30 /* Standard MMC/SD clock speeds */
  31 #define MMC_CLOCK_SLOW    400000      /* 400 kHz for initial setup */
  32 #define MMC_CLOCK_FAST  20000000      /* 20 MHz for maximum for normal operation */
  33 #define SD_CLOCK_FAST   24000000      /* 24 MHz for SD Cards */
  34
  35 /* Extra MMC commands for state control */
  36 /* Use negative numbers to disambiguate */
  37 #define MMC_CIM_RESET            -1
  38
  39 /* Standard MMC commands (3.1)           type  argument     response */
  40    /* class 1 */
  41 #define MMC_GO_IDLE_STATE         0   /* bc                          */
  42 #define MMC_SEND_OP_COND          1   /* bcr  [31:0] OCR         R3  */
  43 #define MMC_ALL_SEND_CID          2   /* bcr                     R2  */
  44 #define MMC_SET_RELATIVE_ADDR     3   /* ac   [31:16] RCA        R1  */
  45 #define MMC_SET_DSR               4   /* bc   [31:16] RCA            */
  46 #define MMC_SELECT_CARD           7   /* ac   [31:16] RCA        R1  */
  47 #define MMC_SEND_CSD              9   /* ac   [31:16] RCA        R2  */
  48 #define MMC_SEND_CID             10   /* ac   [31:16] RCA        R2  */
  49 #define MMC_READ_DAT_UNTIL_STOP  11   /* adtc [31:0] dadr        R1  */
  50 #define MMC_STOP_TRANSMISSION    12   /* ac                      R1b */
  51 #define MMC_SEND_STATUS          13   /* ac   [31:16] RCA        R1  */
  52 #define MMC_GO_INACTIVE_STATE    15   /* ac   [31:16] RCA            */
  53
  54   /* class 2 */
  55 #define MMC_SET_BLOCKLEN         16   /* ac   [31:0] block len   R1  */
  56 #define MMC_READ_SINGLE_BLOCK    17   /* adtc [31:0] data addr   R1  */
  57 #define MMC_READ_MULTIPLE_BLOCK  18   /* adtc [31:0] data addr   R1  */
  58
  59   /* class 3 */
  60 #define MMC_WRITE_DAT_UNTIL_STOP 20   /* adtc [31:0] data addr   R1  */
  61
  62   /* class 4 */
  63 #define MMC_SET_BLOCK_COUNT      23   /* adtc [31:0] data addr   R1  */
  64 #define MMC_WRITE_BLOCK          24   /* adtc [31:0] data addr   R1  */
  65 #define MMC_WRITE_MULTIPLE_BLOCK 25   /* adtc                    R1  */
  66 #define MMC_PROGRAM_CID          26   /* adtc                    R1  */
  67 #define MMC_PROGRAM_CSD          27   /* adtc                    R1  */
  68
  69   /* class 6 */
  70 #define MMC_SET_WRITE_PROT       28   /* ac   [31:0] data addr   R1b */
  71 #define MMC_CLR_WRITE_PROT       29   /* ac   [31:0] data addr   R1b */
  72 #define MMC_SEND_WRITE_PROT      30   /* adtc [31:0] wpdata addr R1  */
  73
  74   /* class 5 */
  75 #define MMC_ERASE_GROUP_START    35   /* ac   [31:0] data addr   R1  */
  76 #define MMC_ERASE_GROUP_END      36   /* ac   [31:0] data addr   R1  */
  77 #define MMC_ERASE                37   /* ac                      R1b */
  78
  79   /* class 9 */
  80 #define MMC_FAST_IO              39   /* ac   <Complex>          R4  */
  81 #define MMC_GO_IRQ_STATE         40   /* bcr                     R5  */
  82
  83   /* class 7 */
  84 #define MMC_LOCK_UNLOCK          42   /* adtc                    R1b */
  85
  86   /* class 8 */
  87 #define MMC_APP_CMD              55   /* ac   [31:16] RCA        R1  */
  88 #define MMC_GEN_CMD              56   /* adtc [0] RD/WR          R1b */
  89
  90   /* SD class */
  91 #define SD_SEND_OP_COND          41   /* bcr  [31:0] OCR         R3  */
  92 #define SET_BUS_WIDTH            6    /* ac   [1:0] bus width    R1  */
  93 #define SEND_SCR                 51   /* adtc [31:0] staff       R1  */
  94
  95 /* Don't change the order of these; they are used in dispatch tables */
  96 enum mmc_rsp_t {
  97         RESPONSE_NONE   = 0,
  98         RESPONSE_R1     = 1,
  99         RESPONSE_R1B    = 2,
 100         RESPONSE_R2_CID = 3,
 101         RESPONSE_R2_CSD  = 4,
 102         RESPONSE_R3      = 5,
 103         RESPONSE_R4      = 6,
 104         RESPONSE_R5      = 7,
 105         RESPONSE_R6      = 8,
 106 };
 107
 108
 109 /*
 110   MMC status in R1
 111   Type
 112         e : error bit
 113         s : status bit
 114         r : detected and set for the actual command response
 115         x : detected and set during command execution. the host must poll
 116             the card by sending status command in order to read these bits.
 117   Clear condition
 118         a : according to the card state
 119         b : always related to the previous command. Reception of
 120             a valid command will clear it (with a delay of one command)
 121         c : clear by read
 122  */
 123
 124 #define R1_OUT_OF_RANGE         (1 << 31)       /* er, c */
 125 #define R1_ADDRESS_ERROR        (1 << 30)       /* erx, c */
 126 #define R1_BLOCK_LEN_ERROR      (1 << 29)       /* er, c */
 127 #define R1_ERASE_SEQ_ERROR      (1 << 28)       /* er, c */
 128 #define R1_ERASE_PARAM          (1 << 27)       /* ex, c */
 129 #define R1_WP_VIOLATION         (1 << 26)       /* erx, c */
 130 #define R1_CARD_IS_LOCKED       (1 << 25)       /* sx, a */
 131 #define R1_LOCK_UNLOCK_FAILED   (1 << 24)       /* erx, c */
 132 #define R1_COM_CRC_ERROR        (1 << 23)       /* er, b */
 133 #define R1_ILLEGAL_COMMAND      (1 << 22)       /* er, b */
 134 #define R1_CARD_ECC_FAILED      (1 << 21)       /* ex, c */
 135 #define R1_CC_ERROR             (1 << 20)       /* erx, c */
 136 #define R1_ERROR                (1 << 19)       /* erx, c */
 137 #define R1_UNDERRUN             (1 << 18)       /* ex, c */
 138 #define R1_OVERRUN              (1 << 17)       /* ex, c */
 139 #define R1_CID_CSD_OVERWRITE    (1 << 16)       /* erx, c, CID/CSD overwrite */
 140 #define R1_WP_ERASE_SKIP        (1 << 15)       /* sx, c */
 141 #define R1_CARD_ECC_DISABLED    (1 << 14)       /* sx, a */
 142 #define R1_ERASE_RESET          (1 << 13)       /* sr, c */
 143 #define R1_STATUS(x)            (x & 0xFFFFE000)
 144 #define R1_CURRENT_STATE(x)     ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
 145 #define R1_READY_FOR_DATA       (1 << 8)        /* sx, a */
 146 #define R1_APP_CMD              (1 << 7)        /* sr, c */
 147
 148 enum card_state {
 149         CARD_STATE_EMPTY = -1,
 150         CARD_STATE_IDLE  = 0,
 151         CARD_STATE_READY = 1,
 152         CARD_STATE_IDENT = 2,
 153         CARD_STATE_STBY  = 3,
 154         CARD_STATE_TRAN  = 4,
 155         CARD_STATE_DATA  = 5,
 156         CARD_STATE_RCV   = 6,
 157         CARD_STATE_PRG   = 7,
 158         CARD_STATE_DIS   = 8,
 159 };
 160
 161 /* These are unpacked versions of the actual responses */
 162
 163  struct mmc_response_r1 {
 164         u8  cmd;
 165         u32 status;
 166 };
 167
 168 typedef struct mmc_cid {
 169         u8  mid;
 170         u16 oid;
 171         u8  pnm[7];   /* Product name (we null-terminate) */
 172         u8  prv;
 173         u32 psn;
 174         u8  mdt;
 175 }mmc_cid_t;
 176
 177 typedef struct mmc_csd {
 178         u8  csd_structure;
 179         u8  spec_vers;
 180         u8  taac;
 181         u8  nsac;
 182         u8  tran_speed;
 183         u16 ccc;
 184         u8  read_bl_len;
 185         u8  read_bl_partial;
 186         u8  write_blk_misalign;
 187         u8  read_blk_misalign;
 188         u8  dsr_imp;
 189         u16 c_size;
 190         u8  vdd_r_curr_min;
 191         u8  vdd_r_curr_max;
 192         u8  vdd_w_curr_min;
 193         u8  vdd_w_curr_max;
 194         u8  c_size_mult;
 195         union {
 196                 struct { /* MMC system specification version 3.1 */
 197                         u8  erase_grp_size;
 198                         u8  erase_grp_mult;
 199                 } v31;
 200                 struct { /* MMC system specification version 2.2 */
 201                         u8  sector_size;
 202                         u8  erase_grp_size;
 203                 } v22;
 204         } erase;
 205         u8  wp_grp_size;
 206         u8  wp_grp_enable;
 207         u8  default_ecc;
 208         u8  r2w_factor;
 209         u8  write_bl_len;
 210         u8  write_bl_partial;
 211         u8  file_format_grp;
 212         u8  copy;
 213         u8  perm_write_protect;
 214         u8  tmp_write_protect;
 215         u8  file_format;
 216         u8  ecc;
 217 }mmc_csd_t;;
 218
 219 struct mmc_response_r3 {
 220         u32 ocr;
 221 };
 222
 223 #define MMC_VDD_145_150 0x00000001      /* VDD voltage 1.45 - 1.50 */
 224 #define MMC_VDD_150_155 0x00000002      /* VDD voltage 1.50 - 1.55 */
 225 #define MMC_VDD_155_160 0x00000004      /* VDD voltage 1.55 - 1.60 */
 226 #define MMC_VDD_160_165 0x00000008      /* VDD voltage 1.60 - 1.65 */
 227 #define MMC_VDD_165_170 0x00000010      /* VDD voltage 1.65 - 1.70 */
 228 #define MMC_VDD_17_18   0x00000020      /* VDD voltage 1.7 - 1.8 */
 229 #define MMC_VDD_18_19   0x00000040      /* VDD voltage 1.8 - 1.9 */
 230 #define MMC_VDD_19_20   0x00000080      /* VDD voltage 1.9 - 2.0 */
 231 #define MMC_VDD_20_21   0x00000100      /* VDD voltage 2.0 ~ 2.1 */
 232 #define MMC_VDD_21_22   0x00000200      /* VDD voltage 2.1 ~ 2.2 */
 233 #define MMC_VDD_22_23   0x00000400      /* VDD voltage 2.2 ~ 2.3 */
 234 #define MMC_VDD_23_24   0x00000800      /* VDD voltage 2.3 ~ 2.4 */
 235 #define MMC_VDD_24_25   0x00001000      /* VDD voltage 2.4 ~ 2.5 */
 236 #define MMC_VDD_25_26   0x00002000      /* VDD voltage 2.5 ~ 2.6 */
 237 #define MMC_VDD_26_27   0x00004000      /* VDD voltage 2.6 ~ 2.7 */
 238 #define MMC_VDD_27_28   0x00008000      /* VDD voltage 2.7 ~ 2.8 */
 239 #define MMC_VDD_28_29   0x00010000      /* VDD voltage 2.8 ~ 2.9 */
 240 #define MMC_VDD_29_30   0x00020000      /* VDD voltage 2.9 ~ 3.0 */
 241 #define MMC_VDD_30_31   0x00040000      /* VDD voltage 3.0 ~ 3.1 */
 242 #define MMC_VDD_31_32   0x00080000      /* VDD voltage 3.1 ~ 3.2 */
 243 #define MMC_VDD_32_33   0x00100000      /* VDD voltage 3.2 ~ 3.3 */
 244 #define MMC_VDD_33_34   0x00200000      /* VDD voltage 3.3 ~ 3.4 */
 245 #define MMC_VDD_34_35   0x00400000      /* VDD voltage 3.4 ~ 3.5 */
 246 #define MMC_VDD_35_36   0x00800000      /* VDD voltage 3.5 ~ 3.6 */
 247 #define MMC_CARD_BUSY   0x80000000      /* Card Power up status bit */
 248
 249
 250 /* CSD field definitions */
 251
 252 #define CSD_STRUCT_VER_1_0  0           /* Valid for system specification 1.0 - 1.2 */
 253 #define CSD_STRUCT_VER_1_1  1           /* Valid for system specification 1.4 - 2.2 */
 254 #define CSD_STRUCT_VER_1_2  2           /* Valid for system specification 3.1       */
 255
 256 #define CSD_SPEC_VER_0      0           /* Implements system specification 1.0 - 1.2 */
 257 #define CSD_SPEC_VER_1      1           /* Implements system specification 1.4 */
 258 #define CSD_SPEC_VER_2      2           /* Implements system specification 2.0 - 2.2 */
 259 #define CSD_SPEC_VER_3      3           /* Implements system specification 3.1 */
 260
 261 #if MMC_DEBUG_LEVEL
 262
 263 #define DEBUG(n, args...)                       \
 264     do {    \
 265         if (n <=  MMC_DEBUG_LEVEL) {    \
 266                 printf(args);   \
 267         }    \
 268     } while(0)
 269 #else
 270 #define DEBUG(n, args...)
 271 #endif /* MMC_DEBUG_EN */
 272
 273 #endif  /* __MMC_PROTOCOL__ */