ramips: add support for Sparklan WCR-150GN board
[openwrt.git] / target / linux / ramips / files / arch / mips / ralink / rt305x / setup.c
1 /*
2 * Ralink RT305x SoC specific setup
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * Parts of this file are based on Ralink's 2.6.21 BSP
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/io.h>
16
17 #include <asm/mips_machine.h>
18 #include <asm/reboot.h>
19 #include <asm/time.h>
20
21 #include <asm/mach-ralink/common.h>
22 #include <asm/mach-ralink/rt305x.h>
23 #include <asm/mach-ralink/rt305x_regs.h>
24
25 static void rt305x_restart(char *command)
26 {
27 rt305x_sysc_wr(RT305X_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
28 while (1)
29 if (cpu_wait)
30 cpu_wait();
31 }
32
33 static void rt305x_halt(void)
34 {
35 while (1)
36 if (cpu_wait)
37 cpu_wait();
38 }
39
40 unsigned int __cpuinit get_c0_compare_irq(void)
41 {
42 return CP0_LEGACY_COMPARE_IRQ;
43 }
44
45 void __init ramips_soc_setup(void)
46 {
47 rt305x_sysc_base = ioremap_nocache(RT305X_SYSC_BASE, PAGE_SIZE);
48 rt305x_memc_base = ioremap_nocache(RT305X_MEMC_BASE, PAGE_SIZE);
49
50 rt305x_detect_sys_type();
51 rt305x_detect_sys_freq();
52
53 printk(KERN_INFO "%s running at %lu.%02lu MHz\n", ramips_sys_type,
54 rt305x_cpu_freq / 1000000,
55 (rt305x_cpu_freq % 1000000) * 100 / 1000000);
56
57 _machine_restart = rt305x_restart;
58 _machine_halt = rt305x_halt;
59 pm_power_off = rt305x_halt;
60
61 ramips_early_serial_setup(0, RT305X_UART0_BASE, rt305x_sys_freq,
62 RT305X_INTC_IRQ_UART0);
63 ramips_early_serial_setup(1, RT305X_UART1_BASE, rt305x_sys_freq,
64 RT305X_INTC_IRQ_UART1);
65 }
66
67 void __init plat_time_init(void)
68 {
69 mips_hpt_frequency = rt305x_cpu_freq / 2;
70 }
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