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[openwrt.git] / target / linux / adm5120-2.6 / files / drivers / usb / host / adm5120-hcd.c
1 /*
2 * HCD driver for ADM5120 SoC
3 *
4 * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
5 *
6 * Based on the ADMtek 2.4 driver
7 * (C) Copyright 2003 Junius Chen <juniusc@admtek.com.tw>
8 * Which again was based on the ohci and uhci drivers.
9 */
10
11 #include <linux/module.h>
12 #include <linux/delay.h>
13 #include <linux/debugfs.h>
14 #include <linux/seq_file.h>
15 #include <linux/errno.h>
16 #include <linux/init.h>
17 #include <linux/list.h>
18 #include <linux/usb.h>
19 #include <linux/platform_device.h>
20
21 #include <asm/bootinfo.h>
22 #include <asm/io.h>
23 #include <asm/irq.h>
24 #include <asm/system.h>
25 #include <asm/byteorder.h>
26 #include <asm/mach-adm5120/adm5120_info.h>
27
28 #include "../core/hcd.h"
29
30 MODULE_DESCRIPTION("ADM5120 USB Host Controller Driver");
31 MODULE_LICENSE("GPL");
32 MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
33
34 #define PFX "adm5120-hcd: "
35
36 #define ADMHCD_REG_CONTROL 0x00
37 #define ADMHCD_REG_INTSTATUS 0x04
38 #define ADMHCD_REG_INTENABLE 0x08
39 #define ADMHCD_REG_HOSTCONTROL 0x10
40 #define ADMHCD_REG_FMINTERVAL 0x18
41 #define ADMHCD_REG_FMNUMBER 0x1c
42 #define ADMHCD_REG_LSTHRESH 0x70
43 #define ADMHCD_REG_RHDESCR 0x74
44 #define ADMHCD_REG_PORTSTATUS0 0x78
45 #define ADMHCD_REG_PORTSTATUS1 0x7c
46 #define ADMHCD_REG_HOSTHEAD 0x80
47
48
49 #define ADMHCD_NUMPORTS 2
50
51 #define ADMHCD_HOST_EN 0x00000001 /* Host enable */
52 #define ADMHCD_SW_INTREQ 0x00000002 /* request software int */
53 #define ADMHCD_SW_RESET 0x00000008 /* Reset */
54
55 #define ADMHCD_INT_TD 0x00100000 /* TD completed */
56 #define ADMHCD_INT_SW 0x20000000 /* software interrupt */
57 #define ADMHCD_INT_FATAL 0x40000000 /* Fatal interrupt */
58 #define ADMHCD_INT_ACT 0x80000000 /* Interrupt active */
59
60 #define ADMHCD_STATE_RST 0x00000000 /* bus state reset */
61 #define ADMHCD_STATE_RES 0x00000001 /* bus state resume */
62 #define ADMHCD_STATE_OP 0x00000002 /* bus state operational */
63 #define ADMHCD_STATE_SUS 0x00000003 /* bus state suspended */
64 #define ADMHCD_DMA_EN 0x00000004 /* enable dma engine */
65
66 #define ADMHCD_NPS 0x00000020 /* No Power Switch */
67 #define ADMHCD_LPSC 0x04000000 /* Local power switch change */
68
69 #define ADMHCD_CCS 0x00000001 /* current connect status */
70 #define ADMHCD_PES 0x00000002 /* port enable status */
71 #define ADMHCD_PSS 0x00000004 /* port suspend status */
72 #define ADMHCD_POCI 0x00000008 /* port overcurrent indicator */
73 #define ADMHCD_PRS 0x00000010 /* port reset status */
74 #define ADMHCD_PPS 0x00000100 /* port power status */
75 #define ADMHCD_LSDA 0x00000200 /* low speed device attached */
76 #define ADMHCD_CSC 0x00010000 /* connect status change */
77 #define ADMHCD_PESC 0x00020000 /* enable status change */
78 #define ADMHCD_PSSC 0x00040000 /* suspend status change */
79 #define ADMHCD_OCIC 0x00080000 /* overcurrent change*/
80 #define ADMHCD_PRSC 0x00100000 /* reset status change */
81
82
83 struct admhcd_ed {
84 /* Don't change first four, they used for DMA */
85 u32 control;
86 struct admhcd_td *tail;
87 struct admhcd_td *head;
88 struct admhcd_ed *next;
89 /* the rest is for the driver only: */
90 struct admhcd_td *cur;
91 struct usb_host_endpoint *ep;
92 struct urb *urb;
93 struct admhcd_ed *real;
94 } __attribute__ ((packed));
95
96 #define ADMHCD_ED_EPSHIFT 7 /* Shift for endpoint number */
97 #define ADMHCD_ED_INT 0x00000800 /* Is this an int endpoint */
98 #define ADMHCD_ED_SPEED 0x00002000 /* Is it a high speed dev? */
99 #define ADMHCD_ED_SKIP 0x00004000 /* Skip this ED */
100 #define ADMHCD_ED_FORMAT 0x00008000 /* Is this an isoc endpoint */
101 #define ADMHCD_ED_MAXSHIFT 16 /* Shift for max packet size */
102
103 struct admhcd_td {
104 /* Don't change first four, they are used for DMA */
105 u32 control;
106 u32 buffer;
107 u32 buflen;
108 struct admhcd_td *next;
109 /* the rest is for the driver only: */
110 struct urb *urb;
111 struct admhcd_td *real;
112 } __attribute__ ((packed));
113
114 #define ADMHCD_TD_OWN 0x80000000
115 #define ADMHCD_TD_TOGGLE 0x00000000
116 #define ADMHCD_TD_DATA0 0x01000000
117 #define ADMHCD_TD_DATA1 0x01800000
118 #define ADMHCD_TD_OUT 0x00200000
119 #define ADMHCD_TD_IN 0x00400000
120 #define ADMHCD_TD_SETUP 0x00000000
121 #define ADMHCD_TD_ISO 0x00010000
122 #define ADMHCD_TD_R 0x00040000
123 #define ADMHCD_TD_INTEN 0x00010000
124
125 static int admhcd_td_err[16] = {
126 0, /* No */
127 -EREMOTEIO, /* CRC */
128 -EREMOTEIO, /* bit stuff */
129 -EREMOTEIO, /* data toggle */
130 -EPIPE, /* stall */
131 -ETIMEDOUT, /* timeout */
132 -EPROTO, /* pid err */
133 -EPROTO, /* unexpected pid */
134 -EREMOTEIO, /* data overrun */
135 -EREMOTEIO, /* data underrun */
136 -ETIMEDOUT, /* 1010 */
137 -ETIMEDOUT, /* 1011 */
138 -EREMOTEIO, /* buffer overrun */
139 -EREMOTEIO, /* buffer underrun */
140 -ETIMEDOUT, /* 1110 */
141 -ETIMEDOUT, /* 1111 */
142 };
143
144 #define ADMHCD_TD_ERRMASK 0x38000000
145 #define ADMHCD_TD_ERRSHIFT 27
146
147 #define TD(td) ((struct admhcd_td *)(((u32)(td)) & ~0xf))
148 #define ED(ed) ((struct admhcd_ed *)(((u32)(ed)) & ~0xf))
149
150 struct admhcd {
151 spinlock_t lock;
152
153 void __iomem *addr_reg;
154 void __iomem *data_reg;
155 /* Root hub registers */
156 u32 rhdesca;
157 u32 rhdescb;
158 u32 rhstatus;
159 u32 rhport[2];
160
161 /* async schedule: control, bulk */
162 struct list_head async;
163 u32 base;
164 u32 dma_en;
165 unsigned long flags;
166
167 };
168
169 static inline struct admhcd *hcd_to_admhcd(struct usb_hcd *hcd)
170 {
171 return (struct admhcd *)(hcd->hcd_priv);
172 }
173
174 static inline struct usb_hcd *admhcd_to_hcd(struct admhcd *admhcd)
175 {
176 return container_of((void *)admhcd, struct usb_hcd, hcd_priv);
177 }
178
179 static char hcd_name[] = "adm5120-hcd";
180
181 static u32 admhcd_reg_get(struct admhcd *ahcd, int reg)
182 {
183 return *(volatile u32 *)KSEG1ADDR(ahcd->base+reg);
184 }
185
186 static void admhcd_reg_set(struct admhcd *ahcd, int reg, u32 val)
187 {
188 *(volatile u32 *)KSEG1ADDR(ahcd->base+reg) = val;
189 }
190
191 static void admhcd_lock(struct admhcd *ahcd)
192 {
193 spin_lock_irqsave(&ahcd->lock, ahcd->flags);
194 ahcd->dma_en = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL) &
195 ADMHCD_DMA_EN;
196 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
197 }
198
199 static void admhcd_unlock(struct admhcd *ahcd)
200 {
201 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL,
202 ADMHCD_STATE_OP | ahcd->dma_en);
203 spin_unlock_irqrestore(&ahcd->lock, ahcd->flags);
204 }
205
206 static struct admhcd_td *admhcd_td_alloc(struct admhcd_ed *ed, struct urb *urb)
207 {
208 struct admhcd_td *tdn, *td;
209
210 tdn = kmalloc(sizeof(struct admhcd_td), GFP_ATOMIC);
211 if (!tdn)
212 return NULL;
213 tdn->real = tdn;
214 tdn = (struct admhcd_td *)KSEG1ADDR(tdn);
215 memset(tdn, 0, sizeof(struct admhcd_td));
216 if (ed->cur == NULL) {
217 ed->cur = tdn;
218 ed->head = tdn;
219 ed->tail = tdn;
220 td = tdn;
221 } else {
222 /* Supply back the old tail and link in new td as tail */
223 td = TD(ed->tail);
224 TD(ed->tail)->next = tdn;
225 ed->tail = tdn;
226 }
227 td->urb = urb;
228
229 return td;
230 }
231
232 static void admhcd_td_free(struct admhcd_ed *ed, struct urb *urb)
233 {
234 struct admhcd_td *td, **tdp;
235
236 if (urb == NULL)
237 ed->control |= ADMHCD_ED_SKIP;
238 tdp = &ed->cur;
239 td = ed->cur;
240 do {
241 if (td->urb == urb)
242 break;
243 tdp = &td->next;
244 td = TD(td->next);
245 } while (td);
246 while (td && td->urb == urb) {
247 *tdp = TD(td->next);
248 kfree(td->real);
249 td = *tdp;
250 }
251 }
252
253 /* Find an endpoint's descriptor, if needed allocate a new one and link it
254 in the DMA chain
255 */
256 static struct admhcd_ed *admhcd_get_ed(struct admhcd *ahcd,
257 struct usb_host_endpoint *ep, struct urb *urb)
258 {
259 struct admhcd_ed *hosthead;
260 struct admhcd_ed *found = NULL, *ed = NULL;
261 unsigned int pipe = urb->pipe;
262
263 admhcd_lock(ahcd);
264 hosthead = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
265 if (hosthead) {
266 for (ed = hosthead;; ed = ED(ed->next)) {
267 if (ed->ep == ep) {
268 found = ed;
269 break;
270 }
271 if (ED(ed->next) == hosthead)
272 break;
273 }
274 }
275 if (!found) {
276 found = kmalloc(sizeof(struct admhcd_ed), GFP_ATOMIC);
277 if (!found)
278 goto out;
279 memset(found, 0, sizeof(struct admhcd_ed));
280 found->real = found;
281 found->ep = ep;
282 found = (struct admhcd_ed *)KSEG1ADDR(found);
283 found->control = usb_pipedevice(pipe) |
284 (usb_pipeendpoint(pipe) << ADMHCD_ED_EPSHIFT) |
285 (usb_pipeint(pipe) ? ADMHCD_ED_INT : 0) |
286 (urb->dev->speed == USB_SPEED_FULL ? ADMHCD_ED_SPEED : 0) |
287 (usb_pipeisoc(pipe) ? ADMHCD_ED_FORMAT : 0) |
288 (usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)) << ADMHCD_ED_MAXSHIFT);
289 /* Alloc first dummy td */
290 admhcd_td_alloc(found, NULL);
291 if (hosthead) {
292 found->next = hosthead;
293 ed->next = found;
294 } else {
295 found->next = found;
296 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)found);
297 }
298 }
299 out:
300 admhcd_unlock(ahcd);
301 return found;
302 }
303
304 static struct admhcd_td *admhcd_td_fill(u32 control, struct admhcd_td *td,
305 dma_addr_t data, int len)
306 {
307 td->buffer = data;
308 td->buflen = len;
309 td->control = control;
310 return TD(td->next);
311 }
312
313 static void admhcd_ed_start(struct admhcd *ahcd, struct admhcd_ed *ed)
314 {
315 struct admhcd_td *td = ed->cur;
316
317 if (ed->urb)
318 return;
319 if (td->urb) {
320 ed->urb = td->urb;
321 while (1) {
322 td->control |= ADMHCD_TD_OWN;
323 if (TD(td->next)->urb != td->urb) {
324 td->buflen |= ADMHCD_TD_INTEN;
325 break;
326 }
327 td = TD(td->next);
328 }
329 }
330 ed->head = TD(ed->head);
331 ahcd->dma_en |= ADMHCD_DMA_EN;
332 }
333
334 static irqreturn_t adm5120hcd_irq(struct usb_hcd *hcd)
335 {
336 struct admhcd *ahcd = hcd_to_admhcd(hcd);
337 u32 intstatus;
338
339 intstatus = admhcd_reg_get(ahcd, ADMHCD_REG_INTSTATUS);
340 if (intstatus & ADMHCD_INT_FATAL) {
341 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_FATAL);
342 //
343 }
344 if (intstatus & ADMHCD_INT_SW) {
345 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_SW);
346 //
347 }
348 if (intstatus & ADMHCD_INT_TD) {
349 struct admhcd_ed *ed, *head;
350
351 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_TD);
352
353 head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
354 ed = head;
355 if (ed) do {
356 /* Is it a finished TD? */
357 if (ed->urb && !(ed->cur->control & ADMHCD_TD_OWN)) {
358 struct admhcd_td *td;
359 int error;
360
361 td = ed->cur;
362 error = (td->control & ADMHCD_TD_ERRMASK) >>
363 ADMHCD_TD_ERRSHIFT;
364 ed->urb->status = admhcd_td_err[error];
365 admhcd_td_free(ed, ed->urb);
366 // Calculate real length!!!
367 ed->urb->actual_length = ed->urb->transfer_buffer_length;
368 ed->urb->hcpriv = NULL;
369 usb_hcd_giveback_urb(hcd, ed->urb);
370 ed->urb = NULL;
371 }
372 admhcd_ed_start(ahcd, ed);
373 ed = ED(ed->next);
374 } while (ed != head);
375 }
376
377 return IRQ_HANDLED;
378 }
379
380 static int admhcd_urb_enqueue(struct usb_hcd *hcd, struct usb_host_endpoint *ep,
381 struct urb *urb, gfp_t mem_flags)
382 {
383 struct admhcd *ahcd = hcd_to_admhcd(hcd);
384 struct admhcd_ed *ed;
385 struct admhcd_td *td;
386 int size = 0, i, zero = 0, ret = 0;
387 unsigned int pipe = urb->pipe, toggle = 0;
388 dma_addr_t data = (dma_addr_t)urb->transfer_buffer;
389 int data_len = urb->transfer_buffer_length;
390
391 ed = admhcd_get_ed(ahcd, ep, urb);
392 if (!ed)
393 return -ENOMEM;
394
395 switch(usb_pipetype(pipe)) {
396 case PIPE_CONTROL:
397 size = 2;
398 case PIPE_INTERRUPT:
399 case PIPE_BULK:
400 default:
401 size += urb->transfer_buffer_length / 4096;
402 if (urb->transfer_buffer_length % 4096)
403 size++;
404 if (size == 0)
405 size++;
406 else if (urb->transfer_flags & URB_ZERO_PACKET &&
407 !(urb->transfer_buffer_length %
408 usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)))) {
409 size++;
410 zero = 1;
411 }
412 break;
413 case PIPE_ISOCHRONOUS:
414 size = urb->number_of_packets;
415 break;
416 }
417
418 admhcd_lock(ahcd);
419 /* Remember the first td */
420 td = admhcd_td_alloc(ed, urb);
421 if (!td) {
422 ret = -ENOMEM;
423 goto out;
424 }
425 /* Allocate additionall tds first */
426 for (i = 1; i < size; i++) {
427 if (admhcd_td_alloc(ed, urb) == NULL) {
428 admhcd_td_free(ed, urb);
429 ret = -ENOMEM;
430 goto out;
431 }
432 }
433
434 if (usb_gettoggle(urb->dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)))
435 toggle = ADMHCD_TD_TOGGLE;
436 else {
437 toggle = ADMHCD_TD_DATA0;
438 usb_settoggle(urb->dev, usb_pipeendpoint(pipe),
439 usb_pipeout(pipe), 1);
440 }
441
442 switch(usb_pipetype(pipe)) {
443 case PIPE_CONTROL:
444 td = admhcd_td_fill(ADMHCD_TD_SETUP | ADMHCD_TD_DATA0,
445 td, (dma_addr_t)urb->setup_packet, 8);
446 while (data_len > 0) {
447 td = admhcd_td_fill(ADMHCD_TD_DATA1
448 | ADMHCD_TD_R |
449 (usb_pipeout(pipe) ?
450 ADMHCD_TD_OUT : ADMHCD_TD_IN), td,
451 data, data_len % 4097);
452 data_len -= 4096;
453 }
454 admhcd_td_fill(ADMHCD_TD_DATA1 | (usb_pipeout(pipe) ?
455 ADMHCD_TD_IN : ADMHCD_TD_OUT), td,
456 data, 0);
457 break;
458 case PIPE_INTERRUPT:
459 case PIPE_BULK:
460 //info ok for interrupt?
461 i = 0;
462 while(data_len > 4096) {
463 td = admhcd_td_fill((usb_pipeout(pipe) ?
464 ADMHCD_TD_OUT :
465 ADMHCD_TD_IN | ADMHCD_TD_R) |
466 (i ? ADMHCD_TD_TOGGLE : toggle), td,
467 data, 4096);
468 data += 4096;
469 data_len -= 4096;
470 i++;
471 }
472 td = admhcd_td_fill((usb_pipeout(pipe) ?
473 ADMHCD_TD_OUT : ADMHCD_TD_IN) |
474 (i ? ADMHCD_TD_TOGGLE : toggle), td, data, data_len);
475 i++;
476 if (zero)
477 admhcd_td_fill((usb_pipeout(pipe) ?
478 ADMHCD_TD_OUT : ADMHCD_TD_IN) |
479 (i ? ADMHCD_TD_TOGGLE : toggle), td, 0, 0);
480 break;
481 case PIPE_ISOCHRONOUS:
482 for (i = 0; i < urb->number_of_packets; i++) {
483 td = admhcd_td_fill(ADMHCD_TD_ISO |
484 ((urb->start_frame + i) & 0xffff), td,
485 data + urb->iso_frame_desc[i].offset,
486 urb->iso_frame_desc[i].length);
487 }
488 break;
489 }
490 urb->hcpriv = ed;
491 admhcd_ed_start(ahcd, ed);
492 out:
493 admhcd_unlock(ahcd);
494 return ret;
495 }
496
497 static int admhcd_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
498 {
499 struct admhcd *ahcd = hcd_to_admhcd(hcd);
500 struct admhcd_ed *ed;
501
502 admhcd_lock(ahcd);
503
504 ed = urb->hcpriv;
505 if (ed && ed->urb != urb)
506 admhcd_td_free(ed, urb);
507
508 admhcd_unlock(ahcd);
509 return 0;
510 }
511
512 static void admhcd_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
513 {
514 struct admhcd *ahcd = hcd_to_admhcd(hcd);
515 struct admhcd_ed *ed, *edt, *head;
516
517 admhcd_lock(ahcd);
518
519 head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
520 if (!head)
521 goto out;
522 for (ed = head; ED(ed->next) != head; ed = ED(ed->next))
523 if (ed->ep == ep)
524 break;
525 if (ed->ep != ep)
526 goto out;
527 while (ed->cur)
528 admhcd_td_free(ed, ed->cur->urb);
529 if (head == ed) {
530 if (ED(ed->next) == ed) {
531 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0);
532 ahcd->dma_en = 0;
533 goto out_free;
534 }
535 head = ED(ed->next);
536 for (edt = head; ED(edt->next) != head; edt = ED(edt->next));
537 edt->next = ED(ed->next);
538 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)ed->next);
539 goto out_free;
540 }
541 for (edt = head; edt->next != ed; edt = edt->next);
542 edt->next = ed->next;
543 out_free:
544 kfree(ed->real);
545 out:
546 admhcd_unlock(ahcd);
547 }
548
549 static int admhcd_get_frame_number(struct usb_hcd *hcd)
550 {
551 struct admhcd *ahcd = hcd_to_admhcd(hcd);
552
553 return admhcd_reg_get(ahcd, ADMHCD_REG_FMNUMBER) & 0x0000ffff;
554 }
555
556 static int admhcd_hub_status_data(struct usb_hcd *hcd, char *buf)
557 {
558 struct admhcd *ahcd = hcd_to_admhcd(hcd);
559 int port;
560
561 *buf = 0;
562 for (port = 0; port < ADMHCD_NUMPORTS; port++) {
563 if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4) &
564 (ADMHCD_CSC | ADMHCD_PESC | ADMHCD_PSSC | ADMHCD_OCIC |
565 ADMHCD_PRSC))
566 *buf |= (1 << (port + 1));
567 }
568 return !!*buf;
569 }
570
571 static __u8 root_hub_hub_des[] = {
572 0x09, /* __u8 bLength; */
573 0x29, /* __u8 bDescriptorType; Hub-descriptor */
574 0x02, /* __u8 bNbrPorts; */
575 0x0a, 0x00, /* __u16 wHubCharacteristics; */
576 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
577 0x00, /* __u8 bHubContrCurrent; 0mA */
578 0x00, /* __u8 DeviceRemovable; */
579 0xff, /* __u8 PortPwrCtrlMask; */
580 };
581
582 static int admhcd_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
583 u16 wIndex, char *buf, u16 wLength)
584 {
585 struct admhcd *ahcd = hcd_to_admhcd(hcd);
586 int retval = 0, len;
587 unsigned int port = wIndex -1;
588
589 switch (typeReq) {
590
591 case GetHubStatus:
592 *(__le32 *)buf = cpu_to_le32(0);
593 break;
594 case GetPortStatus:
595 if (port >= ADMHCD_NUMPORTS)
596 goto err;
597 *(__le32 *)buf = cpu_to_le32(
598 admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4));
599 break;
600 case SetHubFeature: /* We don't implement these */
601 case ClearHubFeature:
602 switch (wValue) {
603 case C_HUB_OVER_CURRENT:
604 case C_HUB_LOCAL_POWER:
605 break;
606 default:
607 goto err;
608 }
609 case SetPortFeature:
610 if (port >= ADMHCD_NUMPORTS)
611 goto err;
612
613 switch (wValue) {
614 case USB_PORT_FEAT_SUSPEND:
615 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
616 ADMHCD_PSS);
617 break;
618 case USB_PORT_FEAT_RESET:
619 if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4)
620 & ADMHCD_CCS) {
621 admhcd_reg_set(ahcd,
622 ADMHCD_REG_PORTSTATUS0 + port*4,
623 ADMHCD_PRS | ADMHCD_CSC);
624 mdelay(50);
625 admhcd_reg_set(ahcd,
626 ADMHCD_REG_PORTSTATUS0 + port*4,
627 ADMHCD_PES | ADMHCD_CSC);
628 }
629 break;
630 case USB_PORT_FEAT_POWER:
631 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
632 ADMHCD_PPS);
633 break;
634 default:
635 goto err;
636 }
637 break;
638 case ClearPortFeature:
639 if (port >= ADMHCD_NUMPORTS)
640 goto err;
641
642 switch (wValue) {
643 case USB_PORT_FEAT_ENABLE:
644 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
645 ADMHCD_CCS);
646 break;
647 case USB_PORT_FEAT_C_ENABLE:
648 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
649 ADMHCD_PESC);
650 break;
651 case USB_PORT_FEAT_SUSPEND:
652 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
653 ADMHCD_POCI);
654 break;
655 case USB_PORT_FEAT_C_SUSPEND:
656 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
657 ADMHCD_PSSC);
658 case USB_PORT_FEAT_POWER:
659 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
660 ADMHCD_LSDA);
661 break;
662 case USB_PORT_FEAT_C_CONNECTION:
663 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
664 ADMHCD_CSC);
665 break;
666 case USB_PORT_FEAT_C_OVER_CURRENT:
667 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
668 ADMHCD_OCIC);
669 break;
670 case USB_PORT_FEAT_C_RESET:
671 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
672 ADMHCD_PRSC);
673 break;
674 default:
675 goto err;
676 }
677 break;
678 case GetHubDescriptor:
679 len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
680 memcpy(buf, root_hub_hub_des, len);
681 break;
682 default:
683 err:
684 retval = -EPIPE;
685 }
686
687 return retval;
688 }
689
690 static struct hc_driver adm5120_hc_driver = {
691 .description = hcd_name,
692 .product_desc = "ADM5120 HCD",
693 .hcd_priv_size = sizeof(struct admhcd),
694 .irq = adm5120hcd_irq,
695 .flags = HCD_USB11,
696 .urb_enqueue = admhcd_urb_enqueue,
697 .urb_dequeue = admhcd_urb_dequeue,
698 .endpoint_disable = admhcd_endpoint_disable,
699 .get_frame_number = admhcd_get_frame_number,
700 .hub_status_data = admhcd_hub_status_data,
701 .hub_control = admhcd_hub_control,
702 };
703
704 #define resource_len(r) (((r)->end - (r)->start) + 1)
705
706 static int __init adm5120hcd_probe(struct platform_device *pdev)
707 {
708 struct usb_hcd *hcd;
709 struct admhcd *ahcd;
710 struct resource *addr, *data;
711 void __iomem *addr_reg;
712 void __iomem *data_reg;
713
714 int err = 0, irq;
715
716 if (pdev->num_resources < 3) {
717 err = -ENODEV;
718 goto out;
719 }
720
721 if (pdev->dev.dma_mask) {
722 printk(KERN_DEBUG "no we won't dma\n");
723 return -EINVAL;
724 }
725
726 irq = platform_get_irq(pdev, 0);
727 data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
728 addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
729
730 if (!addr || !data || irq < 0) {
731 err = -ENODEV;
732 goto out;
733 }
734
735 if (!request_mem_region(addr->start, 2, hcd_name)) {
736 err = -EBUSY;
737 goto out;
738 }
739
740 addr_reg = ioremap(addr->start, resource_len(addr));
741 if (addr_reg == NULL) {
742 err = -ENOMEM;
743 goto out_mem;
744 }
745 if (!request_mem_region(data->start, 2, hcd_name)) {
746 err = -EBUSY;
747 goto out_unmap;
748 }
749
750 data_reg = ioremap(data->start, resource_len(data));
751 if (data_reg == NULL) {
752 err = -ENOMEM;
753 goto out_mem;
754 }
755
756 hcd = usb_create_hcd(&adm5120_hc_driver, &pdev->dev, pdev->dev.bus_id);
757 if (!hcd)
758 goto out_mem;
759
760 hcd->rsrc_start = addr->start;
761 ahcd = hcd_to_admhcd(hcd);
762
763 spin_lock_init(&ahcd->lock);
764 INIT_LIST_HEAD(&ahcd->async);
765
766 ahcd->data_reg = data_reg;
767 ahcd->addr_reg = addr_reg;
768
769 hcd->product_desc = "ADM5120 HCD";
770
771 /* Initialise the HCD registers */
772 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
773 mdelay(10);
774
775 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
776
777 while (admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET)
778 mdelay(1);
779
780 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_HOST_EN);
781 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0x00000000);
782 admhcd_reg_set(ahcd, ADMHCD_REG_FMINTERVAL, 0x20002edf);
783 admhcd_reg_set(ahcd, ADMHCD_REG_LSTHRESH, 0x628);
784 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE,
785 ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
786 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS,
787 ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
788 admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, ADMHCD_NPS | ADMHCD_LPSC);
789 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
790
791 err = usb_add_hcd(hcd, irq, IRQF_DISABLED);
792 if (err)
793 goto out_dev;
794
795 return 0;
796
797 out_dev:
798 usb_put_hcd(hcd);
799 out_unmap:
800 iounmap(addr_reg);
801 out_mem:
802 release_mem_region(pdev->resource[0].start, pdev->resource[0].end - pdev->resource[0].start);
803 out:
804 return err;
805 }
806
807 static int __init_or_module adm5120hcd_remove(struct platform_device *pdev)
808 {
809 struct usb_hcd *hcd = platform_get_drvdata(pdev);
810 struct admhcd *ahcd;
811
812 if (!hcd)
813 return 0;
814 ahcd = hcd_to_admhcd(hcd);
815 usb_remove_hcd(hcd);
816
817 usb_put_hcd(hcd);
818 return 0;
819 }
820
821 static struct platform_driver adm5120hcd_driver = {
822 .probe = adm5120hcd_probe,
823 .remove = adm5120hcd_remove,
824 .driver = {
825 .name = "adm5120-usbc",
826 .owner = THIS_MODULE,
827 },
828 };
829
830 static int __init adm5120hcd_init(void)
831 {
832 int ret;
833
834 if (usb_disabled()) {
835 printk(KERN_DEBUG PFX "USB support is disabled\n");
836 return -ENODEV;
837 }
838
839 if (mips_machgroup != MACH_GROUP_ADM5120) {
840 printk(KERN_DEBUG PFX "unsupported machine group\n");
841 return -ENODEV;
842 }
843
844 ret = platform_driver_register(&adm5120hcd_driver);
845 if (ret == 0)
846 printk(KERN_INFO PFX "registered\n");
847
848 return ret;
849 }
850
851 static void __exit adm5120hcd_exit(void)
852 {
853 platform_driver_unregister(&adm5120hcd_driver);
854 }
855
856 module_init(adm5120hcd_init);
857 module_exit(adm5120hcd_exit);
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