[ar7] refresh patches and remove trailing whitespaces
[openwrt.git] / package / uboot-lantiq / files / drivers / serial / ifx_asc.h
1 /*****************************************************************************
2 * DANUBE BootROM
3 * Copyright (c) 2005, Infineon Technologies AG, All rights reserved
4 * IFAP DC COM SD
5 *****************************************************************************/
6 #ifndef __ASC_H
7 #define __ASC_H
8
9 /* channel operating modes */
10 #define ASCOPT_CSIZE 0x00000003
11 #define ASCOPT_CS7 0x00000001
12 #define ASCOPT_CS8 0x00000002
13 #define ASCOPT_PARENB 0x00000004
14 #define ASCOPT_STOPB 0x00000008
15 #define ASCOPT_PARODD 0x00000010
16 #define ASCOPT_CREAD 0x00000020
17
18 #define ASC_OPTIONS (ASCOPT_CREAD | ASCOPT_CS8)
19
20 /* ASC input select (0 or 1) */
21 #define CONSOLE_TTY 0
22
23 #define ASC_TXFIFO_FL 1
24 #define ASC_RXFIFO_FL 1
25 #define ASC_TXFIFO_FULL 16
26
27 /* CLC register's bits and bitfields */
28 #define ASCCLC_DISR 0x00000001
29 #define ASCCLC_DISS 0x00000002
30 #define ASCCLC_RMCMASK 0x0000FF00
31 #define ASCCLC_RMCOFFSET 8
32
33 /* CON register's bits and bitfields */
34 #define ASCCON_MODEMASK 0x0000000f
35 #define ASCCON_M_8ASYNC 0x0
36 #define ASCCON_M_8IRDA 0x1
37 #define ASCCON_M_7ASYNC 0x2
38 #define ASCCON_M_7IRDA 0x3
39 #define ASCCON_WLSMASK 0x0000000c
40 #define ASCCON_WLSOFFSET 2
41 #define ASCCON_WLS_8BIT 0x0
42 #define ASCCON_WLS_7BIT 0x1
43 #define ASCCON_PEN 0x00000010
44 #define ASCCON_ODD 0x00000020
45 #define ASCCON_SP 0x00000040
46 #define ASCCON_STP 0x00000080
47 #define ASCCON_BRS 0x00000100
48 #define ASCCON_FDE 0x00000200
49 #define ASCCON_ERRCLK 0x00000400
50 #define ASCCON_EMMASK 0x00001800
51 #define ASCCON_EMOFFSET 11
52 #define ASCCON_EM_ECHO_OFF 0x0
53 #define ASCCON_EM_ECHO_AB 0x1
54 #define ASCCON_EM_ECHO_ON 0x2
55 #define ASCCON_LB 0x00002000
56 #define ASCCON_ACO 0x00004000
57 #define ASCCON_R 0x00008000
58 #define ASCCON_PAL 0x00010000
59 #define ASCCON_FEN 0x00020000
60 #define ASCCON_RUEN 0x00040000
61 #define ASCCON_ROEN 0x00080000
62 #define ASCCON_TOEN 0x00100000
63 #define ASCCON_BEN 0x00200000
64 #define ASCCON_TXINV 0x01000000
65 #define ASCCON_RXINV 0x02000000
66 #define ASCCON_TXMSB 0x04000000
67 #define ASCCON_RXMSB 0x08000000
68
69 /* STATE register's bits and bitfields */
70 #define ASCSTATE_REN 0x00000001
71 #define ASCSTATE_PE 0x00010000
72 #define ASCSTATE_FE 0x00020000
73 #define ASCSTATE_RUE 0x00040000
74 #define ASCSTATE_ROE 0x00080000
75 #define ASCSTATE_TOE 0x00100000
76 #define ASCSTATE_BE 0x00200000
77 #define ASCSTATE_TXBVMASK 0x07000000
78 #define ASCSTATE_TXBVOFFSET 24
79 #define ASCSTATE_TXEOM 0x08000000
80 #define ASCSTATE_RXBVMASK 0x70000000
81 #define ASCSTATE_RXBVOFFSET 28
82 #define ASCSTATE_RXEOM 0x80000000
83
84 /* WHBSTATE register's bits and bitfields */
85 #define ASCWHBSTATE_CLRREN 0x00000001
86 #define ASCWHBSTATE_SETREN 0x00000002
87 #define ASCWHBSTATE_CLRPE 0x00000004
88 #define ASCWHBSTATE_CLRFE 0x00000008
89 #define ASCWHBSTATE_CLRRUE 0x00000010
90 #define ASCWHBSTATE_CLRROE 0x00000020
91 #define ASCWHBSTATE_CLRTOE 0x00000040
92 #define ASCWHBSTATE_CLRBE 0x00000080
93 #define ASCWHBSTATE_SETPE 0x00000100
94 #define ASCWHBSTATE_SETFE 0x00000200
95 #define ASCWHBSTATE_SETRUE 0x00000400
96 #define ASCWHBSTATE_SETROE 0x00000800
97 #define ASCWHBSTATE_SETTOE 0x00001000
98 #define ASCWHBSTATE_SETBE 0x00002000
99
100 /* ABCON register's bits and bitfields */
101 #define ASCABCON_ABEN 0x0001
102 #define ASCABCON_AUREN 0x0002
103 #define ASCABCON_ABSTEN 0x0004
104 #define ASCABCON_ABDETEN 0x0008
105 #define ASCABCON_FCDETEN 0x0010
106
107 /* FDV register mask, offset and bitfields*/
108 #define ASCFDV_VALUE_MASK 0x000001FF
109
110 /* WHBABCON register's bits and bitfields */
111 #define ASCWHBABCON_CLRABEN 0x0001
112 #define ASCWHBABCON_SETABEN 0x0002
113
114 /* ABSTAT register's bits and bitfields */
115 #define ASCABSTAT_FCSDET 0x0001
116 #define ASCABSTAT_FCCDET 0x0002
117 #define ASCABSTAT_SCSDET 0x0004
118 #define ASCABSTAT_SCCDET 0x0008
119 #define ASCABSTAT_DETWAIT 0x0010
120
121 /* WHBABSTAT register's bits and bitfields */
122 #define ASCWHBABSTAT_CLRFCSDET 0x0001
123 #define ASCWHBABSTAT_SETFCSDET 0x0002
124 #define ASCWHBABSTAT_CLRFCCDET 0x0004
125 #define ASCWHBABSTAT_SETFCCDET 0x0008
126 #define ASCWHBABSTAT_CLRSCSDET 0x0010
127 #define ASCWHBABSTAT_SETSCSDET 0x0020
128 #define ASCWHBABSTAT_CLRSCCDET 0x0040
129 #define ASCWHBABSTAT_SETSCCDET 0x0080
130 #define ASCWHBABSTAT_CLRDETWAIT 0x0100
131 #define ASCWHBABSTAT_SETDETWAIT 0x0200
132
133 /* TXFCON register's bits and bitfields */
134 #define ASCTXFCON_TXFIFO1 0x00000400
135 #define ASCTXFCON_TXFEN 0x0001
136 #define ASCTXFCON_TXFFLU 0x0002
137 #define ASCTXFCON_TXFITLMASK 0x3F00
138 #define ASCTXFCON_TXFITLOFF 8
139
140 /* RXFCON register's bits and bitfields */
141 #define ASCRXFCON_RXFIFO1 0x00000400
142 #define ASCRXFCON_RXFEN 0x0001
143 #define ASCRXFCON_RXFFLU 0x0002
144 #define ASCRXFCON_RXFITLMASK 0x3F00
145 #define ASCRXFCON_RXFITLOFF 8
146
147 /* FSTAT register's bits and bitfields */
148 #define ASCFSTAT_RXFFLMASK 0x003F
149 #define ASCFSTAT_TXFFLMASK 0x3F00
150 #define ASCFSTAT_TXFFLOFF 8
151
152 typedef struct IfxAsc_s
153 {
154 unsigned long asc_clc; /*0x0000*/
155 unsigned long asc_pisel; /*0x0004*/
156 unsigned long asc_id; /*0x0008*/
157 unsigned long asc_rsvd1[1]; /* for mapping */ /*0x000C*/
158 unsigned long asc_con; /*0x0010*/
159 unsigned long asc_state; /*0x0014*/
160 unsigned long asc_whbstate; /*0x0018*/
161 unsigned long asc_rsvd2[1]; /* for mapping */ /*0x001C*/
162 unsigned long asc_tbuf; /*0x0020*/
163 unsigned long asc_rbuf; /*0x0024*/
164 unsigned long asc_rsvd3[2]; /* for mapping */ /*0x0028*/
165 unsigned long asc_abcon; /*0x0030*/
166 unsigned long asc_abstat; /* not used */ /*0x0034*/
167 unsigned long asc_whbabcon; /*0x0038*/
168 unsigned long asc_whbabstat; /* not used */ /*0x003C*/
169 unsigned long asc_rxfcon; /*0x0040*/
170 unsigned long asc_txfcon; /*0x0044*/
171 unsigned long asc_fstat; /*0x0048*/
172 unsigned long asc_rsvd4[1]; /* for mapping */ /*0x004C*/
173 unsigned long asc_bg; /*0x0050*/
174 unsigned long asc_bg_timer; /*0x0054*/
175 unsigned long asc_fdv; /*0x0058*/
176 unsigned long asc_pmw; /*0x005C*/
177 unsigned long asc_modcon; /*0x0060*/
178 unsigned long asc_modstat; /*0x0064*/
179 unsigned long asc_rsvd5[2]; /* for mapping */ /*0x0068*/
180 unsigned long asc_sfcc; /*0x0070*/
181 unsigned long asc_rsvd6[3]; /* for mapping */ /*0x0074*/
182 unsigned long asc_eomcon; /*0x0080*/
183 unsigned long asc_rsvd7[26]; /* for mapping */ /*0x0084*/
184 unsigned long asc_dmacon; /*0x00EC*/
185 unsigned long asc_rsvd8[1]; /* for mapping */ /*0x00F0*/
186 unsigned long asc_irnen; /*0x00F4*/
187 unsigned long asc_irnicr; /*0x00F8*/
188 unsigned long asc_irncr; /*0x00FC*/
189 } IfxAsc_t;
190
191
192 /* Register access macros */
193 #define asc_readl(reg) \
194 readl(&pAsc->reg)
195 #define asc_writel(reg,value) \
196 writel((value), &pAsc->reg)
197
198
199 #endif /* __ASC_H */
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