Alloz aead and friends to compile for 2.6.27 targets no idea it could not without...
[openwrt.git] / target / linux / rb532 / files-2.6.24 / drivers / net / rc32434_eth.h
1 /**************************************************************************
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Definitions for IDT RC32434 on-chip ethernet controller.
5 *
6 * Copyright 2004 IDT Inc. (rischelp@idt.com)
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 *
28 *
29 **************************************************************************
30 * May 2004 rkt, neb
31 *
32 * Initial Release
33 *
34 * Aug 2004
35 *
36 * Added NAPI
37 *
38 **************************************************************************
39 */
40
41
42 #include <asm/rc32434/rc32434.h>
43 #include <asm/rc32434/dma_v.h>
44 #include <asm/rc32434/eth_v.h>
45
46 #define CONFIG_IDT_USE_NAPI 1
47 #define RC32434_DEBUG 2
48 //#define RC32434_PROC_DEBUG
49 #undef RC32434_DEBUG
50
51 #ifdef RC32434_DEBUG
52
53 /* use 0 for production, 1 for verification, >2 for debug */
54 static int rc32434_debug = RC32434_DEBUG;
55 #define ASSERT(expr) \
56 if(!(expr)) { \
57 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
58 #expr,__FILE__,__FUNCTION__,__LINE__); }
59 #define DBG(lvl, format, arg...) if (rc32434_debug > lvl) printk(KERN_INFO "%s: " format, dev->name , ## arg)
60 #else
61 #define ASSERT(expr) do {} while (0)
62 #define DBG(lvl, format, arg...) do {} while (0)
63 #endif
64
65 #define INFO(format, arg...) printk(KERN_INFO "%s: " format, dev->name , ## arg)
66 #define ERR(format, arg...) printk(KERN_ERR "%s: " format, dev->name , ## arg)
67 #define WARN(format, arg...) printk(KERN_WARNING "%s: " format, dev->name , ## arg)
68
69 /* the following must be powers of two */
70 #ifdef CONFIG_IDT_USE_NAPI
71 #define RC32434_NUM_RDS 64 /* number of receive descriptors */
72 #define RC32434_NUM_TDS 64 /* number of transmit descriptors */
73 #else
74 #define RC32434_NUM_RDS 128 /* number of receive descriptors */
75 #define RC32434_NUM_TDS 128 /* number of transmit descriptors */
76 #endif
77
78 #define RC32434_RBSIZE 1536 /* size of one resource buffer = Ether MTU */
79 #define RC32434_RDS_MASK (RC32434_NUM_RDS-1)
80 #define RC32434_TDS_MASK (RC32434_NUM_TDS-1)
81 #define RD_RING_SIZE (RC32434_NUM_RDS * sizeof(struct DMAD_s))
82 #define TD_RING_SIZE (RC32434_NUM_TDS * sizeof(struct DMAD_s))
83
84 #define RC32434_TX_TIMEOUT HZ * 100
85
86 #define rc32434_eth0_regs ((ETH_t)(ETH0_VirtualAddress))
87 #define rc32434_eth1_regs ((ETH_t)(ETH1_VirtualAddress))
88
89 enum status { filled, empty};
90 #define IS_DMA_FINISHED(X) (((X) & (DMAD_f_m)) != 0)
91 #define IS_DMA_DONE(X) (((X) & (DMAD_d_m)) != 0)
92
93
94 /* Information that need to be kept for each board. */
95 struct rc32434_local {
96 ETH_t eth_regs;
97 DMA_Chan_t rx_dma_regs;
98 DMA_Chan_t tx_dma_regs;
99 volatile DMAD_t td_ring; /* transmit descriptor ring */
100 volatile DMAD_t rd_ring; /* receive descriptor ring */
101
102 struct sk_buff* tx_skb[RC32434_NUM_TDS]; /* skbuffs for pkt to trans */
103 struct sk_buff* rx_skb[RC32434_NUM_RDS]; /* skbuffs for pkt to trans */
104
105 struct tasklet_struct * tx_tasklet;
106
107 int rx_next_done;
108 int rx_chain_head;
109 int rx_chain_tail;
110 enum status rx_chain_status;
111
112 int tx_next_done;
113 int tx_chain_head;
114 int tx_chain_tail;
115 enum status tx_chain_status;
116 int tx_count;
117 int tx_full;
118
119 struct timer_list mii_phy_timer;
120 unsigned long duplex_mode;
121
122 int rx_irq;
123 int tx_irq;
124 int ovr_irq;
125 int und_irq;
126
127 struct net_device_stats stats;
128 spinlock_t lock;
129
130 /* debug /proc entry */
131 struct proc_dir_entry *ps;
132 int dma_halt_cnt; int dma_run_cnt;
133 struct napi_struct napi;
134 struct net_device *dev;
135 };
136
137 extern unsigned int idt_cpu_freq;
138
139 /* Index to functions, as function prototypes. */
140 static int rc32434_open(struct net_device *dev);
141 static int rc32434_send_packet(struct sk_buff *skb, struct net_device *dev);
142 static void rc32434_mii_handler(unsigned long data);
143 static irqreturn_t rc32434_und_interrupt(int irq, void *dev_id);
144 static irqreturn_t rc32434_rx_dma_interrupt(int irq, void *dev_id);
145 static irqreturn_t rc32434_tx_dma_interrupt(int irq, void *dev_id);
146 #ifdef RC32434_REVISION
147 static irqreturn_t rc32434_ovr_interrupt(int irq, void *dev_id);
148 #endif
149 static int rc32434_close(struct net_device *dev);
150 static struct net_device_stats *rc32434_get_stats(struct net_device *dev);
151 static void rc32434_multicast_list(struct net_device *dev);
152 static int rc32434_init(struct net_device *dev);
153 static void rc32434_tx_timeout(struct net_device *dev);
154
155 static void rc32434_tx_tasklet(unsigned long tx_data_dev);
156 static int rc32434_poll(struct napi_struct *napi, int budget);
157 static void rc32434_cleanup_module(void);
158
159
160 static inline void rc32434_abort_dma(struct net_device *dev, DMA_Chan_t ch)
161 {
162 if (__raw_readl(&ch->dmac) & DMAC_run_m) {
163 __raw_writel(0x10, &ch->dmac);
164
165 while (!(__raw_readl(&ch->dmas) & DMAS_h_m))
166 dev->trans_start = jiffies;
167
168 __raw_writel(0, &ch->dmas);
169 }
170
171 __raw_writel(0, &ch->dmadptr);
172 __raw_writel(0, &ch->dmandptr);
173 }
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