target/linux/lantiq/patches/0011-MIPS-lantiq-adds-falcon-I2C.patch

   1 From 6437f41dfdf9475178e22ab0dd886af033f90cc2 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 29 Sep 2011 21:10:16 +0200
   4 Subject: [PATCH 11/24] MIPS: lantiq: adds falcon I2C
   5
   6 ---
   7  arch/mips/lantiq/falcon/devices.c |   21 +
   8  arch/mips/lantiq/falcon/devices.h |    1 +
   9  drivers/i2c/busses/Kconfig        |    4 +
  10  drivers/i2c/busses/Makefile       |    1 +
  11  drivers/i2c/busses/i2c-falcon.c   |  815 +++++++++++++++++++++++++++++++++++++
  12  5 files changed, 842 insertions(+), 0 deletions(-)
  13  create mode 100644 drivers/i2c/busses/i2c-falcon.c
  14
  15 --- a/arch/mips/lantiq/falcon/devices.c
  16 +++ b/arch/mips/lantiq/falcon/devices.c
  17 @@ -126,3 +126,24 @@ falcon_register_gpio_extra(void)
  18         ltq_sysctl_activate(SYSCTL_SYS1,
  19                 ACTS_PADCTRL3 | ACTS_PADCTRL4 | ACTS_P3 | ACTS_P4);
  20  }
  21 +
  22 +/* i2c */
  23 +static struct resource falcon_i2c_resources[] = {
  24 +       MEM_RES("i2c", GPON_I2C_BASE,GPON_I2C_END),
  25 +       IRQ_RES("i2c_lb", FALCON_IRQ_I2C_LBREQ),
  26 +       IRQ_RES("i2c_b", FALCON_IRQ_I2C_BREQ),
  27 +       IRQ_RES("i2c_err", FALCON_IRQ_I2C_I2C_ERR),
  28 +       IRQ_RES("i2c_p", FALCON_IRQ_I2C_I2C_P),
  29 +};
  30 +
  31 +void __init falcon_register_i2c(void)
  32 +{
  33 +       platform_device_register_simple("i2c-falcon", 0,
  34 +       falcon_i2c_resources, ARRAY_SIZE(falcon_i2c_resources));
  35 +       sys1_hw_activate(ACTS_I2C_ACT);
  36 +}
  37 +
  38 +void __init falcon_register_crypto(void)
  39 +{
  40 +       platform_device_register_simple("ltq_falcon_deu", 0, NULL, 0);
  41 +}
  42 --- a/arch/mips/lantiq/falcon/devices.h
  43 +++ b/arch/mips/lantiq/falcon/devices.h
  44 @@ -16,5 +16,6 @@
  45  extern void falcon_register_nand(void);
  46  extern void falcon_register_gpio(void);
  47  extern void falcon_register_gpio_extra(void);
  48 +extern void falcon_register_i2c(void);
  49
  50  #endif
  51 --- a/drivers/i2c/busses/Kconfig
  52 +++ b/drivers/i2c/busses/Kconfig
  53 @@ -284,6 +284,10 @@ config I2C_POWERMAC
  54
  55  comment "I2C system bus drivers (mostly embedded / system-on-chip)"
  56
  57 +config I2C_FALCON
  58 +       tristate "Falcon I2C interface"
  59 +#      depends on SOC_FALCON
  60 +
  61  config I2C_AT91
  62         tristate "Atmel AT91 I2C Two-Wire interface (TWI)"
  63         depends on ARCH_AT91 && EXPERIMENTAL && BROKEN
  64 --- a/drivers/i2c/busses/Makefile
  65 +++ b/drivers/i2c/busses/Makefile
  66 @@ -82,5 +82,6 @@ obj-$(CONFIG_I2C_SIBYTE)      += i2c-sibyte.o
  67  obj-$(CONFIG_I2C_STUB)         += i2c-stub.o
  68  obj-$(CONFIG_SCx200_ACB)       += scx200_acb.o
  69  obj-$(CONFIG_SCx200_I2C)       += scx200_i2c.o
  70 +obj-$(CONFIG_I2C_FALCON)       += i2c-falcon.o
  71
  72  ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
  73 --- /dev/null
  74 +++ b/drivers/i2c/busses/i2c-falcon.c
  75 @@ -0,0 +1,815 @@
  76 +/*
  77 + * Lantiq FALC(tm) ON - I2C bus adapter
  78 + *
  79 + * Parts based on i2c-designware.c and other i2c drivers from Linux 2.6.33
  80 + *
  81 + * This program is free software; you can redistribute it and/or modify
  82 + * it under the terms of the GNU General Public License as published by
  83 + * the Free Software Foundation; either version 2 of the License, or
  84 + * (at your option) any later version.
  85 + *
  86 + * This program is distributed in the hope that it will be useful,
  87 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  88 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  89 + * GNU General Public License for more details.
  90 + *
  91 + * You should have received a copy of the GNU General Public License
  92 + * along with this program; if not, write to the Free Software
  93 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  94 + */
  95 +
  96 +/* #define DEBUG */
  97 +
  98 +#include <linux/kernel.h>
  99 +#include <linux/module.h>
 100 +#include <linux/delay.h>
 101 +#include <linux/slab.h> /* for kzalloc, kfree */
 102 +#include <linux/i2c.h>
 103 +#include <linux/clk.h>
 104 +#include <linux/errno.h>
 105 +#include <linux/sched.h>
 106 +#include <linux/err.h>
 107 +#include <linux/interrupt.h>
 108 +#include <linux/platform_device.h>
 109 +#include <linux/io.h>
 110 +#include <linux/gpio.h>
 111 +
 112 +#include <falcon/lantiq_soc.h>
 113 +
 114 +/* CURRENT ISSUES:
 115 + * - no high speed support
 116 + * - supports only master mode
 117 + * - ten bit mode is not tested (no slave devices)
 118 + */
 119 +
 120 +/* mapping for access macros */
 121 +#define reg_r32(reg)           __raw_readl(reg)
 122 +#define reg_w32(val, reg)      __raw_writel(val, reg)
 123 +#define reg_w32_mask(clear, set, reg)  \
 124 +                               reg_w32((reg_r32(reg) & ~(clear)) | (set), reg)
 125 +#define reg_r32_table(reg, idx) reg_r32(&((uint32_t *)&reg)[idx])
 126 +#define reg_w32_table(val, reg, idx) reg_w32(val, &((uint32_t *)&reg)[idx])
 127 +#define i2c    (priv->membase)
 128 +#include <falcon/i2c_reg.h>
 129 +
 130 +#define DRV_NAME "i2c-falcon"
 131 +#define DRV_VERSION "1.01"
 132 +
 133 +#define FALCON_I2C_BUSY_TIMEOUT                20 /* ms */
 134 +
 135 +#ifdef DEBUG
 136 +#define FALCON_I2C_XFER_TIMEOUT                25*HZ
 137 +#else
 138 +#define FALCON_I2C_XFER_TIMEOUT                HZ
 139 +#endif
 140 +#if defined(DEBUG) && 0
 141 +#define PRINTK(arg...) printk(arg)
 142 +#else
 143 +#define PRINTK(arg...) do {} while (0)
 144 +#endif
 145 +
 146 +#define FALCON_I2C_IMSC_DEFAULT_MASK   (I2C_IMSC_I2C_P_INT_EN | \
 147 +                                        I2C_IMSC_I2C_ERR_INT_EN)
 148 +
 149 +#define FALCON_I2C_ARB_LOST    (1 << 0)
 150 +#define FALCON_I2C_NACK                (1 << 1)
 151 +#define FALCON_I2C_RX_UFL      (1 << 2)
 152 +#define FALCON_I2C_RX_OFL      (1 << 3)
 153 +#define FALCON_I2C_TX_UFL      (1 << 4)
 154 +#define FALCON_I2C_TX_OFL      (1 << 5)
 155 +
 156 +struct falcon_i2c {
 157 +       struct mutex mutex;
 158 +
 159 +       enum {
 160 +               FALCON_I2C_MODE_100     = 1,
 161 +               FALCON_I2C_MODE_400     = 2,
 162 +               FALCON_I2C_MODE_3400    = 3
 163 +       } mode;                         /* current speed mode */
 164 +
 165 +       struct clk *clk;                /* clock input for i2c hardware block */
 166 +       struct gpon_reg_i2c __iomem *membase;   /* base of mapped registers */
 167 +       int irq_lb, irq_b, irq_err, irq_p;      /* last burst, burst, error,
 168 +                                                  protocol IRQs */
 169 +
 170 +       struct i2c_adapter adap;
 171 +       struct device *dev;
 172 +
 173 +       struct completion       cmd_complete;
 174 +
 175 +       /* message transfer data */
 176 +       /* current message */
 177 +       struct i2c_msg          *current_msg;
 178 +       /* number of messages to handle */
 179 +       int                     msgs_num;
 180 +       /* current buffer */
 181 +       u8                      *msg_buf;
 182 +       /* remaining length of current buffer */
 183 +       u32                     msg_buf_len;
 184 +       /* error status of the current transfer */
 185 +       int                     msg_err;
 186 +
 187 +       /* master status codes */
 188 +       enum {
 189 +               STATUS_IDLE,
 190 +               STATUS_ADDR,    /* address phase */
 191 +               STATUS_WRITE,
 192 +               STATUS_READ,
 193 +               STATUS_READ_END,
 194 +               STATUS_STOP
 195 +       } status;
 196 +};
 197 +
 198 +static irqreturn_t falcon_i2c_isr(int irq, void *dev_id);
 199 +
 200 +static inline void enable_burst_irq(struct falcon_i2c *priv)
 201 +{
 202 +       i2c_w32_mask(0, I2C_IMSC_LBREQ_INT_EN | I2C_IMSC_BREQ_INT_EN, imsc);
 203 +}
 204 +static inline void disable_burst_irq(struct falcon_i2c *priv)
 205 +{
 206 +       i2c_w32_mask(I2C_IMSC_LBREQ_INT_EN | I2C_IMSC_BREQ_INT_EN, 0, imsc);
 207 +}
 208 +
 209 +static void prepare_msg_send_addr(struct falcon_i2c *priv)
 210 +{
 211 +       struct i2c_msg *msg = priv->current_msg;
 212 +       int rd = !!(msg->flags & I2C_M_RD);     /* extends to 0 or 1 */
 213 +       u16 addr = msg->addr;
 214 +
 215 +       /* new i2c_msg */
 216 +       priv->msg_buf = msg->buf;
 217 +       priv->msg_buf_len = msg->len;
 218 +       if (rd)
 219 +               priv->status = STATUS_READ;
 220 +       else
 221 +               priv->status = STATUS_WRITE;
 222 +
 223 +       /* send slave address */
 224 +       if (msg->flags & I2C_M_TEN) {
 225 +               i2c_w32(0xf0 | ((addr & 0x300) >> 7) | rd, txd);
 226 +               i2c_w32(addr & 0xff, txd);
 227 +       } else
 228 +               i2c_w32((addr & 0x7f) << 1 | rd, txd);
 229 +}
 230 +
 231 +static void set_tx_len(struct falcon_i2c *priv)
 232 +{
 233 +       struct i2c_msg *msg = priv->current_msg;
 234 +       int len = (msg->flags & I2C_M_TEN) ? 2 : 1;
 235 +
 236 +       PRINTK("set_tx_len %cX\n", (msg->flags & I2C_M_RD)?'R':'T');
 237 +
 238 +       priv->status = STATUS_ADDR;
 239 +
 240 +       if (!(msg->flags & I2C_M_RD)) {
 241 +               len += msg->len;
 242 +       } else {
 243 +               /* set maximum received packet size (before rx int!) */
 244 +               i2c_w32(msg->len, mrps_ctrl);
 245 +       }
 246 +       i2c_w32(len, tps_ctrl);
 247 +       enable_burst_irq(priv);
 248 +}
 249 +
 250 +static int falcon_i2c_hw_init(struct i2c_adapter *adap)
 251 +{
 252 +       struct falcon_i2c *priv = i2c_get_adapdata(adap);
 253 +
 254 +       /* disable bus */
 255 +       i2c_w32_mask(I2C_RUN_CTRL_RUN_EN, 0, run_ctrl);
 256 +
 257 +#ifndef DEBUG
 258 +       /* set normal operation clock divider */
 259 +       i2c_w32(1 << I2C_CLC_RMC_OFFSET, clc);
 260 +#else
 261 +       /* for debugging a higher divider value! */
 262 +       i2c_w32(0xF0 << I2C_CLC_RMC_OFFSET, clc);
 263 +#endif
 264 +
 265 +       /* set frequency */
 266 +       if (priv->mode == FALCON_I2C_MODE_100) {
 267 +               dev_dbg(priv->dev, "set standard mode (100 kHz)\n");
 268 +               i2c_w32(0, fdiv_high_cfg);
 269 +               i2c_w32((1 << I2C_FDIV_CFG_INC_OFFSET) |
 270 +                       (499 << I2C_FDIV_CFG_DEC_OFFSET),
 271 +                       fdiv_cfg);
 272 +       } else if (priv->mode == FALCON_I2C_MODE_400) {
 273 +               dev_dbg(priv->dev, "set fast mode (400 kHz)\n");
 274 +               i2c_w32(0, fdiv_high_cfg);
 275 +               i2c_w32((1 << I2C_FDIV_CFG_INC_OFFSET) |
 276 +                       (124 << I2C_FDIV_CFG_DEC_OFFSET),
 277 +                       fdiv_cfg);
 278 +       } else if (priv->mode == FALCON_I2C_MODE_3400) {
 279 +               dev_dbg(priv->dev, "set high mode (3.4 MHz)\n");
 280 +               i2c_w32(0, fdiv_cfg);
 281 +               /* TODO recalculate value for 100MHz input */
 282 +               i2c_w32((41 << I2C_FDIV_HIGH_CFG_INC_OFFSET) |
 283 +                       (152 << I2C_FDIV_HIGH_CFG_DEC_OFFSET),
 284 +                       fdiv_high_cfg);
 285 +       } else {
 286 +               dev_warn(priv->dev, "unknown mode\n");
 287 +               return -ENODEV;
 288 +       }
 289 +
 290 +       /* configure fifo */
 291 +       i2c_w32(I2C_FIFO_CFG_TXFC | /* tx fifo as flow controller */
 292 +               I2C_FIFO_CFG_RXFC | /* rx fifo as flow controller */
 293 +               I2C_FIFO_CFG_TXFA_TXFA2 | /* tx fifo 4-byte aligned */
 294 +               I2C_FIFO_CFG_RXFA_RXFA2 | /* rx fifo 4-byte aligned */
 295 +               I2C_FIFO_CFG_TXBS_TXBS0 | /* tx fifo burst size is 1 word */
 296 +               I2C_FIFO_CFG_RXBS_RXBS0,  /* rx fifo burst size is 1 word */
 297 +               fifo_cfg);
 298 +
 299 +       /* configure address */
 300 +       i2c_w32(I2C_ADDR_CFG_SOPE_EN |  /* generate stop when no more data in the
 301 +                                          fifo */
 302 +               I2C_ADDR_CFG_SONA_EN |  /* generate stop when NA received */
 303 +               I2C_ADDR_CFG_MnS_EN |   /* we are master device */
 304 +               0,                      /* our slave address (not used!) */
 305 +               addr_cfg);
 306 +
 307 +       /* enable bus */
 308 +       i2c_w32_mask(0, I2C_RUN_CTRL_RUN_EN, run_ctrl);
 309 +
 310 +       return 0;
 311 +}
 312 +
 313 +static int falcon_i2c_wait_bus_not_busy(struct falcon_i2c *priv)
 314 +{
 315 +       int timeout = FALCON_I2C_BUSY_TIMEOUT;
 316 +
 317 +       while ((i2c_r32(bus_stat) & I2C_BUS_STAT_BS_MASK)
 318 +                                != I2C_BUS_STAT_BS_FREE) {
 319 +               if (timeout <= 0) {
 320 +                       dev_warn(priv->dev, "timeout waiting for bus ready\n");
 321 +                       return -ETIMEDOUT;
 322 +               }
 323 +               timeout--;
 324 +               mdelay(1);
 325 +       }
 326 +
 327 +       return 0;
 328 +}
 329 +
 330 +static void falcon_i2c_tx(struct falcon_i2c *priv, int last)
 331 +{
 332 +       if (priv->msg_buf_len && priv->msg_buf) {
 333 +               i2c_w32(*priv->msg_buf, txd);
 334 +
 335 +               if (--priv->msg_buf_len)
 336 +                       priv->msg_buf++;
 337 +               else
 338 +                       priv->msg_buf = NULL;
 339 +       } else
 340 +               last = 1;
 341 +
 342 +       if (last) {
 343 +               disable_burst_irq(priv);
 344 +       }
 345 +}
 346 +
 347 +static void falcon_i2c_rx(struct falcon_i2c *priv, int last)
 348 +{
 349 +       u32 fifo_stat,timeout;
 350 +       if (priv->msg_buf_len && priv->msg_buf) {
 351 +               timeout = 5000000;
 352 +               do {
 353 +                       fifo_stat = i2c_r32(ffs_stat);
 354 +               } while (!fifo_stat && --timeout);
 355 +               if (!timeout) {
 356 +                       last = 1;
 357 +                       PRINTK("\nrx timeout\n");
 358 +                       goto err;
 359 +               }
 360 +               while (fifo_stat) {
 361 +                       *priv->msg_buf = i2c_r32(rxd);
 362 +                       if (--priv->msg_buf_len)
 363 +                               priv->msg_buf++;
 364 +                       else {
 365 +                               priv->msg_buf = NULL;
 366 +                               last = 1;
 367 +                               break;
 368 +                       }
 369 +                       #if 0
 370 +                       fifo_stat = i2c_r32(ffs_stat);
 371 +                       #else
 372 +                       /* do not read more than burst size, otherwise no "last
 373 +                       burst" is generated and the transaction is blocked! */
 374 +                       fifo_stat = 0;
 375 +                       #endif
 376 +               }
 377 +       } else {
 378 +               last = 1;
 379 +       }
 380 +err:
 381 +       if (last) {
 382 +               disable_burst_irq(priv);
 383 +
 384 +               if (priv->status == STATUS_READ_END) {
 385 +                       /* do the STATUS_STOP and complete() here, as sometimes
 386 +                          the tx_end is already seen before this is finished */
 387 +                       priv->status = STATUS_STOP;
 388 +                       complete(&priv->cmd_complete);
 389 +               } else {
 390 +                       i2c_w32(I2C_ENDD_CTRL_SETEND, endd_ctrl);
 391 +                       priv->status = STATUS_READ_END;
 392 +               }
 393 +       }
 394 +}
 395 +
 396 +static void falcon_i2c_xfer_init(struct falcon_i2c *priv)
 397 +{
 398 +       /* enable interrupts */
 399 +       i2c_w32(FALCON_I2C_IMSC_DEFAULT_MASK, imsc);
 400 +
 401 +       /* trigger transfer of first msg */
 402 +       set_tx_len(priv);
 403 +}
 404 +
 405 +static void dump_msgs(struct i2c_msg msgs[], int num, int rx)
 406 +{
 407 +#if defined(DEBUG)
 408 +       int i, j;
 409 +       printk("Messages %d %s\n", num, rx ? "out" : "in");
 410 +       for (i = 0; i < num; i++) {
 411 +               printk("%2d %cX Msg(%d) addr=0x%X: ", i,
 412 +                       (msgs[i].flags & I2C_M_RD)?'R':'T',
 413 +                       msgs[i].len, msgs[i].addr);
 414 +               if (!(msgs[i].flags & I2C_M_RD) || rx) {
 415 +                       for (j = 0; j < msgs[i].len; j++)
 416 +                               printk("%02X ", msgs[i].buf[j]);
 417 +               }
 418 +               printk("\n");
 419 +       }
 420 +#endif
 421 +}
 422 +
 423 +static void falcon_i2c_release_bus(struct falcon_i2c *priv)
 424 +{
 425 +       if ((i2c_r32(bus_stat) & I2C_BUS_STAT_BS_MASK) == I2C_BUS_STAT_BS_BM)
 426 +               i2c_w32(I2C_ENDD_CTRL_SETEND, endd_ctrl);
 427 +}
 428 +
 429 +static int falcon_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
 430 +                          int num)
 431 +{
 432 +       struct falcon_i2c *priv = i2c_get_adapdata(adap);
 433 +       int ret;
 434 +
 435 +       dev_dbg(priv->dev, "xfer %u messages\n", num);
 436 +       dump_msgs(msgs, num, 0);
 437 +
 438 +       mutex_lock(&priv->mutex);
 439 +
 440 +       INIT_COMPLETION(priv->cmd_complete);
 441 +       priv->current_msg = msgs;
 442 +       priv->msgs_num = num;
 443 +       priv->msg_err = 0;
 444 +       priv->status = STATUS_IDLE;
 445 +
 446 +       /* wait for the bus to become ready */
 447 +       ret = falcon_i2c_wait_bus_not_busy(priv);
 448 +       if (ret)
 449 +               goto done;
 450 +
 451 +       while (priv->msgs_num) {
 452 +               /* start the transfers */
 453 +               falcon_i2c_xfer_init(priv);
 454 +
 455 +               /* wait for transfers to complete */
 456 +               ret = wait_for_completion_interruptible_timeout(
 457 +                       &priv->cmd_complete, FALCON_I2C_XFER_TIMEOUT);
 458 +               if (ret == 0) {
 459 +                       dev_err(priv->dev, "controller timed out\n");
 460 +                       falcon_i2c_hw_init(adap);
 461 +                       ret = -ETIMEDOUT;
 462 +                       goto done;
 463 +               } else if (ret < 0)
 464 +                       goto done;
 465 +
 466 +               if (priv->msg_err) {
 467 +                       if (priv->msg_err & FALCON_I2C_NACK)
 468 +                               ret = -ENXIO;
 469 +                       else
 470 +                               ret = -EREMOTEIO;
 471 +                       goto done;
 472 +               }
 473 +               if (--priv->msgs_num) {
 474 +                       priv->current_msg++;
 475 +               }
 476 +       }
 477 +       /* no error? */
 478 +       ret = num;
 479 +
 480 +done:
 481 +       falcon_i2c_release_bus(priv);
 482 +
 483 +       mutex_unlock(&priv->mutex);
 484 +
 485 +       if (ret>=0)
 486 +               dump_msgs(msgs, num, 1);
 487 +
 488 +       PRINTK("XFER ret %d\n", ret);
 489 +       return ret;
 490 +}
 491 +
 492 +static irqreturn_t falcon_i2c_isr_burst(int irq, void *dev_id)
 493 +{
 494 +       struct falcon_i2c *priv = dev_id;
 495 +       struct i2c_msg *msg = priv->current_msg;
 496 +       int last = (irq == priv->irq_lb);
 497 +
 498 +       if (last)
 499 +               PRINTK("LB ");
 500 +       else
 501 +               PRINTK("B ");
 502 +
 503 +       if (msg->flags & I2C_M_RD) {
 504 +               switch (priv->status) {
 505 +               case STATUS_ADDR:
 506 +                       PRINTK("X");
 507 +                       prepare_msg_send_addr(priv);
 508 +                       disable_burst_irq(priv);
 509 +                       break;
 510 +               case STATUS_READ:
 511 +               case STATUS_READ_END:
 512 +                       PRINTK("R");
 513 +                       falcon_i2c_rx(priv, last);
 514 +                       break;
 515 +               default:
 516 +                       disable_burst_irq(priv);
 517 +                       printk("Status R %d\n", priv->status);
 518 +                       break;
 519 +               }
 520 +       } else {
 521 +               switch (priv->status) {
 522 +               case STATUS_ADDR:
 523 +                       PRINTK("x");
 524 +                       prepare_msg_send_addr(priv);
 525 +                       break;
 526 +               case STATUS_WRITE:
 527 +                       PRINTK("w");
 528 +                       falcon_i2c_tx(priv, last);
 529 +                       break;
 530 +               default:
 531 +                       disable_burst_irq(priv);
 532 +                       printk("Status W %d\n", priv->status);
 533 +                       break;
 534 +               }
 535 +       }
 536 +
 537 +       i2c_w32(I2C_ICR_BREQ_INT_CLR | I2C_ICR_LBREQ_INT_CLR, icr);
 538 +       return IRQ_HANDLED;
 539 +}
 540 +
 541 +static void falcon_i2c_isr_prot(struct falcon_i2c *priv)
 542 +{
 543 +       u32 i_pro = i2c_r32(p_irqss);
 544 +
 545 +       PRINTK("i2c-p");
 546 +
 547 +       /* not acknowledge */
 548 +       if (i_pro & I2C_P_IRQSS_NACK) {
 549 +               priv->msg_err |= FALCON_I2C_NACK;
 550 +               PRINTK(" nack");
 551 +       }
 552 +
 553 +       /* arbitration lost */
 554 +       if (i_pro & I2C_P_IRQSS_AL) {
 555 +               priv->msg_err |= FALCON_I2C_ARB_LOST;
 556 +               PRINTK(" arb-lost");
 557 +       }
 558 +       /* tx -> rx switch */
 559 +       if (i_pro & I2C_P_IRQSS_RX)
 560 +               PRINTK(" rx");
 561 +
 562 +       /* tx end */
 563 +       if (i_pro & I2C_P_IRQSS_TX_END)
 564 +               PRINTK(" txend");
 565 +       PRINTK("\n");
 566 +
 567 +       if (!priv->msg_err) {
 568 +               /* tx -> rx switch */
 569 +               if (i_pro & I2C_P_IRQSS_RX) {
 570 +                       priv->status = STATUS_READ;
 571 +                       enable_burst_irq(priv);
 572 +               }
 573 +               if (i_pro & I2C_P_IRQSS_TX_END) {
 574 +                       if (priv->status == STATUS_READ)
 575 +                               priv->status = STATUS_READ_END;
 576 +                       else {
 577 +                               disable_burst_irq(priv);
 578 +                               priv->status = STATUS_STOP;
 579 +                       }
 580 +               }
 581 +       }
 582 +
 583 +       i2c_w32(i_pro, p_irqsc);
 584 +}
 585 +
 586 +static irqreturn_t falcon_i2c_isr(int irq, void *dev_id)
 587 +{
 588 +       u32 i_raw, i_err=0;
 589 +       struct falcon_i2c *priv = dev_id;
 590 +
 591 +       i_raw = i2c_r32(mis);
 592 +       PRINTK("i_raw 0x%08X\n", i_raw);
 593 +
 594 +       /* error interrupt */
 595 +       if (i_raw & I2C_RIS_I2C_ERR_INT_INTOCC) {
 596 +               i_err = i2c_r32(err_irqss);
 597 +               PRINTK("i_err 0x%08X bus_stat 0x%04X\n",
 598 +                       i_err, i2c_r32(bus_stat));
 599 +
 600 +               /* tx fifo overflow (8) */
 601 +               if (i_err & I2C_ERR_IRQSS_TXF_OFL)
 602 +                       priv->msg_err |= FALCON_I2C_TX_OFL;
 603 +
 604 +               /* tx fifo underflow (4) */
 605 +               if (i_err & I2C_ERR_IRQSS_TXF_UFL)
 606 +                       priv->msg_err |= FALCON_I2C_TX_UFL;
 607 +
 608 +               /* rx fifo overflow (2) */
 609 +               if (i_err & I2C_ERR_IRQSS_RXF_OFL)
 610 +                       priv->msg_err |= FALCON_I2C_RX_OFL;
 611 +
 612 +               /* rx fifo underflow (1) */
 613 +               if (i_err & I2C_ERR_IRQSS_RXF_UFL)
 614 +                       priv->msg_err |= FALCON_I2C_RX_UFL;
 615 +
 616 +               i2c_w32(i_err, err_irqsc);
 617 +       }
 618 +
 619 +       /* protocol interrupt */
 620 +       if (i_raw & I2C_RIS_I2C_P_INT_INTOCC)
 621 +               falcon_i2c_isr_prot(priv);
 622 +
 623 +       if ((priv->msg_err) || (priv->status == STATUS_STOP))
 624 +               complete(&priv->cmd_complete);
 625 +
 626 +       return IRQ_HANDLED;
 627 +}
 628 +
 629 +static u32 falcon_i2c_functionality(struct i2c_adapter *adap)
 630 +{
 631 +       return  I2C_FUNC_I2C |
 632 +               I2C_FUNC_10BIT_ADDR |
 633 +               I2C_FUNC_SMBUS_EMUL;
 634 +}
 635 +
 636 +static struct i2c_algorithm falcon_i2c_algorithm = {
 637 +       .master_xfer    = falcon_i2c_xfer,
 638 +       .functionality  = falcon_i2c_functionality,
 639 +};
 640 +
 641 +static int __devinit falcon_i2c_probe(struct platform_device *pdev)
 642 +{
 643 +       int ret = 0;
 644 +       struct falcon_i2c *priv;
 645 +       struct i2c_adapter *adap;
 646 +       struct resource *mmres, *ioarea,
 647 +                       *irqres_lb, *irqres_b, *irqres_err, *irqres_p;
 648 +       struct clk *clk;
 649 +
 650 +       dev_dbg(&pdev->dev, "probing\n");
 651 +
 652 +       mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 653 +       irqres_lb = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
 654 +                                                "i2c_lb");
 655 +       irqres_b = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "i2c_b");
 656 +       irqres_err = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
 657 +                                                 "i2c_err");
 658 +       irqres_p = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "i2c_p");
 659 +
 660 +       if (!mmres || !irqres_lb || !irqres_b || !irqres_err || !irqres_p) {
 661 +               dev_err(&pdev->dev, "no resources\n");
 662 +               return -ENODEV;
 663 +       }
 664 +
 665 +       clk = clk_get(&pdev->dev, "fpi");
 666 +       if (IS_ERR(clk)) {
 667 +               dev_err(&pdev->dev, "failed to get fpi clk\n");
 668 +               return -ENOENT;
 669 +       }
 670 +
 671 +       if (clk_get_rate(clk) != 100000000) {
 672 +               dev_err(&pdev->dev, "input clock is not 100MHz\n");
 673 +               return -ENOENT;
 674 +       }
 675 +
 676 +       /* allocate private data */
 677 +       priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 678 +       if (!priv) {
 679 +               dev_err(&pdev->dev, "can't allocate private data\n");
 680 +               return -ENOMEM;
 681 +       }
 682 +
 683 +       adap = &priv->adap;
 684 +       i2c_set_adapdata(adap, priv);
 685 +       adap->owner = THIS_MODULE;
 686 +       adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 687 +       strlcpy(adap->name, DRV_NAME "-adapter", sizeof(adap->name));
 688 +       adap->algo = &falcon_i2c_algorithm;
 689 +
 690 +       priv->mode = FALCON_I2C_MODE_100;
 691 +       priv->clk = clk;
 692 +       priv->dev = &pdev->dev;
 693 +
 694 +       init_completion(&priv->cmd_complete);
 695 +       mutex_init(&priv->mutex);
 696 +
 697 +       ret = ltq_gpio_request(107, 0, 0, 0, DRV_NAME":sda");
 698 +       if (ret) {
 699 +               dev_err(&pdev->dev, "I2C gpio 107 (sda) not available\n");
 700 +               ret = -ENXIO;
 701 +               goto err_free_priv;
 702 +       }
 703 +       ret = ltq_gpio_request(108, 0, 0, 0, DRV_NAME":scl");
 704 +       if (ret) {
 705 +               gpio_free(107);
 706 +               dev_err(&pdev->dev, "I2C gpio 108 (scl) not available\n");
 707 +               ret = -ENXIO;
 708 +               goto err_free_priv;
 709 +       }
 710 +
 711 +       ioarea = request_mem_region(mmres->start, resource_size(mmres),
 712 +                                        pdev->name);
 713 +
 714 +       if (ioarea == NULL) {
 715 +               dev_err(&pdev->dev, "I2C region already claimed\n");
 716 +               ret = -ENXIO;
 717 +               goto err_free_gpio;
 718 +       }
 719 +
 720 +       /* map memory */
 721 +       priv->membase = ioremap_nocache(mmres->start & ~KSEG1,
 722 +               resource_size(mmres));
 723 +       if (priv->membase == NULL) {
 724 +               ret = -ENOMEM;
 725 +               goto err_release_region;
 726 +       }
 727 +
 728 +       priv->irq_lb = irqres_lb->start;
 729 +       ret = request_irq(priv->irq_lb, falcon_i2c_isr_burst, IRQF_DISABLED,
 730 +                         irqres_lb->name, priv);
 731 +       if (ret) {
 732 +               dev_err(&pdev->dev, "can't get last burst IRQ %d\n", irqres_lb->start);
 733 +               ret = -ENODEV;
 734 +               goto err_unmap_mem;
 735 +       }
 736 +
 737 +       priv->irq_b = irqres_b->start;
 738 +       ret = request_irq(priv->irq_b, falcon_i2c_isr_burst, IRQF_DISABLED,
 739 +                         irqres_b->name, priv);
 740 +       if (ret) {
 741 +               dev_err(&pdev->dev, "can't get burst IRQ %d\n", irqres_b->start);
 742 +               ret = -ENODEV;
 743 +               goto err_free_lb_irq;
 744 +       }
 745 +
 746 +       priv->irq_err = irqres_err->start;
 747 +       ret = request_irq(priv->irq_err, falcon_i2c_isr, IRQF_DISABLED,
 748 +                         irqres_err->name, priv);
 749 +       if (ret) {
 750 +               dev_err(&pdev->dev, "can't get error IRQ %d\n", irqres_err->start);
 751 +               ret = -ENODEV;
 752 +               goto err_free_b_irq;
 753 +       }
 754 +
 755 +       priv->irq_p = irqres_p->start;
 756 +       ret = request_irq(priv->irq_p, falcon_i2c_isr, IRQF_DISABLED,
 757 +                         irqres_p->name, priv);
 758 +       if (ret) {
 759 +               dev_err(&pdev->dev, "can't get protocol IRQ %d\n", irqres_p->start);
 760 +               ret = -ENODEV;
 761 +               goto err_free_err_irq;
 762 +       }
 763 +
 764 +       dev_dbg(&pdev->dev, "mapped io-space to %p\n", priv->membase);
 765 +       dev_dbg(&pdev->dev, "use IRQs %d, %d, %d, %d\n", irqres_lb->start,
 766 +           irqres_b->start, irqres_err->start, irqres_p->start);
 767 +
 768 +       /* add our adapter to the i2c stack */
 769 +       ret = i2c_add_numbered_adapter(adap);
 770 +       if (ret) {
 771 +               dev_err(&pdev->dev, "can't register I2C adapter\n");
 772 +               goto err_free_p_irq;
 773 +       }
 774 +
 775 +       platform_set_drvdata(pdev, priv);
 776 +       i2c_set_adapdata(adap, priv);
 777 +
 778 +       /* print module version information */
 779 +       dev_dbg(&pdev->dev, "module id=%u revision=%u\n",
 780 +               (i2c_r32(id) & I2C_ID_ID_MASK) >> I2C_ID_ID_OFFSET,
 781 +               (i2c_r32(id) & I2C_ID_REV_MASK) >> I2C_ID_REV_OFFSET);
 782 +
 783 +       /* initialize HW */
 784 +       ret = falcon_i2c_hw_init(adap);
 785 +       if (ret) {
 786 +               dev_err(&pdev->dev, "can't configure adapter\n");
 787 +               goto err_remove_adapter;
 788 +       }
 789 +
 790 +       dev_info(&pdev->dev, "version %s\n", DRV_VERSION);
 791 +
 792 +       return 0;
 793 +
 794 +err_remove_adapter:
 795 +       i2c_del_adapter(adap);
 796 +       platform_set_drvdata(pdev, NULL);
 797 +
 798 +err_free_p_irq:
 799 +       free_irq(priv->irq_p, priv);
 800 +
 801 +err_free_err_irq:
 802 +       free_irq(priv->irq_err, priv);
 803 +
 804 +err_free_b_irq:
 805 +       free_irq(priv->irq_b, priv);
 806 +
 807 +err_free_lb_irq:
 808 +       free_irq(priv->irq_lb, priv);
 809 +
 810 +err_unmap_mem:
 811 +       iounmap(priv->membase);
 812 +
 813 +err_release_region:
 814 +       release_mem_region(mmres->start, resource_size(mmres));
 815 +
 816 +err_free_gpio:
 817 +       gpio_free(108);
 818 +       gpio_free(107);
 819 +
 820 +err_free_priv:
 821 +       kfree(priv);
 822 +
 823 +       return ret;
 824 +}
 825 +
 826 +static int __devexit falcon_i2c_remove(struct platform_device *pdev)
 827 +{
 828 +       struct falcon_i2c *priv = platform_get_drvdata(pdev);
 829 +       struct resource *mmres;
 830 +
 831 +       /* disable bus */
 832 +       i2c_w32_mask(I2C_RUN_CTRL_RUN_EN, 0, run_ctrl);
 833 +
 834 +       /* remove driver */
 835 +       platform_set_drvdata(pdev, NULL);
 836 +       i2c_del_adapter(&priv->adap);
 837 +
 838 +       free_irq(priv->irq_lb, priv);
 839 +       free_irq(priv->irq_b, priv);
 840 +       free_irq(priv->irq_err, priv);
 841 +       free_irq(priv->irq_p, priv);
 842 +
 843 +       iounmap(priv->membase);
 844 +
 845 +       gpio_free(108);
 846 +       gpio_free(107);
 847 +
 848 +       kfree(priv);
 849 +
 850 +       mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 851 +       release_mem_region(mmres->start, resource_size(mmres));
 852 +
 853 +       dev_dbg(&pdev->dev, "removed\n");
 854 +
 855 +       return 0;
 856 +}
 857 +
 858 +static struct platform_driver falcon_i2c_driver = {
 859 +       .probe  = falcon_i2c_probe,
 860 +       .remove = __devexit_p(falcon_i2c_remove),
 861 +       .driver = {
 862 +               .name   = DRV_NAME,
 863 +               .owner  = THIS_MODULE,
 864 +       },
 865 +};
 866 +
 867 +static int __init falcon_i2c_init(void)
 868 +{
 869 +       int ret;
 870 +
 871 +       ret = platform_driver_register(&falcon_i2c_driver);
 872 +
 873 +       if (ret)
 874 +               pr_debug(DRV_NAME ": can't register platform driver\n");
 875 +
 876 +       return ret;
 877 +}
 878 +
 879 +static void __exit falcon_i2c_exit(void)
 880 +{
 881 +       platform_driver_unregister(&falcon_i2c_driver);
 882 +}
 883 +
 884 +module_init(falcon_i2c_init);
 885 +module_exit(falcon_i2c_exit);
 886 +
 887 +MODULE_DESCRIPTION("Lantiq FALC(tm) ON - I2C bus adapter");
 888 +MODULE_ALIAS("platform:" DRV_NAME);
 889 +MODULE_LICENSE("GPL");
 890 +MODULE_VERSION(DRV_VERSION);