target/linux/lantiq/patches-3.2/0063-MIPS-lantiq-fixes-ar9-vr9-clock.patch

   1 From 449adc45e29be18da14b23e9ccd97ba5251ffcc9 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sat, 17 Mar 2012 09:58:07 +0100
   4 Subject: [PATCH 63/70] MIPS: lantiq: fixes ar9/vr9 clock
   5
   6 ---
   7  arch/mips/lantiq/clk.h          |    4 +++-
   8  arch/mips/lantiq/xway/clk.c     |   29 ++++++++++++++++++++++++-----
   9  arch/mips/lantiq/xway/sysctrl.c |   13 ++++++++-----
  10  3 files changed, 35 insertions(+), 11 deletions(-)
  11
  12 --- a/arch/mips/lantiq/clk.h
  13 +++ b/arch/mips/lantiq/clk.h
  14 @@ -56,8 +56,10 @@ extern unsigned long ltq_danube_cpu_hz(v
  15  extern unsigned long ltq_danube_fpi_hz(void);
  16  extern unsigned long ltq_danube_io_region_clock(void);
  17
  18 +extern unsigned long ltq_ar9_cpu_hz(void);
  19 +extern unsigned long ltq_ar9_fpi_hz(void);
  20 +
  21  extern unsigned long ltq_vr9_cpu_hz(void);
  22  extern unsigned long ltq_vr9_fpi_hz(void);
  23 -extern unsigned long ltq_vr9_io_region_clock(void);
  24
  25  #endif
  26 --- a/arch/mips/lantiq/xway/clk.c
  27 +++ b/arch/mips/lantiq/xway/clk.c
  28 @@ -217,6 +217,30 @@ unsigned long ltq_danube_cpu_hz(void)
  29         }
  30  }
  31
  32 +unsigned long ltq_ar9_sys_hz(void)
  33 +{
  34 +       if (((ltq_cgu_r32(LTQ_CGU_SYS) >> 3) & 0x3) == 0x2)
  35 +               return CLOCK_393M;
  36 +       return CLOCK_333M;
  37 +}
  38 +
  39 +unsigned long ltq_ar9_fpi_hz(void)
  40 +{
  41 +       unsigned long sys = ltq_ar9_sys_hz();
  42 +
  43 +       if (ltq_cgu_r32(LTQ_CGU_SYS) & BIT(0))
  44 +               return sys;
  45 +       return sys >> 1;
  46 +}
  47 +
  48 +unsigned long ltq_ar9_cpu_hz(void)
  49 +{
  50 +       if (ltq_cgu_r32(LTQ_CGU_SYS) & BIT(2))
  51 +               return ltq_ar9_fpi_hz();
  52 +       else
  53 +               return ltq_ar9_sys_hz();
  54 +}
  55 +
  56  unsigned long ltq_danube_fpi_hz(void)
  57  {
  58         unsigned long ddr_clock = DDR_HZ;
  59 @@ -299,11 +323,6 @@ unsigned long ltq_vr9_fpi_hz(void)
  60         return clk;
  61  }
  62
  63 -unsigned long ltq_vr9_io_region_clock(void)
  64 -{
  65 -       return ltq_vr9_fpi_hz();
  66 -}
  67 -
  68  unsigned long ltq_vr9_fpi_bus_clock(int fpi)
  69  {
  70         return ltq_vr9_fpi_hz();
  71 --- a/arch/mips/lantiq/xway/sysctrl.c
  72 +++ b/arch/mips/lantiq/xway/sysctrl.c
  73 @@ -237,6 +237,8 @@ void __init ltq_soc_init(void)
  74          clkdev_add_pmu("ltq_ebu", NULL, 0, PMU_EBU);
  75         if (!ltq_is_vr9())
  76                 clkdev_add_pmu("ltq_etop", NULL, 0, PMU_PPE);
  77 +       if (!ltq_is_ase())
  78 +               clkdev_add_pci();
  79         if (ltq_is_ase()) {
  80                 if (ltq_cgu_r32(CGU_SYS) & (1 << 5))
  81                         clkdev_add_static(CLOCK_266M, CLOCK_133M, CLOCK_133M);
  82 @@ -246,7 +248,7 @@ void __init ltq_soc_init(void)
  83                 clkdev_add_pmu("ltq_etop", "ephy", 0, PMU_EPHY);
  84         } else if (ltq_is_vr9()) {
  85                 clkdev_add_static(ltq_vr9_cpu_hz(), ltq_vr9_fpi_hz(),
  86 -                                       ltq_vr9_io_region_clock());
  87 +                       ltq_vr9_fpi_hz());
  88                 clkdev_add_pmu("ltq_pcie", "phy", 1, PMU1_PCIE_PHY);
  89                 clkdev_add_pmu("ltq_pcie", "bus", 0, PMU_PCIE_CLK);
  90                 clkdev_add_pmu("ltq_pcie", "msi", 1, PMU1_PCIE_MSI);
  91 @@ -259,11 +261,12 @@ void __init ltq_soc_init(void)
  92                         PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
  93                         PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
  94                         PMU_PPE_QSB);
  95 +       } else if (ltq_is_ar9()) {
  96 +               clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(),
  97 +                       ltq_ar9_fpi_hz());
  98 +               clkdev_add_pmu("ltq_etop", "switch", 0, PMU_SWITCH);
  99         } else {
 100                 clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(),
 101 -                                       ltq_danube_io_region_clock());
 102 -               clkdev_add_pci();
 103 -               if (ltq_is_ar9())
 104 -                       clkdev_add_pmu("ltq_etop", "switch", 0, PMU_SWITCH);
 105 +                       ltq_danube_io_region_clock());
 106         }
 107  }