package/mac80211/patches/445-ath5k_fix_mac_clock_restore.patch

   1 --- a/drivers/net/wireless/ath/ath5k/reset.c
   2 +++ b/drivers/net/wireless/ath/ath5k/reset.c
   3 @@ -233,7 +233,7 @@ static void ath5k_hw_init_core_clock(str
   4  static void ath5k_hw_set_sleep_clock(struct ath5k_hw *ah, bool enable)
   5  {
   6         struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
   7 -       u32 scal, spending;
   8 +       u32 scal, spending, sclock;
   9
  10         /* Only set 32KHz settings if we have an external
  11          * 32KHz crystal present */
  12 @@ -317,6 +317,15 @@ static void ath5k_hw_set_sleep_clock(str
  13
  14                 /* Set up tsf increment on each cycle */
  15                 AR5K_REG_WRITE_BITS(ah, AR5K_TSF_PARM, AR5K_TSF_PARM_INC, 1);
  16 +
  17 +               if ((ah->ah_radio == AR5K_RF5112) ||
  18 +                       (ah->ah_radio == AR5K_RF5413) ||
  19 +                       (ah->ah_radio == AR5K_RF2316) ||
  20 +                       (ah->ah_radio == AR5K_RF2317))
  21 +                       sclock = 40 - 1;
  22 +               else
  23 +                       sclock = 32 - 1;
  24 +               AR5K_REG_WRITE_BITS(ah, AR5K_USEC_5211, AR5K_USEC_32, sclock);
  25         }
  26  }
  27