[brcm63xx] resync kernel configuration
[openwrt.git] / target / linux / s3c24xx / patches-2.6.24 / 1048-s3c2440-nand-disable-hwecc.patch.patch
1 From 1d89da736ed33d3f7c398fb9f8dfddecb7c7c7a9 Mon Sep 17 00:00:00 2001
2 From: mokopatches <mokopatches@openmoko.org>
3 Date: Sun, 13 Apr 2008 07:23:48 +0100
4 Subject: [PATCH] s3c2440-nand-disable-hwecc.patch
5 Disable the hardware ECC checking on S3C2440 based platforms (HXD8, SMDK2440,
6 GTA02) for the time being, since our u-boot doesn't yet support it for 2k page
7 size NAND
8
9 ---
10 drivers/mtd/nand/s3c2410.c | 2 +-
11 1 files changed, 1 insertions(+), 1 deletions(-)
12
13 diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
14 index 5c1c09d..f83bed9 100644
15 --- a/drivers/mtd/nand/s3c2410.c
16 +++ b/drivers/mtd/nand/s3c2410.c
17 @@ -658,7 +658,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
18 nmtd->mtd.owner = THIS_MODULE;
19 nmtd->set = set;
20
21 - if (hardware_ecc) {
22 + if (info->cpu_type == TYPE_S3C2410 && hardware_ecc) {
23 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
24 chip->ecc.correct = s3c2410_nand_correct_data;
25 chip->ecc.mode = NAND_ECC_HW;
26 --
27 1.5.6.5
28
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