simplify and fix adm5120 image building, fix broken FEATURES handling
[openwrt.git] / package / broadcom-diag / src / gpio.h
1 #ifndef __DIAG_GPIO_H
2 #define __DIAG_GPIO_H
3 #include <linux/interrupt.h>
4
5 #ifndef BCMDRIVER
6 #include <linux/ssb/ssb.h>
7 #include <linux/ssb/ssb_driver_chipcommon.h>
8 #include <linux/ssb/ssb_driver_extif.h>
9
10 extern struct ssb_bus ssb;
11
12 #define gpio_op(op, param...) \
13 do { \
14 if (ssb.chipco.dev) \
15 return ssb_chipco_gpio_##op(&ssb.chipco, param); \
16 else if (ssb.extif.dev) \
17 return ssb_extif_gpio_##op(&ssb.extif, param); \
18 else \
19 return 0; \
20 } while (0);
21
22
23 static inline u32 gpio_in(void)
24 {
25 gpio_op(in, ~0);
26 }
27
28 static inline u32 gpio_out(u32 mask, u32 value)
29 {
30 gpio_op(out, mask, value);
31 }
32
33 static inline u32 gpio_outen(u32 mask, u32 value)
34 {
35 gpio_op(outen, mask, value);
36 }
37
38 static inline u32 gpio_control(u32 mask, u32 value)
39 {
40 if (ssb.chipco.dev)
41 return ssb_chipco_gpio_control(&ssb.chipco, mask, value);
42 else
43 return 0;
44 }
45
46 static inline u32 gpio_intmask(u32 mask, u32 value)
47 {
48 gpio_op(intmask, mask, value);
49 }
50
51 static inline u32 gpio_intpolarity(u32 mask, u32 value)
52 {
53 gpio_op(polarity, mask, value);
54 }
55
56 static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *))
57 {
58 int irq;
59
60 if (ssb.chipco.dev)
61 irq = ssb_mips_irq(ssb.chipco.dev) + 2;
62 else if (ssb.extif.dev)
63 irq = ssb_mips_irq(ssb.extif.dev) + 2;
64 else return;
65
66 if (enabled) {
67 if (request_irq(irq, handler, IRQF_SHARED | IRQF_SAMPLE_RANDOM, "gpio", handler))
68 return;
69 } else {
70 free_irq(irq, handler);
71 }
72
73 if (ssb.chipco.dev)
74 ssb_write32_masked(ssb.chipco.dev, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO, (enabled ? SSB_CHIPCO_IRQ_GPIO : 0));
75 }
76
77 #else
78
79 #include <typedefs.h>
80 #include <osl.h>
81 #include <bcmdevs.h>
82 #include <sbutils.h>
83 #include <sbconfig.h>
84 #include <sbchipc.h>
85 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
86 #include <sbmips.h>
87 #else
88 #include <hndcpu.h>
89 #endif
90
91 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
92 #define sbh bcm947xx_sbh
93 #define sbh_lock bcm947xx_sbh_lock
94 #endif
95
96 extern void *sbh;
97 extern spinlock_t sbh_lock;
98
99 #define gpio_in() sb_gpioin(sbh)
100 #define gpio_out(mask, value) sb_gpioout(sbh, mask, ((value) & (mask)), GPIO_DRV_PRIORITY)
101 #define gpio_outen(mask, value) sb_gpioouten(sbh, mask, value, GPIO_DRV_PRIORITY)
102 #define gpio_control(mask, value) sb_gpiocontrol(sbh, mask, value, GPIO_DRV_PRIORITY)
103 #define gpio_intmask(mask, value) sb_gpiointmask(sbh, mask, value, GPIO_DRV_PRIORITY)
104 #define gpio_intpolarity(mask, value) sb_gpiointpolarity(sbh, mask, value, GPIO_DRV_PRIORITY)
105
106 static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, struct pt_regs *))
107 {
108 unsigned int coreidx;
109 unsigned long flags;
110 chipcregs_t *cc;
111 int irq;
112
113 spin_lock_irqsave(sbh_lock, flags);
114 coreidx = sb_coreidx(sbh);
115
116 irq = sb_irq(sbh) + 2;
117 if (enabled)
118 request_irq(irq, handler, SA_SHIRQ | SA_SAMPLE_RANDOM, "gpio", handler);
119 else
120 free_irq(irq, handler);
121
122 if ((cc = sb_setcore(sbh, SB_CC, 0))) {
123 int intmask;
124
125 intmask = readl(&cc->intmask);
126 if (enabled)
127 intmask |= CI_GPIO;
128 else
129 intmask &= ~CI_GPIO;
130 writel(intmask, &cc->intmask);
131 }
132 sb_setcoreidx(sbh, coreidx);
133 spin_unlock_irqrestore(sbh_lock, flags);
134 }
135
136 #endif /* BCMDRIVER */
137
138 #define EXTIF_ADDR 0x1f000000
139 #define EXTIF_UART (EXTIF_ADDR + 0x00800000)
140
141 #define GPIO_TYPE_NORMAL (0x0 << 24)
142 #define GPIO_TYPE_EXTIF (0x1 << 24)
143 #define GPIO_TYPE_MASK (0xf << 24)
144
145 static inline void gpio_set_extif(int gpio, int value)
146 {
147 volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK);
148 if (value)
149 *addr = 0xFF;
150 else
151 *addr;
152 }
153
154 #endif /* __DIAG_GPIO_H */
This page took 0.070481 seconds and 5 git commands to generate.