static void
meiLongwordWrite (u32* ul_address, u32 ul_data)
{
- writel(ul_data, ul_address);
+ ifxmips_w32(ul_data, ul_address);
wmb();
return;
} // end of "meiLongwordWrite(..."
meiLongwordRead (u32* ul_address, u32 * pul_data)
{
//*pul_data = *((volatile u32 *)ul_address);
- *pul_data = readl(ul_address);
+ *pul_data = ifxmips_r32(ul_address);
wmb();
return;
} // end of "meiLongwordRead(..."
{
u32 reg_data, fuse_value;
int i = 0;
- meiLongwordRead ( IFXMIPS_RCU_REQ, ®_data);
+ meiLongwordRead ( IFXMIPS_RCU_RST, ®_data);
while ((reg_data & 0x10000000) == 0) {
- meiLongwordRead ( IFXMIPS_RCU_REQ, ®_data);
+ meiLongwordRead ( IFXMIPS_RCU_RST, ®_data);
//add a watchdog
i++;
/* 0x4000 translate to about 16 ms@111M, so should be enough */
}
// STEP a: Prepare memory for external accesses
// Write fuse_en bit24
- meiLongwordRead (IFXMIPS_RCU_REQ, ®_data);
- meiLongwordWrite (IFXMIPS_RCU_REQ, reg_data | (1 << 24));
+ meiLongwordRead (IFXMIPS_RCU_RST, ®_data);
+ meiLongwordWrite (IFXMIPS_RCU_RST, reg_data | (1 << 24));
mei_fuse_rar_init ();
for (i = 0; i < 4; i++) {
break;
}
}
- meiLongwordRead (IFXMIPS_RCU_REQ, ®_data);
- meiLongwordWrite (IFXMIPS_RCU_REQ, reg_data & 0xF7FFFFFF);
+ meiLongwordRead (IFXMIPS_RCU_RST, ®_data);
+ meiLongwordWrite (IFXMIPS_RCU_RST, reg_data & 0xF7FFFFFF);
}
/**
meiHaltArc ();
- meiLongwordRead (IFXMIPS_RCU_REQ, &arc_debug_data);
- meiLongwordWrite (IFXMIPS_RCU_REQ,
+ meiLongwordRead (IFXMIPS_RCU_RST, &arc_debug_data);
+ meiLongwordWrite (IFXMIPS_RCU_RST,
arc_debug_data | IFXMIPS_RCU_RST_REQ_DFE |
IFXMIPS_RCU_RST_REQ_AFE);
- meiLongwordWrite (IFXMIPS_RCU_REQ, arc_debug_data);
+ meiLongwordWrite (IFXMIPS_RCU_RST, arc_debug_data);
// reset ARC
meiLongwordWrite(MEI_RST_CONTROL, MEI_SOFT_RESET);
meiLongwordWrite(MEI_RST_CONTROL, 0);
*IFXMIPS_GPIO_P0_OD = (*IFXMIPS_GPIO_P0_OD) | 0x800;
//enable ARC JTAG
- meiLongwordRead(IFXMIPS_RCU_REQ, ®_data);
- meiLongwordWrite(IFXMIPS_RCU_REQ, reg_data | IFXMIPS_RCU_RST_REQ_ARC_JTAG);
+ meiLongwordRead(IFXMIPS_RCU_RST, ®_data);
+ meiLongwordWrite(IFXMIPS_RCU_RST, reg_data | IFXMIPS_RCU_RST_REQ_ARC_JTAG);
break;
case GET_ADSL_LOOP_DIAGNOSTICS_MODE:
ifxmips_mei_ceoc_init ();
#endif
// power up mei
- temp = readl(IFXMIPS_PMU_PWDCR);
+ temp = ifxmips_r32(IFXMIPS_PMU_PWDCR);
temp &= 0xffff7dbe;
- writel(temp, IFXMIPS_PMU_PWDCR);
+ ifxmips_w32(temp, IFXMIPS_PMU_PWDCR);
#if defined (CONFIG_ATM_IFXMIPS)
IFX_ATM_LED_Callback_Register (adsl_led_flash);