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[ar71xx] enable yaffs on 2.6.29
[openwrt.git]
/
target
/
linux
/
ifxmips
/
files
/
drivers
/
char
/
ifxmips_mei_core.c
diff --git
a/target/linux/ifxmips/files/drivers/char/ifxmips_mei_core.c
b/target/linux/ifxmips/files/drivers/char/ifxmips_mei_core.c
index
4d14b89
..
e8787c5
100644
(file)
--- a/
target/linux/ifxmips/files/drivers/char/ifxmips_mei_core.c
+++ b/
target/linux/ifxmips/files/drivers/char/ifxmips_mei_core.c
@@
-260,7
+260,7
@@
unsigned char got_int = 0;
static void
meiLongwordWrite (u32* ul_address, u32 ul_data)
{
static void
meiLongwordWrite (u32* ul_address, u32 ul_data)
{
-
writel
(ul_data, ul_address);
+
ifxmips_w32
(ul_data, ul_address);
wmb();
return;
} // end of "meiLongwordWrite(..."
wmb();
return;
} // end of "meiLongwordWrite(..."
@@
-277,7
+277,7
@@
static void
meiLongwordRead (u32* ul_address, u32 * pul_data)
{
//*pul_data = *((volatile u32 *)ul_address);
meiLongwordRead (u32* ul_address, u32 * pul_data)
{
//*pul_data = *((volatile u32 *)ul_address);
- *pul_data =
readl
(ul_address);
+ *pul_data =
ifxmips_r32
(ul_address);
wmb();
return;
} // end of "meiLongwordRead(..."
wmb();
return;
} // end of "meiLongwordRead(..."
@@
-725,9
+725,9
@@
mei_fuse_prg (void)
{
u32 reg_data, fuse_value;
int i = 0;
{
u32 reg_data, fuse_value;
int i = 0;
- meiLongwordRead ( IFXMIPS_RCU_R
EQ
, ®_data);
+ meiLongwordRead ( IFXMIPS_RCU_R
ST
, ®_data);
while ((reg_data & 0x10000000) == 0) {
while ((reg_data & 0x10000000) == 0) {
- meiLongwordRead ( IFXMIPS_RCU_R
EQ
, ®_data);
+ meiLongwordRead ( IFXMIPS_RCU_R
ST
, ®_data);
//add a watchdog
i++;
/* 0x4000 translate to about 16 ms@111M, so should be enough */
//add a watchdog
i++;
/* 0x4000 translate to about 16 ms@111M, so should be enough */
@@
-736,8
+736,8
@@
mei_fuse_prg (void)
}
// STEP a: Prepare memory for external accesses
// Write fuse_en bit24
}
// STEP a: Prepare memory for external accesses
// Write fuse_en bit24
- meiLongwordRead (IFXMIPS_RCU_R
EQ
, ®_data);
- meiLongwordWrite (IFXMIPS_RCU_R
EQ
, reg_data | (1 << 24));
+ meiLongwordRead (IFXMIPS_RCU_R
ST
, ®_data);
+ meiLongwordWrite (IFXMIPS_RCU_R
ST
, reg_data | (1 << 24));
mei_fuse_rar_init ();
for (i = 0; i < 4; i++) {
mei_fuse_rar_init ();
for (i = 0; i < 4; i++) {
@@
-795,8
+795,8
@@
mei_fuse_prg (void)
break;
}
}
break;
}
}
- meiLongwordRead (IFXMIPS_RCU_R
EQ
, ®_data);
- meiLongwordWrite (IFXMIPS_RCU_R
EQ
, reg_data & 0xF7FFFFFF);
+ meiLongwordRead (IFXMIPS_RCU_R
ST
, ®_data);
+ meiLongwordWrite (IFXMIPS_RCU_R
ST
, reg_data & 0xF7FFFFFF);
}
/**
}
/**
@@
-912,11
+912,11
@@
meiResetARC (void)
meiHaltArc ();
meiHaltArc ();
- meiLongwordRead (IFXMIPS_RCU_R
EQ
, &arc_debug_data);
- meiLongwordWrite (IFXMIPS_RCU_R
EQ
,
+ meiLongwordRead (IFXMIPS_RCU_R
ST
, &arc_debug_data);
+ meiLongwordWrite (IFXMIPS_RCU_R
ST
,
arc_debug_data | IFXMIPS_RCU_RST_REQ_DFE |
IFXMIPS_RCU_RST_REQ_AFE);
arc_debug_data | IFXMIPS_RCU_RST_REQ_DFE |
IFXMIPS_RCU_RST_REQ_AFE);
- meiLongwordWrite (IFXMIPS_RCU_R
EQ
, arc_debug_data);
+ meiLongwordWrite (IFXMIPS_RCU_R
ST
, arc_debug_data);
// reset ARC
meiLongwordWrite(MEI_RST_CONTROL, MEI_SOFT_RESET);
meiLongwordWrite(MEI_RST_CONTROL, 0);
// reset ARC
meiLongwordWrite(MEI_RST_CONTROL, MEI_SOFT_RESET);
meiLongwordWrite(MEI_RST_CONTROL, 0);
@@
-2769,8
+2769,8
@@
mei_ioctl (MEI_inode_t * ino, MEI_file_t * fil, unsigned int command,
*IFXMIPS_GPIO_P0_OD = (*IFXMIPS_GPIO_P0_OD) | 0x800;
//enable ARC JTAG
*IFXMIPS_GPIO_P0_OD = (*IFXMIPS_GPIO_P0_OD) | 0x800;
//enable ARC JTAG
- meiLongwordRead(IFXMIPS_RCU_R
EQ
, ®_data);
- meiLongwordWrite(IFXMIPS_RCU_R
EQ
, reg_data | IFXMIPS_RCU_RST_REQ_ARC_JTAG);
+ meiLongwordRead(IFXMIPS_RCU_R
ST
, ®_data);
+ meiLongwordWrite(IFXMIPS_RCU_R
ST
, reg_data | IFXMIPS_RCU_RST_REQ_ARC_JTAG);
break;
case GET_ADSL_LOOP_DIAGNOSTICS_MODE:
break;
case GET_ADSL_LOOP_DIAGNOSTICS_MODE:
@@
-3561,9
+3561,9
@@
ifxmips_mei_init_module (void)
ifxmips_mei_ceoc_init ();
#endif
// power up mei
ifxmips_mei_ceoc_init ();
#endif
// power up mei
- temp =
readl
(IFXMIPS_PMU_PWDCR);
+ temp =
ifxmips_r32
(IFXMIPS_PMU_PWDCR);
temp &= 0xffff7dbe;
temp &= 0xffff7dbe;
-
writel
(temp, IFXMIPS_PMU_PWDCR);
+
ifxmips_w32
(temp, IFXMIPS_PMU_PWDCR);
#if defined (CONFIG_ATM_IFXMIPS)
IFX_ATM_LED_Callback_Register (adsl_led_flash);
#if defined (CONFIG_ATM_IFXMIPS)
IFX_ATM_LED_Callback_Register (adsl_led_flash);
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