};
extern int ifxmips_pci_external_clock;
};
extern int ifxmips_pci_external_clock;
+extern int ifxmips_pci_req_mask;
static unsigned int chiprev;
static int cmdline_mac;
static unsigned int chiprev;
static int cmdline_mac;
struct gpio_led *ifxmips_leds;
struct gpio_led *gpio_leds;
int pci_external_clock;
struct gpio_led *ifxmips_leds;
struct gpio_led *gpio_leds;
int pci_external_clock;
ifxmips_gpio_dev.resource = &board->gpiodev_resource;
if (board->pci_external_clock)
ifxmips_pci_external_clock = 1;
ifxmips_gpio_dev.resource = &board->gpiodev_resource;
if (board->pci_external_clock)
ifxmips_pci_external_clock = 1;
+ if (board->pci_req_mask)
+ ifxmips_pci_req_mask = board->pci_req_mask;
printk(KERN_INFO "using board definition %s\n", board->name);
return platform_add_devices(board->devs, board->num_devs);
}
printk(KERN_INFO "using board definition %s\n", board->name);
return platform_add_devices(board->devs, board->num_devs);
}
u32 ifxmips_pci_mapped_cfg;
int ifxmips_pci_external_clock = 0;
u32 ifxmips_pci_mapped_cfg;
int ifxmips_pci_external_clock = 0;
+/* Since the PCI REQ pins can be reused for other functionality, make it possible
+ to exclude those from interpretation by the PCI controller */
+int ifxmips_pci_req_mask = 0xf;
+
static int __init
ifxmips_pci_set_external_clk(char *str)
{
static int __init
ifxmips_pci_set_external_clk(char *str)
{
/* enable external 2 PCI masters */
temp_buffer = ifxmips_r32(PCI_CR_PC_ARB);
/* enable external 2 PCI masters */
temp_buffer = ifxmips_r32(PCI_CR_PC_ARB);
- temp_buffer &= (~(0xf << 16));
+ temp_buffer &= (~(ifxmips_pci_req_mask << 16));
/* enable internal arbiter */
temp_buffer |= (1 << INTERNAL_ARB_ENABLE_BIT);
/* enable internal PCI master reqest */
/* enable internal arbiter */
temp_buffer |= (1 << INTERNAL_ARB_ENABLE_BIT);
/* enable internal PCI master reqest */