--- /dev/null
+CONFIG_32BIT=y
+# CONFIG_64BIT is not set
+CONFIG_ADM6996_PHY=y
+# CONFIG_AG71XX is not set
+# CONFIG_AR71XX_EARLY_SERIAL is not set
+CONFIG_AR71XX_MACH_AP81=y
+CONFIG_AR71XX_MACH_AP83=y
+CONFIG_AR71XX_MACH_AW_NR580=y
+CONFIG_AR71XX_MACH_GENERIC=y
+CONFIG_AR71XX_MACH_MZK_W04NU=y
+CONFIG_AR71XX_MACH_MZK_W300NH=y
+CONFIG_AR71XX_MACH_PB42=y
+CONFIG_AR71XX_MACH_RB_4XX=y
+CONFIG_AR71XX_MACH_TEW_632BRP=y
+CONFIG_AR71XX_MACH_TL_WR941ND=y
+CONFIG_AR71XX_MACH_UBNT=y
+CONFIG_AR71XX_MACH_WNR2000=y
+CONFIG_AR71XX_MACH_WP543=y
+CONFIG_AR71XX_WDT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ATHEROS_AR71XX=y
+CONFIG_BASE_SMALL=0
+# CONFIG_BCM47XX is not set
+CONFIG_BITREVERSE=y
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd console=ttyS0,115200 init=/etc/preinit"
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_CPU_BIG_ENDIAN=y
+# CONFIG_CPU_CAVIUM_OCTEON is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+# CONFIG_CPU_LOONGSON2 is not set
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS32_R1 is not set
+CONFIG_CPU_MIPS32_R2=y
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+CONFIG_CPU_MIPSR2=y
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R5500 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_VR41XX is not set
+CONFIG_CSRC_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+# CONFIG_DCB is not set
+CONFIG_DEFAULT_VEGAS=y
+# CONFIG_DEFAULT_WESTWOOD is not set
+CONFIG_DEVPORT=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_DM9000 is not set
+CONFIG_DMA_NEED_PCI_MAP_STATE=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_FREEZER is not set
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+# CONFIG_HAVE_AOUT is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HW_HAS_PCI=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_I2C is not set
+CONFIG_ICPLUS_PHY=y
+CONFIG_INITRAMFS_ROOT_GID=0
+CONFIG_INITRAMFS_ROOT_UID=0
+CONFIG_INITRAMFS_SOURCE="../../root"
+CONFIG_IRQ_CPU=y
+# CONFIG_ISDN is not set
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_LEMOTE_FULONG is not set
+# CONFIG_LIB80211 is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_M25PXX_USE_FAST_READ is not set
+# CONFIG_MACH_ALCHEMY is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MACH_VR41XX is not set
+CONFIG_MICREL_PHY=y
+# CONFIG_MIKROTIK_RB532 is not set
+CONFIG_MIPS=y
+# CONFIG_MIPS_COBALT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_MIPS_MACHINE=y
+# CONFIG_MIPS_MALTA is not set
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_MT_SMTC is not set
+# CONFIG_MIPS_SIM is not set
+CONFIG_MISC_FILESYSTEMS=y
+CONFIG_MTD=y
+# CONFIG_MTD_ABSENT is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_MTD_BLOCK2MTD is not set
+# CONFIG_MTD_CFI is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_CONCAT=y
+# CONFIG_MTD_JEDECPROBE is not set
+# CONFIG_MTD_LPDDR is not set
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MTDRAM is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+CONFIG_MTD_NAND_RB4XX=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_ONENAND is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_PLATRAM is not set
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_RAM is not set
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_PARTS_READONLY=y
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_TESTS is not set
+CONFIG_MYLOADER=y
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NEC_MARKEINS is not set
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_MV88E6060=y
+# CONFIG_NET_DSA_MV88E6123_61_65 is not set
+# CONFIG_NET_DSA_MV88E6131 is not set
+# CONFIG_NET_DSA_MV88E6XXX is not set
+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
+# CONFIG_NET_DSA_TAG_DSA is not set
+# CONFIG_NET_DSA_TAG_EDSA is not set
+CONFIG_NET_DSA_TAG_TRAILER=y
+# CONFIG_NET_SCH_DRR is not set
+# CONFIG_NF_DEFRAG_IPV4 is not set
+# CONFIG_NO_IOPORT is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+# CONFIG_PAGE_SIZE_16KB is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_PAGE_SIZE_8KB is not set
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_PHYLIB=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PROBE_INITRD_HEADER is not set
+CONFIG_PROM_EMU=y
+CONFIG_RTC_LIB=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+CONFIG_SERIAL_8250_NR_UARTS=1
+CONFIG_SERIAL_8250_RUNTIME_UARTS=1
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+CONFIG_SPI=y
+CONFIG_SPI_AR71XX=y
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_GPIO_OLD is not set
+CONFIG_SPI_MASTER=y
+# CONFIG_SPI_SPIDEV is not set
+CONFIG_SSB_POSSIBLE=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_CPU_MIPS32_R2=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+# CONFIG_TC35815 is not set
+CONFIG_TICK_ONESHOT=y
+CONFIG_TRAD_SIGNALS=y
+CONFIG_USB_SUPPORT=y
+CONFIG_ZONE_DMA_FLAG=0
--- /dev/null
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -602,6 +602,13 @@ else
+ load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff81100000
+ endif
+
++#
++# Atheros AR71xx
++#
++core-$(CONFIG_ATHEROS_AR71XX) += arch/mips/ar71xx/
++cflags-$(CONFIG_ATHEROS_AR71XX) += -I$(srctree)/arch/mips/include/asm/mach-ar71xx
++load-$(CONFIG_ATHEROS_AR71XX) += 0xffffffff80060000
++
+ # temporary until string.h is fixed
+ cflags-y += -ffreestanding
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -22,6 +22,23 @@ choice
+ config MACH_ALCHEMY
+ bool "Alchemy processor based machines"
+
++config ATHEROS_AR71XX
++ bool "Atheros AR71xx based boards"
++ select CEVT_R4K
++ select CSRC_R4K
++ select DMA_NONCOHERENT
++ select HW_HAS_PCI
++ select IRQ_CPU
++ select ARCH_REQUIRE_GPIOLIB
++ select SYS_HAS_CPU_MIPS32_R1
++ select SYS_HAS_CPU_MIPS32_R2
++ select SYS_SUPPORTS_32BIT_KERNEL
++ select SYS_SUPPORTS_BIG_ENDIAN
++ select SYS_HAS_EARLY_PRINTK
++ select MIPS_MACHINE
++ help
++ Support for Atheros AR71xx based boards.
++
+ config BASLER_EXCITE
+ bool "Basler eXcite smart camera"
+ select CEVT_R4K
+@@ -640,6 +657,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
+ endchoice
+
+ source "arch/mips/alchemy/Kconfig"
++source "arch/mips/ar71xx/Kconfig"
+ source "arch/mips/basler/excite/Kconfig"
+ source "arch/mips/jazz/Kconfig"
+ source "arch/mips/lasat/Kconfig"
--- /dev/null
+--- a/arch/mips/pci/Makefile
++++ b/arch/mips/pci/Makefile
+@@ -16,6 +16,7 @@ obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o
+ obj-$(CONFIG_NEC_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
+ obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
+ obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o
++obj-$(CONFIG_ATHEROS_AR71XX) += pci-ar71xx.o
+
+ #
+ # These are still pretty much in the old state, watch, go blind.
--- /dev/null
+--- a/drivers/usb/host/Kconfig
++++ b/drivers/usb/host/Kconfig
+@@ -81,6 +81,13 @@ config USB_EHCI_BIG_ENDIAN_DESC
+ depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX)
+ default y
+
++config USB_EHCI_AR71XX
++ bool "USB EHCI support for AR71xx"
++ depends on USB_EHCI_HCD && ATHEROS_AR71XX
++ default y
++ help
++ Support for Atheros AR71xx built-in EHCI controller
++
+ config USB_EHCI_FSL
+ bool "Support for Freescale on-chip EHCI USB controller"
+ depends on USB_EHCI_HCD && FSL_SOC
+@@ -154,6 +161,13 @@ config USB_OHCI_HCD
+ To compile this driver as a module, choose M here: the
+ module will be called ohci-hcd.
+
++config USB_OHCI_AR71XX
++ bool "USB OHCI support for Atheros AR71xx"
++ depends on USB_OHCI_HCD && ATHEROS_AR71XX
++ default y
++ help
++ Support for Atheros AR71xx built-in OHCI controller
++
+ config USB_OHCI_HCD_PPC_SOC
+ bool "OHCI support for on-chip PPC USB controller"
+ depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
+--- a/drivers/usb/host/ehci-hcd.c
++++ b/drivers/usb/host/ehci-hcd.c
+@@ -1036,6 +1036,11 @@ MODULE_LICENSE ("GPL");
+ #define PLATFORM_DRIVER ixp4xx_ehci_driver
+ #endif
+
++#ifdef CONFIG_USB_EHCI_AR71XX
++#include "ehci-ar71xx.c"
++#define PLATFORM_DRIVER ehci_ar71xx_driver
++#endif
++
+ #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
+ !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
+ #error "missing bus glue for ehci-hcd"
+--- a/drivers/usb/host/ohci-hcd.c
++++ b/drivers/usb/host/ohci-hcd.c
+@@ -1080,6 +1080,11 @@ MODULE_LICENSE ("GPL");
+ #define TMIO_OHCI_DRIVER ohci_hcd_tmio_driver
+ #endif
+
++#ifdef CONFIG_USB_OHCI_AR71XX
++#include "ohci-ar71xx.c"
++#define PLATFORM_DRIVER ohci_hcd_ar71xx_driver
++#endif
++
+ #if !defined(PCI_DRIVER) && \
+ !defined(PLATFORM_DRIVER) && \
+ !defined(OF_PLATFORM_DRIVER) && \
--- /dev/null
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -53,6 +53,13 @@ if SPI_MASTER
+
+ comment "SPI Master Controller Drivers"
+
++config SPI_AR71XX
++ tristate "Atheros AR71xx SPI Controller"
++ depends on SPI_MASTER && ATHEROS_AR71XX
++ select SPI_BITBANG
++ help
++ This is the SPI contoller driver for Atheros AR71xx.
++
+ config SPI_ATMEL
+ tristate "Atmel SPI Controller"
+ depends on (ARCH_AT91 || AVR32)
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -11,6 +11,7 @@ endif
+ obj-$(CONFIG_SPI_MASTER) += spi.o
+
+ # SPI master controller drivers (bus)
++obj-$(CONFIG_SPI_AR71XX) += ar71xx_spi.o
+ obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
+ obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
+ obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o
--- /dev/null
+--- a/drivers/net/Kconfig
++++ b/drivers/net/Kconfig
+@@ -2068,6 +2068,8 @@ config ACENIC_OMIT_TIGON_I
+
+ The safe and default value for this is N.
+
++source drivers/net/ag71xx/Kconfig
++
+ config DL2K
+ tristate "DL2000/TC902x-based Gigabit Ethernet support"
+ depends on PCI
+--- a/drivers/net/Makefile
++++ b/drivers/net/Makefile
+@@ -2,6 +2,7 @@
+ # Makefile for the Linux network (ethercard) device drivers.
+ #
+
++obj-$(CONFIG_AG71XX) += ag71xx/
+ obj-$(CONFIG_E1000) += e1000/
+ obj-$(CONFIG_E1000E) += e1000e/
+ obj-$(CONFIG_IBM_NEW_EMAC) += ibm_newemac/
--- /dev/null
+--- a/drivers/watchdog/Kconfig
++++ b/drivers/watchdog/Kconfig
+@@ -766,6 +766,13 @@ config TXX9_WDT
+ help
+ Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs.
+
++config AR71XX_WDT
++ tristate "Atheros AR71xx Watchdog Timer"
++ depends on ATHEROS_AR71XX
++ help
++ Hardware driver for the built-in watchdog timer on the Atheros
++ AR71xx SoCs.
++
+ # PARISC Architecture
+
+ # POWERPC Architecture
+--- a/drivers/watchdog/Makefile
++++ b/drivers/watchdog/Makefile
+@@ -107,6 +107,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
+ obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
+ obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
+ obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
++obj-$(CONFIG_AR71XX_WDT) += ar71xx_wdt.o
+
+ # PARISC Architecture
+
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -504,6 +504,10 @@ static struct flash_info __devinitdata m
+ { "at26df161a", 0x1f4601, 0, 64 * 1024, 32, SECT_4K, },
+ { "at26df321", 0x1f4701, 0, 64 * 1024, 64, SECT_4K, },
+
++ /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
++ { "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
++ { "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
++
+ /* Spansion -- single (large) sector size only, at least
+ * for the chips listed here (without boot sectors).
+ */
--- /dev/null
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -96,6 +96,11 @@ config ADM6996_PHY
+ config MVSWITCH_PHY
+ tristate "Driver for Marvell 88E6060 switches"
+
++config MICREL_PHY
++ tristate "Drivers for Micrel/Kendin PHYs"
++ ---help---
++ Currently has a driver for the KSZ8041
++
+ config FIXED_PHY
+ bool "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
+ depends on PHYLIB=y
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -17,6 +17,7 @@ obj-$(CONFIG_ADM6996_PHY) += adm6996.o
+ obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o
+ obj-$(CONFIG_REALTEK_PHY) += realtek.o
+ obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
++obj-$(CONFIG_MICREL) += micrel.o
+ obj-$(CONFIG_FIXED_PHY) += fixed.o
+ obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
+ obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -712,12 +712,17 @@ static int __devinit m25p_probe(struct s
+ struct mtd_partition *parts = NULL;
+ int nr_parts = 0;
+
++ static const char *part_probes[] = {
+ #ifdef CONFIG_MTD_CMDLINE_PARTS
+- static const char *part_probes[] = { "cmdlinepart", NULL, };
++ "cmdlinepart",
++#endif
++#ifdef CONFIG_MTD_MYLOADER_PARTS
++ "MyLoader",
++#endif
++ NULL, };
+
+ nr_parts = parse_mtd_partitions(&flash->mtd,
+ part_probes, &parts, 0);
+-#endif
+
+ if (nr_parts <= 0 && data && data->parts) {
+ parts = data->parts;
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -504,6 +504,9 @@ static struct flash_info __devinitdata m
+ { "at26df161a", 0x1f4601, 0, 64 * 1024, 32, SECT_4K, },
+ { "at26df321", 0x1f4701, 0, 64 * 1024, 64, SECT_4K, },
+
++ /* EON -- en25px */
++ { "en25p32", 0x1c2016, 0, 64 * 1024, 64, },
++
+ /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
+ { "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
+ { "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -722,6 +722,9 @@ static int __devinit m25p_probe(struct s
+ #ifdef CONFIG_MTD_MYLOADER_PARTS
+ "MyLoader",
+ #endif
++#ifdef CONFIG_MTD_REDBOOT_PARTS
++ "RedBoot",
++#endif
+ NULL, };
+
+ nr_parts = parse_mtd_partitions(&flash->mtd,
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -507,6 +507,11 @@ static struct flash_info __devinitdata m
+ /* EON -- en25px */
+ { "en25p32", 0x1c2016, 0, 64 * 1024, 64, },
+
++ /* Macronix -- mx25lxxx */
++ { "mx25l32", 0xc22016, 0, 64 * 1024, 64, },
++ { "mx25l64", 0xc22017, 0, 64 * 1024, 128, },
++ { "mx25l128", 0xc22018, 0, 64 * 1024, 256, },
++
+ /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
+ { "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
+ { "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -512,6 +512,11 @@ static struct flash_info __devinitdata m
+ { "mx25l64", 0xc22017, 0, 64 * 1024, 128, },
+ { "mx25l128", 0xc22018, 0, 64 * 1024, 256, },
+
++ /* Numonyx -- xxxs33b */
++ { "160s33b", 0x898911, 0, 64 * 1024, 64, },
++ { "320s33b", 0x898912, 0, 64 * 1024, 128, },
++ { "640s33b", 0x898913, 0, 64 * 1024, 256, },
++
+ /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
+ { "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
+ { "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
--- /dev/null
+--- a/drivers/usb/host/ehci-q.c
++++ b/drivers/usb/host/ehci-q.c
+@@ -1082,6 +1082,9 @@ static void end_unlink_async (struct ehc
+ ehci->reclaim = NULL;
+ start_unlink_async (ehci, next);
+ }
++
++ if (ehci->has_synopsys_hc_bug)
++ writel((u32)ehci->async->qh_dma, &ehci->regs->async_next);
+ }
+
+ /* makes sure the async qh will become idle */
+--- a/drivers/usb/host/ehci.h
++++ b/drivers/usb/host/ehci.h
+@@ -125,6 +125,7 @@ struct ehci_hcd { /* one per controlle
+ unsigned big_endian_mmio:1;
+ unsigned big_endian_desc:1;
+ unsigned has_amcc_usb23:1;
++ unsigned has_synopsys_hc_bug:1; /* Synopsys HC */
+
+ /* required for usb32 quirk */
+ #define OHCI_CTRL_HCFS (3 << 6)
--- /dev/null
+--- a/drivers/mtd/redboot.c
++++ b/drivers/mtd/redboot.c
+@@ -60,31 +60,32 @@ static int parse_redboot_partitions(stru
+ static char nullstring[] = "unallocated";
+ #endif
+
++ buf = vmalloc(master->erasesize);
++ if (!buf)
++ return -ENOMEM;
++
++ restart:
+ if ( directory < 0 ) {
+ offset = master->size + directory * master->erasesize;
+- while (master->block_isbad &&
++ while (master->block_isbad &&
+ master->block_isbad(master, offset)) {
+ if (!offset) {
+ nogood:
+ printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n");
++ vfree(buf);
+ return -EIO;
+ }
+ offset -= master->erasesize;
+ }
+ } else {
+ offset = directory * master->erasesize;
+- while (master->block_isbad &&
++ while (master->block_isbad &&
+ master->block_isbad(master, offset)) {
+ offset += master->erasesize;
+ if (offset == master->size)
+ goto nogood;
+ }
+ }
+- buf = vmalloc(master->erasesize);
+-
+- if (!buf)
+- return -ENOMEM;
+-
+ printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
+ master->name, offset);
+
+@@ -156,6 +157,11 @@ static int parse_redboot_partitions(stru
+ }
+ if (i == numslots) {
+ /* Didn't find it */
++ if (offset + master->erasesize < master->size) {
++ /* not at the end of the flash yet, maybe next block :) */
++ directory++;
++ goto restart;
++ }
+ printk(KERN_NOTICE "No RedBoot partition table detected in %s\n",
+ master->name);
+ ret = 0;
--- /dev/null
+--- a/drivers/mtd/nand/Kconfig
++++ b/drivers/mtd/nand/Kconfig
+@@ -427,4 +427,8 @@ config MTD_NAND_SH_FLCTL
+ Several Renesas SuperH CPU has FLCTL. This option enables support
+ for NAND Flash using FLCTL. This driver support SH7723.
+
++config MTD_NAND_RB4XX
++ tristate "NAND flash driver for RouterBoard 4xx series"
++ depends on MTD_NAND && ATHEROS_AR71XX
++
+ endif # MTD_NAND
+--- a/drivers/mtd/nand/Makefile
++++ b/drivers/mtd/nand/Makefile
+@@ -29,6 +29,7 @@ obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) +=
+ obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o
+ obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
+ obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
++obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o
+ obj-$(CONFIG_MTD_ALAUDA) += alauda.o
+ obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
+ obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
--- /dev/null
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -164,6 +164,7 @@ endif
+ #
+ libs-$(CONFIG_ARC) += arch/mips/fw/arc/
+ libs-$(CONFIG_CFE) += arch/mips/fw/cfe/
++libs-$(CONFIG_MYLOADER) += arch/mips/fw/myloader/
+ libs-$(CONFIG_SNIPROM) += arch/mips/fw/sni/
+ libs-y += arch/mips/fw/lib/
+ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -825,6 +825,9 @@ config MIPS_NILE4
+ config MIPS_DISABLE_OBSOLETE_IDE
+ bool
+
++config MYLOADER
++ bool
++
+ config SYNC_R4K
+ bool
+
--- /dev/null
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -36,6 +36,7 @@ config ATHEROS_AR71XX
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_HAS_EARLY_PRINTK
+ select MIPS_MACHINE
++ select PROM_EMU
+ help
+ Support for Atheros AR71xx based boards.
+
--- /dev/null
+--- a/arch/mips/kernel/traps.c
++++ b/arch/mips/kernel/traps.c
+@@ -48,6 +48,7 @@
+ #include <asm/types.h>
+ #include <asm/stacktrace.h>
+ #include <asm/irq.h>
++#include <asm/time.h>
+
+ extern void check_wait(void);
+ extern asmlinkage void r4k_wait(void);
+@@ -1541,6 +1542,8 @@ void __cpuinit per_cpu_trap_init(void)
+ */
+ if (cpu_has_mips_r2) {
+ cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
++ if (get_c0_compare_irq)
++ cp0_compare_irq = get_c0_compare_irq();
+ cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
+ if (cp0_perfcount_irq == cp0_compare_irq)
+ cp0_perfcount_irq = -1;
+--- a/arch/mips/include/asm/time.h
++++ b/arch/mips/include/asm/time.h
+@@ -52,6 +52,7 @@ extern int (*perf_irq)(void);
+ */
+ #ifdef CONFIG_CEVT_R4K_LIB
+ extern unsigned int __weak get_c0_compare_int(void);
++extern unsigned int __weak get_c0_compare_irq(void);
+ extern int r4k_clockevent_init(void);
+ #endif
+
--- /dev/null
+--- a/arch/mips/kernel/cevt-r4k.c
++++ b/arch/mips/kernel/cevt-r4k.c
+@@ -15,6 +15,22 @@
+ #include <asm/cevt-r4k.h>
+
+ /*
++ * Compare interrupt can be routed and latched outside the core,
++ * so a single execution hazard barrier may not be enough to give
++ * it time to clear as seen in the Cause register. 4 time the
++ * pipeline depth seems reasonably conservative, and empirically
++ * works better in configurations with high CPU/bus clock ratios.
++ */
++
++#define compare_change_hazard() \
++ do { \
++ irq_disable_hazard(); \
++ irq_disable_hazard(); \
++ irq_disable_hazard(); \
++ irq_disable_hazard(); \
++ } while (0)
++
++/*
+ * The SMTC Kernel for the 34K, 1004K, et. al. replaces several
+ * of these routines with SMTC-specific variants.
+ */
+@@ -30,6 +46,7 @@ static int mips_next_event(unsigned long
+ cnt = read_c0_count();
+ cnt += delta;
+ write_c0_compare(cnt);
++ compare_change_hazard();
+ res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0;
+ return res;
+ }
+@@ -99,22 +116,6 @@ static int c0_compare_int_pending(void)
+ return (read_c0_cause() >> cp0_compare_irq) & 0x100;
+ }
+
+-/*
+- * Compare interrupt can be routed and latched outside the core,
+- * so a single execution hazard barrier may not be enough to give
+- * it time to clear as seen in the Cause register. 4 time the
+- * pipeline depth seems reasonably conservative, and empirically
+- * works better in configurations with high CPU/bus clock ratios.
+- */
+-
+-#define compare_change_hazard() \
+- do { \
+- irq_disable_hazard(); \
+- irq_disable_hazard(); \
+- irq_disable_hazard(); \
+- irq_disable_hazard(); \
+- } while (0)
+-
+ int c0_compare_int_usable(void)
+ {
+ unsigned int delta;
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