Midified UART init, added interrupt handlers for DCD lines

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7146 3c298f89-4303-0410-b956-a3cf2f4a3e73

diff --git a/target/linux/at91-2.6/patches/008-fdl-serial.patch b/target/linux/at91-2.6/patches/008-fdl-serial.patch
index 3796915..cac6744 100644 (file)
--- a/target/linux/at91-2.6/patches/008-fdl-serial.patch
+++ b/target/linux/at91-2.6/patches/008-fdl-serial.patch
@@ -1,5 +1,5 @@
 --- linux-2.6.19.2.old/drivers/serial/atmel_serial.c   2007-05-01 13:08:03.000000000 +0200
-+++ linux-2.6.19.2/drivers/serial/atmel_serial.c       2007-05-09 10:21:45.000000000 +0200
++++ linux-2.6.19.2/drivers/serial/atmel_serial.c       2007-05-09 17:13:34.000000000 +0200
 @@ -173,6 +173,34 @@
                                at91_set_gpio_value(AT91_PIN_PA21, 0);
                        else
@@ -69,3 +69,96 @@
        return ret;
  }
  
+@@ -510,6 +554,34 @@
+ }
+ 
+ /*
++ * USART0 DCD Interrupt handler
++ */
++
++static irqreturn_t atmel_u0_DCD_interrupt(int irq, void *dev_id)
++{
++      struct uart_port *port = dev_id;
++      int status = at91_get_gpio_value(irq);
++      
++      uart_handle_dcd_change(port, !(status));
++
++      return IRQ_HANDLED;
++}
++
++/*
++ * USART3 DCD Interrupt handler
++ */
++
++static irqreturn_t atmel_u3_DCD_interrupt(int irq, void *dev_id)
++{
++      struct uart_port *port = dev_id;
++      int status = at91_get_gpio_value(irq);
++      
++      uart_handle_dcd_change(port, !(status));
++
++      return IRQ_HANDLED;
++}
++
++/*
+  * Interrupt handler
+  */
+ static irqreturn_t atmel_interrupt(int irq, void *dev_id)
+@@ -586,6 +658,24 @@
+               return retval;
+       }
+ 
++      if (port->mapbase == AT91RM9200_BASE_US0) {
++              retval = request_irq(AT91_PIN_PA19, atmel_u0_DCD_interrupt, 0, "atmel_serial", port);
++              if (retval) {
++                      printk("atmel_serial: atmel_startup - Can't get u0DCD irq\n");
++                      free_irq(port->irq, port);
++                      return retval;
++              }
++      }
++      if (port->mapbase == AT91RM9200_BASE_US3) {
++              retval = request_irq(AT91_PIN_PA24, atmel_u3_DCD_interrupt, 0, "atmel_serial", port);
++              if (retval) {
++                      printk("atmel_serial: atmel_startup - Can't get u3DCD irq\n");
++                      free_irq(port->irq, port);
++                      return retval;
++              }
++      }
++
++
+       /*
+        * Initialize DMA (if necessary)
+        */
+@@ -602,6 +692,10 @@
+                                       kfree(atmel_port->pdc_rx[0].buf);
+                               }
+                               free_irq(port->irq, port);
++                              if (port->mapbase == AT91RM9200_BASE_US0)
++                                      free_irq(AT91_PIN_PA19, port);
++                              if (port->mapbase == AT91RM9200_BASE_US3)
++                                      free_irq(AT91_PIN_PA24, port);
+                               return -ENOMEM;
+                       }
+                       pdc->dma_addr = dma_map_single(port->dev, pdc->buf, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
+@@ -635,6 +729,10 @@
+               retval = atmel_open_hook(port);
+               if (retval) {
+                       free_irq(port->irq, port);
++                      if (port->mapbase == AT91RM9200_BASE_US0)
++                              free_irq(AT91_PIN_PA19, port);
++                      if (port->mapbase == AT91RM9200_BASE_US3)
++                              free_irq(AT91_PIN_PA24, port);
+                       return retval;
+               }
+       }
+@@ -694,6 +792,10 @@
+        * Free the interrupt
+        */
+       free_irq(port->irq, port);
++      if (port->mapbase == AT91RM9200_BASE_US0)
++              free_irq(AT91_PIN_PA19, port);
++      if (port->mapbase == AT91RM9200_BASE_US3)
++              free_irq(AT91_PIN_PA24, port);
+ 
+       /*
+        * If there is a specific "close" function (to unregister

diff --git a/target/linux/at91-2.6/patches/009-fdl-uartinit.patch b/target/linux/at91-2.6/patches/009-fdl-uartinit.patch
new file mode 100644 (file)
index 0000000..26d7986
--- /dev/null
+++ b/target/linux/at91-2.6/patches/009-fdl-uartinit.patch
@@ -0,0 +1,43 @@
+diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/at91rm9200_devices.c linux-2.6.19.2/arch/arm/mach-at91rm9200/at91rm9200_devices.c
+--- linux-2.6.19.2.old/arch/arm/mach-at91rm9200/at91rm9200_devices.c   2007-05-01 13:08:02.000000000 +0200
++++ linux-2.6.19.2/arch/arm/mach-at91rm9200/at91rm9200_devices.c       2007-05-09 12:59:58.000000000 +0200
+@@ -709,6 +709,10 @@
+        *  We need to drive the pin manually.  Default is off (RTS is active low).
+        */
+       at91_set_gpio_output(AT91_PIN_PA21, 1);
++      at91_set_gpio_output(AT91_PIN_PB6, 1);  /* DTR0 */
++      at91_set_gpio_output(AT91_PIN_PB7, 1);  /* RI0 */
++      at91_set_gpio_input(AT91_PIN_PA19, 1);  /* DCD0 */
++      at91_set_deglitch(AT91_PIN_PA19, 1);
+ }
+ 
+ static struct resource uart1_resources[] = {
+@@ -820,6 +824,12 @@
+ {
+       at91_set_B_periph(AT91_PIN_PA5, 1);             /* TXD3 */
+       at91_set_B_periph(AT91_PIN_PA6, 0);             /* RXD3 */
++      at91_set_B_periph(AT91_PIN_PB0, 0);             /* RTS3 */
++      at91_set_B_periph(AT91_PIN_PB1, 0);             /* CTS3 */
++      at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
++      at91_set_gpio_output(AT91_PIN_PB2, 1);  /* RI0 */
++      at91_set_gpio_input(AT91_PIN_PA24, 1);  /* DCD0 */
++      at91_set_deglitch(AT91_PIN_PA24, 1);
+ }
+ 
+ struct platform_device *at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
+diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c linux-2.6.19.2/arch/arm/mach-at91rm9200/vlink_leds.c
+--- linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c   2007-05-01 13:08:03.000000000 +0200
++++ linux-2.6.19.2/arch/arm/mach-at91rm9200/vlink_leds.c       2007-05-09 12:58:42.000000000 +0200
+@@ -114,12 +114,6 @@
+ 
+       at91_set_gpio_input(AT91_PIN_PB8, 1);   // JIGPRESENT
+       at91_set_gpio_input(AT91_PIN_PB22, 1);  // PWR_IND
+-      at91_set_gpio_input(AT91_PIN_PA19, 1);  // P1DTR
+-      at91_set_gpio_input(AT91_PIN_PA24, 1);  // P2DTR
+-      at91_set_gpio_output(AT91_PIN_PB29, 1); // P2DCD
+-      at91_set_gpio_output(AT91_PIN_PB2, 1);  // P2RI
+-      at91_set_gpio_output(AT91_PIN_PB6, 1);  // P1DCD
+-      at91_set_gpio_output(AT91_PIN_PB7, 1);  // P1RI
+ 
+       at91_set_gpio_input(AT91_PIN_PB27, 1);  // UDB_CNX
+       at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP