void __init prom_putchar(char ch)
{
- while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0);
+ while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0)
+ ;
UART_WRITE(UART_REG_DATA, ch);
- while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0);
+ while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0)
+ ;
}
u8 mode_shift; /* shift amount for mode bits */
};
-#define GPIO1_DESC(p, l) { \
+#define GPIO1_DESC(p, l) { \
.reg = GPIO_REG(SWITCH_REG_PORT0_LED + ((p) * 4)), \
- .iv_shift = LED0_IV_SHIFT + (l), \
- .mode_shift = (l) * 4 \
+ .iv_shift = LED0_IV_SHIFT + (l), \
+ .mode_shift = (l) * 4 \
}
static struct gpio1_desc gpio1_table[15] = {
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/io.h>
+#include <linux/bitops.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
-#include <asm/bitops.h>
#include <asm/mach-adm5120/adm5120_defs.h>
}
static struct irq_chip adm5120_intc_irq_chip = {
- .name = "INTC",
- .unmask = adm5120_intc_irq_unmask,
- .mask = adm5120_intc_irq_mask,
+ .name = "INTC",
+ .unmask = adm5120_intc_irq_unmask,
+ .mask = adm5120_intc_irq_mask,
.mask_ack = adm5120_intc_irq_mask,
.set_type = adm5120_intc_irq_set_type
};
static struct irqaction adm5120_intc_irq_action = {
- .handler = no_action,
- .name = "cascade [INTC]"
+ .handler = no_action,
+ .name = "cascade [INTC]"
};
static void adm5120_intc_irq_unmask(unsigned int irq)
setup_irq(ADM5120_IRQ_INTC, &adm5120_intc_irq_action);
}
-void __init arch_init_irq(void) {
+void __init arch_init_irq(void)
+{
mips_cpu_irq_init();
adm5120_intc_irq_init();
}
/* OSBRiDGE boards */
DEFBOARD("OSBRiDGE 5GXi", MACH_ADM5120_5GXI),
/* Motorola boards */
- DEFBOARD("Powerline MU Gateway",MACH_ADM5120_PMUGW),
+ DEFBOARD("Powerline MU Gateway", MACH_ADM5120_PMUGW),
/* Generic EB-214A */
DEFBOARD("ADM5120", MACH_ADM5120_EB_214A),
};
}
#else
-static void inline prom_init_cmdline(void) {}
+static inline void prom_init_cmdline(void) {}
#endif /* CONFIG_IMAGE_CMDLINE_HACK */
void __init prom_init(void)
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
+#include <linux/reboot.h>
+#include <linux/time.h>
-#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/time.h>
+#include <asm/bootinfo.h>
#include <asm/mips_machine.h>
#include <asm/mach-adm5120/adm5120_info.h>
{
printk(KERN_INFO "SoC : %s\n", adm5120_sys_type);
printk(KERN_INFO "Bootdev : %s flash\n",
- adm5120_nand_boot ? "NAND":"NOR");
+ adm5120_nand_boot ? "NAND" : "NOR");
printk(KERN_INFO "Prom : %s\n", prom_names[adm5120_prom_type]);
}
adm5120_add_device_gpio(EB214A_GPIO_DEV_MASK);
adm5120_add_device_uart(0);
- //adm5120_add_device_uart(1);
+ /* adm5120_add_device_uart(1); */
adm5120_add_device_switch(5, eb214a_vlans);
adm5120_pci_set_irq_map(ARRAY_SIZE(eb214a_pci_irqs),
eb214a_pci_irqs);
-// adm5120_add_device_usb();
+ /* adm5120_add_device_usb(); */
}
MIPS_MACHINE(MACH_ADM5120_EB_214A, "EB-214A", "Generic EB-214A", eb214a_setup);
static struct gpio_led rb11x_gpio_leds[] __initdata = {
GPIO_LED_STD(ADM5120_GPIO_PIN3, "user", NULL),
- GPIO_LED_INV(ADM5120_GPIO_P0L1, "lan_speed", NULL),
- GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan_lnkact", NULL),
+ GPIO_LED_INV(ADM5120_GPIO_P0L1, "lan_speed", NULL),
+ GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan_lnkact", NULL),
};
static u8 rb11x_vlans[6] __initdata = {
static struct gpio_led rb133_gpio_leds[] __initdata = {
GPIO_LED_STD(ADM5120_GPIO_PIN6, "power", NULL),
GPIO_LED_STD(ADM5120_GPIO_PIN5, "user", NULL),
- GPIO_LED_INV(ADM5120_GPIO_P2L1, "lan1_speed", NULL),
- GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan1_lnkact", NULL),
- GPIO_LED_INV(ADM5120_GPIO_P1L1, "lan2_speed", NULL),
- GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan2_lnkact", NULL),
- GPIO_LED_INV(ADM5120_GPIO_P0L1, "lan3_speed", NULL),
- GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan3_lnkact", NULL),
+ GPIO_LED_INV(ADM5120_GPIO_P2L1, "lan1_speed", NULL),
+ GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan1_lnkact", NULL),
+ GPIO_LED_INV(ADM5120_GPIO_P1L1, "lan2_speed", NULL),
+ GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan2_lnkact", NULL),
+ GPIO_LED_INV(ADM5120_GPIO_P0L1, "lan3_speed", NULL),
+ GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan3_lnkact", NULL),
};
static u8 rb133_vlans[6] __initdata = {
static struct gpio_led rb133c_gpio_leds[] __initdata = {
GPIO_LED_STD(ADM5120_GPIO_PIN6, "power", NULL),
GPIO_LED_STD(ADM5120_GPIO_PIN5, "user", NULL),
- GPIO_LED_INV(ADM5120_GPIO_P2L1, "lan1_speed", NULL),
- GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan1_lnkact", NULL),
+ GPIO_LED_INV(ADM5120_GPIO_P2L1, "lan1_speed", NULL),
+ GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan1_lnkact", NULL),
};
static u8 rb133c_vlans[6] __initdata = {
#define RB150_GPIO_NAND_ALE ADM5120_GPIO_P3L2
#define RB150_GPIO_RESET_BUTTON ADM5120_GPIO_PIN1 /* FIXME */
-#define RB150_GPIO_DEV_MASK ( 1 << RB150_GPIO_NAND_READY \
+#define RB150_GPIO_DEV_MASK (1 << RB150_GPIO_NAND_READY \
| 1 << RB150_GPIO_NAND_NCE \
| 1 << RB150_GPIO_NAND_CLE \
| 1 << RB150_GPIO_NAND_ALE)
#include "rb-1xx.h"
-#define RB153_GPIO_DEV_MASK ( 1 << ADM5120_GPIO_PIN0 \
+#define RB153_GPIO_DEV_MASK (1 << ADM5120_GPIO_PIN0 \
| 1 << ADM5120_GPIO_PIN3 \
- | 1 << ADM5120_GPIO_PIN4 )
+ | 1 << ADM5120_GPIO_PIN4)
static struct resource rb153_cf_resources[] __initdata = {
{
/*
* TODO:remove adm5120_eth* variables when the switch driver will be
- * converted into a real platform driver
+ * converted into a real platform driver
*/
extern unsigned int adm5120_eth_num_ports;
extern unsigned char adm5120_eth_macs[6][6];
/*
* INTC register bits
*/
-#define INTC_INT_TIMER ( 1 << INTC_IRQ_TIMER )
-#define INTC_INT_UART0 ( 1 << INTC_IRQ_UART0 )
-#define INTC_INT_UART1 ( 1 << INTC_IRQ_UART1 )
-#define INTC_INT_USBC ( 1 << INTC_IRQ_USBC )
-#define INTC_INT_INTX0 ( 1 << INTC_IRQ_INTX0 )
-#define INTC_INT_INTX1 ( 1 << INTC_IRQ_INTX1 )
-#define INTC_INT_PCI0 ( 1 << INTC_IRQ_PCI0 )
-#define INTC_INT_PCI1 ( 1 << INTC_IRQ_PCI1 )
-#define INTC_INT_PCI2 ( 1 << INTC_IRQ_PCI2 )
-#define INTC_INT_SWITCH ( 1 << INTC_IRQ_SWITCH )
-#define INTC_INT_ALL (( 1 << INTC_IRQ_COUNT)-1)
+#define INTC_INT_TIMER (1 << INTC_IRQ_TIMER)
+#define INTC_INT_UART0 (1 << INTC_IRQ_UART0)
+#define INTC_INT_UART1 (1 << INTC_IRQ_UART1)
+#define INTC_INT_USBC (1 << INTC_IRQ_USBC)
+#define INTC_INT_INTX0 (1 << INTC_IRQ_INTX0)
+#define INTC_INT_INTX1 (1 << INTC_IRQ_INTX1)
+#define INTC_INT_PCI0 (1 << INTC_IRQ_PCI0)
+#define INTC_INT_PCI1 (1 << INTC_IRQ_PCI1)
+#define INTC_INT_PCI2 (1 << INTC_IRQ_PCI2)
+#define INTC_INT_SWITCH (1 << INTC_IRQ_SWITCH)
+#define INTC_INT_ALL ((1 << INTC_IRQ_COUNT) - 1)
#endif /* _MACH_ADM5120_INTC_H */
#define MPMC_REG_SC3 0x0260
/* Control register bits */
-#define MPMC_CTRL_AM ( 1 << 1 ) /* Address Mirror */
-#define MPMC_CTRL_LPM ( 1 << 2 ) /* Low Power Mode */
-#define MPMC_CTRL_DWB ( 1 << 3 ) /* Drain Write Buffers */
+#define MPMC_CTRL_AM (1 << 1) /* Address Mirror */
+#define MPMC_CTRL_LPM (1 << 2) /* Low Power Mode */
+#define MPMC_CTRL_DWB (1 << 3) /* Drain Write Buffers */
/* Status register bits */
-#define MPMC_STATUS_BUSY ( 1 << 0 ) /* Busy */
-#define MPMC_STATUS_WBS ( 1 << 1 ) /* Write Buffer Status */
-#define MPMC_STATUS_SRA ( 1 << 2 ) /* Self-Refresh Acknowledge*/
+#define MPMC_STATUS_BUSY (1 << 0) /* Busy */
+#define MPMC_STATUS_WBS (1 << 1) /* Write Buffer Status */
+#define MPMC_STATUS_SRA (1 << 2) /* Self-Refresh Acknowledge*/
/* Dynamic Control register bits */
-#define MPMC_DC_CE ( 1 << 0 )
-#define MPMC_DC_DMC ( 1 << 1 )
-#define MPMC_DC_SRR ( 1 << 2 )
+#define MPMC_DC_CE (1 << 0)
+#define MPMC_DC_DMC (1 << 1)
+#define MPMC_DC_SRR (1 << 2)
#define MPMC_DC_SI_SHIFT 7
-#define MPMC_DC_SI_MASK ( 3 << 7 )
-#define MPMC_DC_SI_NORMAL ( 0 << 7 )
-#define MPMC_DC_SI_MODE ( 1 << 7 )
-#define MPMC_DC_SI_PALL ( 2 << 7 )
-#define MPMC_DC_SI_NOP ( 3 << 7 )
+#define MPMC_DC_SI_MASK (3 << 7)
+#define MPMC_DC_SI_NORMAL (0 << 7)
+#define MPMC_DC_SI_MODE (1 << 7)
+#define MPMC_DC_SI_PALL (2 << 7)
+#define MPMC_DC_SI_NOP (3 << 7)
#define SRAM_REG_CONF 0x00
#define SRAM_REG_WWE 0x04
#define NAND_READ_REG(r) \
readb((void __iomem *)KSEG1ADDR(ADM5120_NAND_BASE) + (r))
#define NAND_WRITE_REG(r, v) \
- writeb((v),(void __iomem *)KSEG1ADDR(ADM5120_NAND_BASE) + (r))
+ writeb((v), (void __iomem *)KSEG1ADDR(ADM5120_NAND_BASE) + (r))
/*-------------------------------------------------------------------------*/
unsigned irq;
};
-#define PCIIRQ(s,f,p,i) {.slot = (s), .func = (f), .pin = (p), .irq = (i)}
+#define PCIIRQ(s, f, p, i) {.slot = (s), .func = (f), .pin = (p), .irq = (i)}
#ifdef CONFIG_PCI
extern void adm5120_pci_set_irq_map(unsigned int nr_irqs,
#define GPIO_LED_DEF(g, n, t, a) { \
.name = (n), \
- .default_trigger = (t), \
+ .default_trigger = (t), \
.gpio = (g), \
.active_low = (a) \
}
#define UART_REG_FLAG 0x18
/* Receive Status Register bits */
-#define UART_RSR_FE ( 1 << 0 )
-#define UART_RSR_PE ( 1 << 1 )
-#define UART_RSR_BE ( 1 << 2 )
-#define UART_RSR_OE ( 1 << 3 )
-#define UART_RSR_ERR ( UART_RSR_FE | UART_RSR_PE | UART_RSR_BE )
+#define UART_RSR_FE (1 << 0)
+#define UART_RSR_PE (1 << 1)
+#define UART_RSR_BE (1 << 2)
+#define UART_RSR_OE (1 << 3)
+#define UART_RSR_ERR (UART_RSR_FE | UART_RSR_PE | UART_RSR_BE)
#define UART_ECR_ALL 0xFF
/* Line Control High register bits */
-#define UART_LCRH_BRK ( 1 << 0 ) /* send break */
-#define UART_LCRH_PEN ( 1 << 1 ) /* parity enable */
-#define UART_LCRH_EPS ( 1 << 2 ) /* even parity select */
-#define UART_LCRH_STP1 ( 0 << 3 ) /* one stop bits select */
-#define UART_LCRH_STP2 ( 1 << 3 ) /* two stop bits select */
-#define UART_LCRH_FEN ( 1 << 4 ) /* FIFO enable */
+#define UART_LCRH_BRK (1 << 0) /* send break */
+#define UART_LCRH_PEN (1 << 1) /* parity enable */
+#define UART_LCRH_EPS (1 << 2) /* even parity select */
+#define UART_LCRH_STP1 (0 << 3) /* one stop bits select */
+#define UART_LCRH_STP2 (1 << 3) /* two stop bits select */
+#define UART_LCRH_FEN (1 << 4) /* FIFO enable */
-#define UART_LCRH_WLEN5 ( 0 << 5 )
-#define UART_LCRH_WLEN6 ( 1 << 5 )
-#define UART_LCRH_WLEN7 ( 2 << 5 )
-#define UART_LCRH_WLEN8 ( 3 << 5 )
+#define UART_LCRH_WLEN5 (0 << 5)
+#define UART_LCRH_WLEN6 (1 << 5)
+#define UART_LCRH_WLEN7 (2 << 5)
+#define UART_LCRH_WLEN8 (3 << 5)
/* Control register bits */
-#define UART_CTRL_EN ( 1 << 0 )
+#define UART_CTRL_EN (1 << 0)
/* Flag register bits */
-#define UART_FLAG_CTS ( 1 << 0 )
-#define UART_FLAG_DSR ( 1 << 1 )
-#define UART_FLAG_DCD ( 1 << 2 )
-#define UART_FLAG_BUSY ( 1 << 3 )
-#define UART_FLAG_RXFE ( 1 << 4 )
-#define UART_FLAG_TXFF ( 1 << 5 )
-#define UART_FLAG_RXFF ( 1 << 6 )
-#define UART_FLAG_TXFE ( 1 << 7 )
+#define UART_FLAG_CTS (1 << 0)
+#define UART_FLAG_DSR (1 << 1)
+#define UART_FLAG_DCD (1 << 2)
+#define UART_FLAG_BUSY (1 << 3)
+#define UART_FLAG_RXFE (1 << 4)
+#define UART_FLAG_TXFF (1 << 5)
+#define UART_FLAG_RXFF (1 << 6)
+#define UART_FLAG_TXFE (1 << 7)
#endif /* _MACH_ADM5120_UART_H */
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/io.h>
+#include <linux/delay.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/pci_regs.h>
-#include <asm/delay.h>
#include <asm/bootinfo.h>
#include <asm/mach-adm5120/adm5120_defs.h>
static inline u32 mkaddr(struct pci_bus *bus, unsigned int devfn, int where)
{
- return (((bus->number & 0xFF) << 16) | ((devfn & 0xFF) << 8) | \
- (where & 0xFC));
+ return ((bus->number & 0xFF) << 16) | ((devfn & 0xFF) << 8) | \
+ (where & 0xFC);
}
/* -------------------------------------------------------------------------*/
ap->pio_mask = 0x1f; /* PIO4 */
ap->flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO;
- ap->ioaddr.cmd_addr = info->iobase + RB153_CF_REG_CMD;
+ ap->ioaddr.cmd_addr = info->iobase + RB153_CF_REG_CMD;
ap->ioaddr.ctl_addr = info->iobase + RB153_CF_REG_CTRL;
ap->ioaddr.altstatus_addr = info->iobase + RB153_CF_REG_CTRL;
unsigned int value;
};
-#define PORT_STATE(n,v) {.name = (n), .value = (v)}
+#define PORT_STATE(n, v) {.name = (n), .value = (v)}
static struct port_state port_states[] = {
PORT_STATE("off", LED_OFF),
struct adm5120_map_info {
struct map_info map;
- void (*switch_bank)(unsigned);
+ void (*switch_bank)(unsigned);
unsigned long window_size;
};
}
};
-static const char *probe_types[] = {
+static const char const *probe_types[] = {
"cfi_probe",
"jedec_probe",
"map_rom",
};
#ifdef CONFIG_MTD_PARTITIONS
-static const char *parse_types[] = {
+static const char const *parse_types[] = {
"cmdlinepart",
#ifdef CONFIG_MTD_REDBOOT_PARTS
"RedBoot",
#define TRX_NO_HEADER 0x1 /* do not write TRX header */
#define TRX_GZ_FILES 0x2 /* contains individual gzip files */
#define TRX_MAX_OFFSET 3
-#define TRX_MIN_KERNEL_SIZE 256*1024
+#define TRX_MIN_KERNEL_SIZE (256 * 1024)
struct trx_header {
u32 magic; /* "HDR0" */
#define TX_RING_SIZE 32
#define TX_QUEUE_LEN 28 /* Limit ring entries actually used. */
-#define TX_TIMEOUT HZ*400
+#define TX_TIMEOUT (HZ * 400)
#define RX_DESCS_SIZE (RX_RING_SIZE * sizeof(struct dma_desc *))
#define RX_SKBS_SIZE (RX_RING_SIZE * sizeof(struct sk_buff *))
t = desc->buf2;
SW_DBG(" buf2 %08X addr=%08X%s\n", desc->buf2,
t & DESC_ADDR_MASK,
- (t & DESC_BUF2_EN) ? " EN" : "" );
+ (t & DESC_BUF2_EN) ? " EN" : "");
t = desc->misc;
if (tx)
#else
sw_int_ack(status);
- if (status & (SWITCH_INT_RLD | SWITCH_INT_LDF)) {
+ if (status & (SWITCH_INT_RLD | SWITCH_INT_LDF))
adm5120_switch_rx(RX_RING_SIZE);
- }
- if (status & SWITCH_INT_SLD) {
+ if (status & SWITCH_INT_SLD)
adm5120_switch_tx();
- }
#endif
return IRQ_HANDLED;
{
memset(desc, 0, num * sizeof(*desc));
desc[num-1].buf1 |= DESC_EOR;
- memset(skbl, 0, sizeof(struct skb*)*num);
+ memset(skbl, 0, sizeof(struct skb *) * num);
cur_txl = 0;
dirty_txl = 0;
break;
}
skb_reserve(skbl[i], SKB_RESERVE_LEN);
- adm5120_rx_dma_update(&desc[i], skbl[i], (num-1==i));
+ adm5120_rx_dma_update(&desc[i], skbl[i], (num - 1 == i));
}
cur_rxl = 0;
sw_write_reg(SWITCH_REG_MAC_WT0, t);
- while (!(sw_read_reg(SWITCH_REG_MAC_WT0) & MAC_WT0_MWD));
+ while (!(sw_read_reg(SWITCH_REG_MAC_WT0) & MAC_WT0_MWD))
+ ;
}
static void adm5120_set_vlan(char *matrix)
sw_write_reg(SWITCH_REG_VLAN_G2, val);
/* Now set/update the port vs. device lookup table */
- for (port=0; port<SWITCH_NUM_PORTS; port++) {
- for (vlan_port=0; vlan_port<SWITCH_NUM_PORTS && !(matrix[vlan_port] & (0x00000001 << port)); vlan_port++);
- if (vlan_port <SWITCH_NUM_PORTS)
+ for (port = 0; port < SWITCH_NUM_PORTS; port++) {
+ for (vlan_port = 0; vlan_port < SWITCH_NUM_PORTS && !(matrix[vlan_port] & (0x00000001 << port)); vlan_port++)
+ ;
+ if (vlan_port < SWITCH_NUM_PORTS)
adm5120_port[port] = adm5120_devs[vlan_port];
else
adm5120_port[port] = NULL;
data |= DESC_ADDR(skb->data);
desc->misc =
- ((skb->len<ETH_ZLEN?ETH_ZLEN:skb->len) << DESC_PKTLEN_SHIFT) |
+ ((skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len) << DESC_PKTLEN_SHIFT) |
(0x1 << priv->vlan_no);
desc->buflen = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
static void adm5120_if_tx_timeout(struct net_device *dev)
{
- SW_INFO("TX timeout on %s\n",dev->name);
+ SW_INFO("TX timeout on %s\n", dev->name);
}
static void adm5120_if_set_multicast_list(struct net_device *dev)
struct adm5120_sw_info info;
struct adm5120_if_priv *priv = netdev_priv(dev);
- switch(cmd) {
+ switch (cmd) {
case SIOCGADMINFO:
info.magic = 0x5120;
info.ports = adm5120_nrdevs;
}
static const struct net_device_ops adm5120sw_netdev_ops = {
- .ndo_open = adm5120_if_open,
- .ndo_stop = adm5120_if_stop,
- .ndo_start_xmit = adm5120_if_hard_start_xmit,
- .ndo_set_multicast_list = adm5120_if_set_multicast_list,
- .ndo_do_ioctl = adm5120_if_do_ioctl,
- .ndo_tx_timeout = adm5120_if_tx_timeout,
- .ndo_validate_addr = eth_validate_addr,
- .ndo_change_mtu = eth_change_mtu,
- .ndo_set_mac_address = adm5120_if_set_mac_address,
+ .ndo_open = adm5120_if_open,
+ .ndo_stop = adm5120_if_stop,
+ .ndo_start_xmit = adm5120_if_hard_start_xmit,
+ .ndo_set_multicast_list = adm5120_if_set_multicast_list,
+ .ndo_do_ioctl = adm5120_if_do_ioctl,
+ .ndo_tx_timeout = adm5120_if_tx_timeout,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+ .ndo_set_mac_address = adm5120_if_set_mac_address,
};
static struct net_device *adm5120_if_alloc(void)
dev->irq = ADM5120_IRQ_SWITCH;
dev->netdev_ops = &adm5120sw_netdev_ops;
- dev->watchdog_timeo = TX_TIMEOUT;
+ dev->watchdog_timeo = TX_TIMEOUT;
#ifdef CONFIG_ADM5120_SWITCH_NAPI
netif_napi_add(dev, &priv->napi, adm5120_if_poll, 64);
#define _INCLUDE_ADM5120SW_H_
#define SIOCSMATRIX SIOCDEVPRIVATE
-#define SIOCGMATRIX SIOCDEVPRIVATE+1
-#define SIOCGADMINFO SIOCDEVPRIVATE+2
+#define SIOCGMATRIX (SIOCDEVPRIVATE + 1)
+#define SIOCGADMINFO (SIOCDEVPRIVATE + 2)
struct adm5120_sw_info {
u16 magic;
"stat=%d\n",
str,
urb,
- usb_pipedevice (pipe),
- usb_pipeendpoint (pipe),
- usb_pipeout(pipe)? "out" : "in",
+ usb_pipedevice(pipe),
+ usb_pipeendpoint(pipe),
+ usb_pipeout(pipe) ? "out" : "in",
pipestring(pipe),
urb->transfer_flags,
urb->actual_length,
if (usb_pipecontrol(pipe)) {
admhc_dbg(ahcd, "setup(8):");
for (i = 0; i < 8 ; i++)
- printk (" %02x", ((__u8 *) urb->setup_packet) [i]);
- printk ("\n");
+ printk(KERN_INFO" %02x", ((__u8 *)urb->setup_packet)[i]);
+ printk(KERN_INFO "\n");
}
if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) {
admhc_dbg(ahcd, "data(%d/%d):",
urb->actual_length,
urb->transfer_buffer_length);
- len = usb_pipeout(pipe)?
- urb->transfer_buffer_length: urb->actual_length;
+ len = usb_pipeout(pipe) ?
+ urb->transfer_buffer_length : urb->actual_length;
for (i = 0; i < 16 && i < len; i++)
- printk(" %02x", ((__u8 *)urb->transfer_buffer)[i]);
- printk("%s stat:%d\n", i < len? "...": "", status);
+ printk(KERN_INFO " %02x", ((__u8 *)urb->transfer_buffer)[i]);
+ printk(KERN_INFO "%s stat:%d\n", i < len ? "..." : "", status);
}
}
#endif /* ADMHC_VERBOSE_DEBUG */
#define admhc_dbg_sw(ahcd, next, size, format, arg...) \
do { \
- if (next) { \
- unsigned s_len; \
- s_len = scnprintf(*next, *size, format, ## arg ); \
- *size -= s_len; *next += s_len; \
- } else \
- admhc_dbg(ahcd,format, ## arg ); \
+ if (next) { \
+ unsigned s_len; \
+ s_len = scnprintf(*next, *size, format, ## arg); \
+ *size -= s_len; *next += s_len; \
+ } else \
+ admhc_dbg(ahcd, format, ## arg); \
} while (0);
admhc_dbg_sw(ahcd, next, size, "%s %08x\n", label, value);
}
-static char *buss2string (int state)
+static char *buss2string(int state)
{
switch (state) {
case ADMHC_BUSS_RESET:
admhc_readl(ahcd, ®s->hosthead), next, size);
}
-#define dbg_port_sw(hc,num,value,next,size) \
+#define dbg_port_sw(hc, num, value, next, size) \
admhc_dbg_sw(hc, next, size, \
"portstatus [%d] " \
"0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
/* dumps some of the state we know about */
admhc_dump_status(ahcd, NULL, NULL);
- admhc_dbg(ahcd,"current frame #%04x\n",
+ admhc_dbg(ahcd, "current frame #%04x\n",
admhc_frame_no(ahcd));
admhc_dump_roothub(ahcd, verbose, NULL, NULL);
tmp = hc32_to_cpup(ahcd, &ed->hwHeadP);
admhc_dbg(ahcd, " tds: head %08x tail %08x %s%s%s\n",
tmp & TD_MASK,
- hc32_to_cpup (ahcd, &ed->hwTailP),
+ hc32_to_cpup(ahcd, &ed->hwTailP),
(tmp & ED_C) ? data1 : data0,
(tmp & ED_H) ? " HALT" : "",
verbose ? " td list follows" : " (not listing)");
list_for_each(tmp, &ed->td_list) {
struct td *td;
td = list_entry(tmp, struct td, td_list);
- admhc_dump_td (ahcd, " ->", td);
+ admhc_dump_td(ahcd, " ->", td);
}
}
}
" h:%08x t:%08x",
ed,
ed_statestring(ed->state),
- ed_typestring (ed->type),
+ ed_typestring(ed->type),
(info & ED_SPEED_FULL) ? 'f' : 'l',
info & ED_FA_MASK,
(info >> ED_EN_SHIFT) & ED_EN_MASK,
(info & ED_SKIP) ? " S" : "",
(headp & ED_H) ? " H" : "",
(headp & ED_C) ? data1 : data0,
- headp & ED_MASK,tailp);
+ headp & ED_MASK, tailp);
size -= temp;
buf += temp;
u32 dbp, cbl;
td = list_entry(entry, struct td, td_list);
- info = hc32_to_cpup (ahcd, &td->hwINFO);
- dbp = hc32_to_cpup (ahcd, &td->hwDBP);
- cbl = hc32_to_cpup (ahcd, &td->hwCBL);
+ info = hc32_to_cpup(ahcd, &td->hwINFO);
+ dbp = hc32_to_cpup(ahcd, &td->hwDBP);
+ cbl = hc32_to_cpup(ahcd, &td->hwCBL);
temp = scnprintf(buf, size,
"\n\ttd/%p %s %d %s%scc=%x urb %p (%08x,%08x)",
TD_BL_GET(cbl),
(info & TD_OWN) ? "" : "DONE ",
(cbl & TD_IE) ? "IE " : "",
- TD_CC_GET (info), td->urb, info, cbl);
+ TD_CC_GET(info), td->urb, info, cbl);
size -= temp;
buf += temp;
}
char *next;
unsigned i;
- if (!(seen = kmalloc(DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
+ seen = kmalloc(DBG_SCHED_LIMIT * sizeof(*seen), GFP_ATOMIC);
+ if (!seen)
return 0;
seen_count = 0;
/* dump a snapshot of the periodic schedule (and load) */
spin_lock_irqsave(&ahcd->lock, flags);
for (i = 0; i < NUM_INTS; i++) {
- if (!(ed = ahcd->periodic [i]))
+ ed = ahcd->periodic[i];
+ if (!ed)
continue;
- temp = scnprintf(next, size, "%2d [%3d]:", i, ahcd->load [i]);
+ temp = scnprintf(next, size, "%2d [%3d]:", i, ahcd->load[i]);
size -= temp;
next += temp;
size -= temp;
next += temp;
for (temp = 0; temp < seen_count; temp++) {
- if (seen [temp] == ed)
+ if (seen[temp] == ed)
break;
}
/* show more info the first time around */
if (temp == seen_count) {
- u32 info = hc32_to_cpu (ahcd, ed->hwINFO);
+ u32 info = hc32_to_cpu(ahcd, ed->hwINFO);
struct list_head *entry;
unsigned qlen = 0;
/* qlen measured here in TDs, not urbs */
- list_for_each (entry, &ed->td_list)
+ list_for_each(entry, &ed->td_list)
qlen++;
temp = scnprintf(next, size,
" (%cs dev%d ep%d%s qlen %u"
next += temp;
if (seen_count < DBG_SCHED_LIMIT)
- seen [seen_count++] = ed;
+ seen[seen_count++] = ed;
ed = ed->ed_next;
next += temp;
}
spin_unlock_irqrestore(&ahcd->lock, flags);
- kfree (seen);
+ kfree(seen);
return PAGE_SIZE - size;
}
static int __devinit
admhc_adm5120_start(struct usb_hcd *hcd)
{
- struct admhcd *ahcd = hcd_to_admhcd (hcd);
+ struct admhcd *ahcd = hcd_to_admhcd(hcd);
int ret;
ret = admhc_init(ahcd);
#include <linux/dmapool.h>
#include <linux/reboot.h>
#include <linux/debugfs.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/unaligned.h>
#define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
#define ADMHC_INTR_INIT \
- ( ADMHC_INTR_MIE | ADMHC_INTR_INSM | ADMHC_INTR_FATI \
- | ADMHC_INTR_RESI | ADMHC_INTR_TDC | ADMHC_INTR_BABI )
+ (ADMHC_INTR_MIE | ADMHC_INTR_INSM | ADMHC_INTR_FATI \
+ | ADMHC_INTR_RESI | ADMHC_INTR_TDC | ADMHC_INTR_BABI)
/*-------------------------------------------------------------------------*/
-static const char hcd_name [] = "admhc-hcd";
+static const char hcd_name[] = "admhc-hcd";
#define STATECHANGE_DELAY msecs_to_jiffies(300)
else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
&& (urb->transfer_buffer_length
% usb_maxpacket(urb->dev, pipe,
- usb_pipeout (pipe))) == 0)
+ usb_pipeout(pipe))) == 0)
td_cnt++;
break;
case PIPE_INTERRUPT:
goto rescan;
case ED_IDLE: /* fully unlinked */
if (list_empty(&ed->td_list)) {
- td_free (ahcd, ed->dummy);
- ed_free (ahcd, ed);
+ td_free(ahcd, ed->dummy);
+ ed_free(ahcd, ed);
break;
}
/* else FALL THROUGH */
#else
/* FIXME */
ahcd->host_control = ADMHC_BUSS_RESET;
- admhc_writel(ahcd, ahcd->host_control ,&ahcd->regs->host_control);
+ admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
#endif
}
{
struct admhcd *ahcd = hcd_to_admhcd(hcd);
struct admhcd_regs __iomem *regs = ahcd->regs;
- u32 ints;
+ u32 ints;
ints = admhc_readl(ahcd, ®s->int_status);
if ((ints & ADMHC_INTR_INTA) == 0) {
pr_info("%s: " DRIVER_INFO "\n", hcd_name);
pr_info("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
- sizeof (struct ed), sizeof (struct td));
+ sizeof(struct ed), sizeof(struct td));
#ifdef DEBUG
admhc_debug_root = debugfs_create_dir("admhc", NULL);
* ADM5120 Root Hub ... the nonsharable stuff
*/
-#define dbg_port(hc,label,num,value) \
+#define dbg_port(hc, label, num, value) \
admhc_dbg(hc, \
"%s port%d " \
"= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
(value & ADMHC_PS_CCS) ? " CCS" : "" \
);
-#define dbg_port_write(hc,label,num,value) \
+#define dbg_port_write(hc, label, num, value) \
admhc_dbg(hc, \
"%s port%d " \
"= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
/* init status */
status = admhc_read_rhdesc(ahcd);
if (status & (ADMHC_RH_LPSC | ADMHC_RH_OCIC))
- buf [0] = changed = 1;
+ buf[0] = changed = 1;
else
- buf [0] = 0;
+ buf[0] = 0;
if (ahcd->num_ports > 7) {
- buf [1] = 0;
+ buf[1] = 0;
length++;
}
| ADMHC_PS_OCIC | ADMHC_PS_PRSC)) {
changed = 1;
if (i < 7)
- buf [0] |= 1 << (i + 1);
+ buf[0] |= 1 << (i + 1);
else
- buf [1] |= 1 << (i - 7);
+ buf[1] |= 1 << (i - 7);
}
}
#define PORT_RESET_HW_MSEC 10
/* wrap-aware logic morphed from <linux/jiffies.h> */
-#define tick_before(t1,t2) ((s16)(((s16)(t1))-((s16)(t2))) < 0)
+#define tick_before(t1, t2) ((s16)(((s16)(t1)) - ((s16)(t2))) < 0)
/* called from some task, normally khubd */
static inline int admhc_port_reset(struct admhcd *ahcd, unsigned port)
#if 0
/* TODO: remove */
else if ((td->hwINFO & cpu_to_hc32(ahcd, TD_DONE)) != 0)
- admhc_dbg (ahcd, "no hash for td %p\n", td);
+ admhc_dbg(ahcd, "no hash for td %p\n", td);
#else
else if ((td->flags & TD_FLAG_DONE) != 0)
- admhc_dbg (ahcd, "no hash for td %p\n", td);
+ admhc_dbg(ahcd, "no hash for td %p\n", td);
#endif
dma_pool_free(ahcd->td_cache, td, td->td_dma);
}
}
#ifdef ADMHC_VERBOSE_DEBUG
- urb_print(ahcd, urb, "RET", usb_pipeout (urb->pipe), status);
+ urb_print(ahcd, urb, "RET", usb_pipeout(urb->pipe), status);
#endif
/* urb->complete() can reenter this HCD */
* that has enough bandwidth left unreserved.
*/
for (i = 0; i < interval ; i++) {
- if (branch < 0 || ahcd->load [branch] > ahcd->load [i]) {
+ if (branch < 0 || ahcd->load[branch] > ahcd->load[i]) {
int j;
/* usb 1.1 says 90% of one frame */
for (j = i; j < NUM_INTS; j += interval) {
- if ((ahcd->load [j] + load) > 900)
+ if ((ahcd->load[j] + load) > 900)
break;
}
if (j < NUM_INTS)
* into the schedule tree in the apppropriate place. most iso devices use
* 1msec periods, but that's not required.
*/
-static void periodic_link (struct admhcd *ahcd, struct ed *ed)
+static void periodic_link(struct admhcd *ahcd, struct ed *ed)
{
unsigned i;
- admhc_vdbg (ahcd, "link %sed %p branch %d [%dus.], interval %d\n",
+ admhc_vdbg(ahcd, "link %sed %p branch %d [%dus.], interval %d\n",
(ed->hwINFO & cpu_to_hc32(ahcd, ED_ISO)) ? "iso " : "",
ed, ed->branch, ed->load, ed->interval);
for (i = ed->branch; i < NUM_INTS; i += ed->interval) {
- struct ed **prev = &ahcd->periodic [i];
- __hc32 *prev_p = &ahcd->hcca->int_table [i];
+ struct ed **prev = &ahcd->periodic[i];
+ __hc32 *prev_p = &ahcd->hcca->int_table[i];
struct ed *here = *prev;
/* sorting each branch by period (slow before fast)
ed->ed_next = here;
if (here)
ed->hwNextED = *prev_p;
- wmb ();
+ wmb();
*prev = ed;
*prev_p = cpu_to_hc32(ahcd, ed->dma);
wmb();
}
- ahcd->load [i] += ed->load;
+ ahcd->load[i] += ed->load;
}
admhcd_to_hcd(ahcd)->self.bandwidth_allocated += ed->load / ed->interval;
}
#if 0 /* FIXME */
/* scan the periodic table to find and unlink this ED */
-static void periodic_unlink (struct admhcd *ahcd, struct ed *ed)
+static void periodic_unlink(struct admhcd *ahcd, struct ed *ed)
{
int i;
for (i = ed->branch; i < NUM_INTS; i += ed->interval) {
struct ed *temp;
- struct ed **prev = &ahcd->periodic [i];
- __hc32 *prev_p = &ahcd->hcca->int_table [i];
+ struct ed **prev = &ahcd->periodic[i];
+ __hc32 *prev_p = &ahcd->hcca->int_table[i];
while (*prev && (temp = *prev) != ed) {
prev_p = &temp->hwNextED;
*prev_p = ed->hwNextED;
*prev = ed->ed_next;
}
- ahcd->load [i] -= ed->load;
+ ahcd->load[i] -= ed->load;
}
admhcd_to_hcd(ahcd)->self.bandwidth_allocated -= ed->load / ed->interval;
- admhc_vdbg (ahcd, "unlink %sed %p branch %d [%dus.], interval %d\n",
+ admhc_vdbg(ahcd, "unlink %sed %p branch %d [%dus.], interval %d\n",
(ed->hwINFO & cpu_to_hc32(ahcd, ED_ISO)) ? "iso " : "",
ed, ed->branch, ed->load, ed->interval);
}
urb->iso_frame_desc[td->index].status = cc_to_error[cc];
if (cc != TD_CC_NOERROR)
- admhc_vdbg (ahcd,
+ admhc_vdbg(ahcd,
"urb %p iso td %p (%d) len %d cc %d\n",
urb, td, 1 + td->index, dlen, cc);
/* count all non-empty packets except control SETUP packet */
- if ((type != PIPE_CONTROL || td->index != 0) && tdDBP != 0) {
+ if ((type != PIPE_CONTROL || td->index != 0) && tdDBP != 0)
urb->actual_length += tdDBP - td->data_dma + bl;
- }
if (cc != TD_CC_NOERROR && cc < TD_CC_HCD0)
admhc_vdbg(ahcd,
break;
/* fallthrough */
default:
- admhc_dbg (ahcd,
+ admhc_dbg(ahcd,
"urb %p path %s ep%d%s %08x cc %d --> status %d\n",
urb, urb->dev->devpath,
usb_pipeendpoint (urb->pipe),
- usb_pipein (urb->pipe) ? "in" : "out",
+ usb_pipein(urb->pipe) ? "in" : "out",
hc32_to_cpu(ahcd, td->hwINFO),
- cc, cc_to_error [cc]);
+ cc, cc_to_error[cc]);
}
}
* frame counter wraps and EDs with partially retired TDs
*/
if (likely(HC_IS_RUNNING(admhcd_to_hcd(ahcd)->state))) {
- if (tick_before (tick, ed->tick)) {
+ if (tick_before(tick, ed->tick))
skip_ed:
last = &ed->ed_rm_next;
continue;
- }
#if 0
if (!list_empty(&ed->td_list)) {
struct td *td;
static void ed_unhalt(struct admhcd *ahcd, struct ed *ed, struct urb *urb)
{
- struct list_head *entry,*tmp;
+ struct list_head *entry, *tmp;
__hc32 toggle = ed->hwHeadP & cpu_to_hc32(ahcd, ED_C);
#ifdef ADMHC_VERBOSE_DEBUG
static void ed_update(struct admhcd *ahcd, struct ed *ed)
{
- struct list_head *entry,*tmp;
+ struct list_head *entry, *tmp;
#ifdef ADMHC_VERBOSE_DEBUG
admhc_dump_ed(ahcd, "UPDATE", ed, 1);
ed_unhalt(ahcd, ed, urb);
if (ed->type == PIPE_INTERRUPT)
- ed_intr_refill(ahcd,ed);
+ ed_intr_refill(ahcd, ed);
/* If all this urb's TDs are done, call complete() */
if (urb_priv->td_idx == urb_priv->td_cnt)
/* ... hc may need waking-up */
switch (ed->type) {
case PIPE_CONTROL:
- admhc_writel (ahcd, OHCI_CLF,
+ admhc_writel(ahcd, OHCI_CLF,
&ahcd->regs->cmdstatus);
break;
case PIPE_BULK:
- admhc_writel (ahcd, OHCI_BLF,
+ admhc_writel(ahcd, OHCI_BLF,
&ahcd->regs->cmdstatus);
break;
}
/* map OHCI TD status codes (CC) to errno values */
-static const int cc_to_error [16] = {
+static const int cc_to_error[16] = {
/* No Error */ 0,
/* CRC Error */ -EILSEQ,
/* Bit Stuff */ -EPROTO,
#define OHCI_QUIRK_BE_DESC 0x08 /* BE descriptors */
#define OHCI_QUIRK_BE_MMIO 0x10 /* BE registers */
#define OHCI_QUIRK_ZFMICRO 0x20 /* Compaq ZFMicro chipset*/
- // there are also chip quirks/bugs in init logic
+ /* there are also chip quirks/bugs in init logic */
#ifdef DEBUG
struct dentry *debug_dir;
#ifdef DEBUG
# define admhc_dbg(ahcd, fmt, args...) \
- printk(KERN_DEBUG "adm5120-hcd: " fmt , ## args )
+ printk(KERN_DEBUG "adm5120-hcd: " fmt, ## args)
#else
# define admhc_dbg(ahcd, fmt, args...) do { } while (0)
#endif
#define admhc_err(ahcd, fmt, args...) \
- printk(KERN_ERR "adm5120-hcd: " fmt , ## args )
+ printk(KERN_ERR "adm5120-hcd: " fmt, ## args)
#define admhc_info(ahcd, fmt, args...) \
- printk(KERN_INFO "adm5120-hcd: " fmt , ## args )
+ printk(KERN_INFO "adm5120-hcd: " fmt, ## args)
#define admhc_warn(ahcd, fmt, args...) \
- printk(KERN_WARNING "adm5120-hcd: " fmt , ## args )
+ printk(KERN_WARNING "adm5120-hcd: " fmt, ## args)
#ifdef ADMHC_VERBOSE_DEBUG
# define admhc_vdbg admhc_dbg
t |= ADMHC_HC_DMAE;
admhc_writel(ahcd, t, &ahcd->regs->host_control);
- admhc_vdbg(ahcd,"DMA enabled\n");
+ admhc_vdbg(ahcd, "DMA enabled\n");
}
static inline void admhc_dma_disable(struct admhcd *ahcd)
t &= ~ADMHC_HC_DMAE;
admhc_writel(ahcd, t, &ahcd->regs->host_control);
- admhc_vdbg(ahcd,"DMA disabled\n");
+ admhc_vdbg(ahcd, "DMA disabled\n");
}
#define NAME "adm5120_wdt"
#define VERSION "0.1"
-static int expect_close = 0;
-static int access = 0;
+static int expect_close;
+static int access;
static unsigned int timeout = DEFAULT_TIMEOUT;
static int nowayout = WATCHDOG_NOWAYOUT;
if (access)
return -EBUSY;
- if (nowayout) {
+ if (nowayout)
__module_get(THIS_MODULE);
- }
/* Activate timer */
wdt_reset_counter();
static int wdt_release(struct inode *inode, struct file *file)
{
/*
- * Shut off the timer.
- * Lock it in if it's a module and we set nowayout
+ * Shut off the timer.
+ * Lock it in if it's a module and we set nowayout
*/
if (expect_close && (nowayout == 0)) {
wdt_disable();
printk(KERN_INFO NAME ": disabling watchdog timer\n");
module_put(THIS_MODULE);
- } else {
+ } else
printk(KERN_CRIT NAME ": device closed unexpectedly. WDT will not stop!\n");
- }
+
access = 0;
return 0;
}
.identity = "ADM5120_WDT Watchdog",
};
switch (cmd) {
- default:
- return -ENOTTY;
- case WDIOC_GETSUPPORT:
- if(copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident)))
- return -EFAULT;
- return 0;
- case WDIOC_GETSTATUS:
- case WDIOC_GETBOOTSTATUS:
- return put_user(0,(int *)arg);
- case WDIOC_KEEPALIVE:
- wdt_reset_counter();
- return 0;
- case WDIOC_SETTIMEOUT:
- if (get_user(new_timeout, (int *)arg))
- return -EFAULT;
- if (new_timeout < 1)
- return -EINVAL;
- if (new_timeout > MAX_TIMEOUT)
- return -EINVAL;
- timeout = new_timeout;
- wdt_set_timeout();
- /* Fall */
- case WDIOC_GETTIMEOUT:
- return put_user(timeout, (int *)arg);
+ default:
+ return -ENOTTY;
+ case WDIOC_GETSUPPORT:
+ if (copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident)))
+ return -EFAULT;
+ return 0;
+ case WDIOC_GETSTATUS:
+ case WDIOC_GETBOOTSTATUS:
+ return put_user(0, (int *)arg);
+ case WDIOC_KEEPALIVE:
+ wdt_reset_counter();
+ return 0;
+ case WDIOC_SETTIMEOUT:
+ if (get_user(new_timeout, (int *)arg))
+ return -EFAULT;
+ if (new_timeout < 1)
+ return -EINVAL;
+ if (new_timeout > MAX_TIMEOUT)
+ return -EINVAL;
+ timeout = new_timeout;
+ wdt_set_timeout();
+ /* Fall */
+ case WDIOC_GETTIMEOUT:
+ return put_user(timeout, (int *)arg);
}
}
-static struct file_operations wdt_fops = {
- owner: THIS_MODULE,
- llseek: no_llseek,
- write: wdt_write,
- ioctl: wdt_ioctl,
- open: wdt_open,
- release: wdt_release,
+static const struct file_operations wdt_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .write = wdt_write,
+ .ioctl = wdt_ioctl,
+ .open = wdt_open,
+ .release = wdt_release,
};
static struct miscdevice wdt_miscdev = {
- minor: WATCHDOG_MINOR,
- name: "watchdog",
- fops: &wdt_fops,
+ .minor = WATCHDOG_MINOR,
+ .name = "watchdog",
+ .fops = &wdt_fops,
};
static char banner[] __initdata = KERN_INFO NAME ": Watchdog Timer version " VERSION "\n";
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
-@@ -602,6 +602,10 @@ config MIPS_AU1X00_ENET
+@@ -479,6 +479,10 @@ config MIPS_AU1X00_ENET
If you have an Alchemy Semi AU1X00 based system
say Y. Otherwise, say N.
depends on PCI && SGI_IP27
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
-@@ -208,6 +208,7 @@ obj-$(CONFIG_SC92031) += sc92031.o
+@@ -207,6 +207,7 @@ obj-$(CONFIG_SC92031) += sc92031.o
# This is also a 82596 and should probably be merged
obj-$(CONFIG_LP486E) += lp486e.o
#define admhc_dbg_sw(ahcd, next, size, format, arg...) \
do { \
-- if (next) { \
-+ if (next != NULL) { \
- unsigned s_len; \
- s_len = scnprintf(*next, *size, format, ## arg ); \
- *size -= s_len; *next += s_len; \
+- if (next) { \
++ if (next != NULL) { \
+ unsigned s_len; \
+ s_len = scnprintf(*next, *size, format, ## arg); \
+ *size -= s_len; *next += s_len; \
--- a/drivers/usb/host/adm5120-dbg.c
+++ b/drivers/usb/host/adm5120-dbg.c
-@@ -642,7 +642,7 @@ static ssize_t fill_registers_buffer(str
+@@ -644,7 +644,7 @@ static ssize_t fill_registers_buffer(str
hcd->product_desc,
hcd_name);
struct admhcd *ahcd;
struct ed **seen, *ed;
unsigned long flags;
-@@ -529,9 +523,7 @@ static ssize_t fill_periodic_buffer(stru
+@@ -530,9 +524,7 @@ static ssize_t fill_periodic_buffer(stru
return 0;
seen_count = 0;
next = buf->page;
size = PAGE_SIZE;
-@@ -613,7 +605,6 @@ static ssize_t fill_periodic_buffer(stru
+@@ -615,7 +607,6 @@ static ssize_t fill_periodic_buffer(stru
static ssize_t fill_registers_buffer(struct debug_buffer *buf)
{
struct usb_hcd *hcd;
struct admhcd *ahcd;
struct admhcd_regs __iomem *regs;
-@@ -622,9 +613,8 @@ static ssize_t fill_registers_buffer(str
+@@ -624,9 +615,8 @@ static ssize_t fill_registers_buffer(str
char *next;
u32 rdata;
regs = ahcd->regs;
next = buf->page;
size = PAGE_SIZE;
-@@ -689,7 +679,7 @@ done:
+@@ -691,7 +681,7 @@ done:
}
ssize_t (*fill_func)(struct debug_buffer *))
{
struct debug_buffer *buf;
-@@ -697,7 +687,7 @@ static struct debug_buffer *alloc_buffer
+@@ -699,7 +689,7 @@ static struct debug_buffer *alloc_buffer
buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
if (buf) {
buf->fill_func = fill_func;
mutex_init(&buf->mutex);
}
-@@ -790,26 +780,25 @@ static int debug_registers_open(struct i
+@@ -792,26 +782,25 @@ static int debug_registers_open(struct i
static inline void create_debug_files(struct admhcd *ahcd)
{
struct usb_bus *bus = &admhcd_to_hcd(ahcd)->self;
static struct cfi_fixup cfi_fixup_table[] = {
{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri },
#ifdef AMD_BOOTLOC_BUG
-@@ -385,6 +426,9 @@ static struct cfi_fixup fixup_table[] =
+@@ -385,6 +426,9 @@ static struct cfi_fixup fixup_table[] =
*/
{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip },
{ CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock },
}
static void
-@@ -576,8 +575,8 @@ pl010_console_write(struct console *co,
+@@ -576,8 +575,8 @@ pl010_console_write(struct console *co,
/*
* First save the CR then disable the interrupts
*/
uart_console_write(&uap->port, s, count, pl010_console_putchar);
-@@ -586,10 +585,10 @@ pl010_console_write(struct console *co,
+@@ -586,10 +585,10 @@ pl010_console_write(struct console *co,
* and restore the TCR
*/
do {
#define admhc_dbg_sw(ahcd, next, size, format, arg...) \
do { \
-- if (next) { \
-+ if (next != NULL) { \
- unsigned s_len; \
- s_len = scnprintf(*next, *size, format, ## arg ); \
- *size -= s_len; *next += s_len; \
+- if (next) { \
++ if (next != NULL) { \
+ unsigned s_len; \
+ s_len = scnprintf(*next, *size, format, ## arg); \
+ *size -= s_len; *next += s_len; \
--- a/drivers/usb/host/adm5120-dbg.c
+++ b/drivers/usb/host/adm5120-dbg.c
-@@ -642,7 +642,7 @@ static ssize_t fill_registers_buffer(str
+@@ -644,7 +644,7 @@ static ssize_t fill_registers_buffer(str
hcd->product_desc,
hcd_name);
spin_lock_irqsave(&ahcd->lock, flags);
temp = show_list(ahcd, buf->page, PAGE_SIZE, ahcd->ed_head);
-@@ -516,8 +512,6 @@ static ssize_t fill_async_buffer(struct
+@@ -516,8 +512,6 @@ static ssize_t fill_async_buffer(struct
static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
{
struct admhcd *ahcd;
struct ed **seen, *ed;
unsigned long flags;
-@@ -529,9 +523,7 @@ static ssize_t fill_periodic_buffer(stru
+@@ -530,9 +524,7 @@ static ssize_t fill_periodic_buffer(stru
return 0;
seen_count = 0;
next = buf->page;
size = PAGE_SIZE;
-@@ -613,7 +605,6 @@ static ssize_t fill_periodic_buffer(stru
+@@ -615,7 +607,6 @@ static ssize_t fill_periodic_buffer(stru
static ssize_t fill_registers_buffer(struct debug_buffer *buf)
{
struct usb_hcd *hcd;
struct admhcd *ahcd;
struct admhcd_regs __iomem *regs;
-@@ -622,9 +613,8 @@ static ssize_t fill_registers_buffer(str
+@@ -624,9 +615,8 @@ static ssize_t fill_registers_buffer(str
char *next;
u32 rdata;
regs = ahcd->regs;
next = buf->page;
size = PAGE_SIZE;
-@@ -689,7 +679,7 @@ done:
+@@ -691,7 +681,7 @@ done:
}
ssize_t (*fill_func)(struct debug_buffer *))
{
struct debug_buffer *buf;
-@@ -697,7 +687,7 @@ static struct debug_buffer *alloc_buffer
+@@ -699,7 +689,7 @@ static struct debug_buffer *alloc_buffer
buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
if (buf) {
buf->fill_func = fill_func;
mutex_init(&buf->mutex);
}
-@@ -790,26 +780,25 @@ static int debug_registers_open(struct i
+@@ -792,26 +782,25 @@ static int debug_registers_open(struct i
static inline void create_debug_files(struct admhcd *ahcd)
{
struct usb_bus *bus = &admhcd_to_hcd(ahcd)->self;
#define NO_IRQ (-1)
--- a/drivers/watchdog/adm5120_wdt.c
+++ b/drivers/watchdog/adm5120_wdt.c
-@@ -167,7 +167,7 @@ static struct file_operations wdt_fops =
- owner: THIS_MODULE,
- llseek: no_llseek,
- write: wdt_write,
-- ioctl: wdt_ioctl,
-+ unlocked_ioctl: wdt_ioctl,
- open: wdt_open,
- release: wdt_release,
+@@ -166,7 +166,7 @@ static const struct file_operations wdt_
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .write = wdt_write,
+- .ioctl = wdt_ioctl,
++ .unlocked_ioctl = wdt_ioctl,
+ .open = wdt_open,
+ .release = wdt_release,
};
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
projects / openwrt.git / commitdiff