+@@ -91,6 +119,9 @@
+ */
+ static inline void protected_writeback_dcache_line(unsigned long addr)
+ {
++#ifdef CONFIG_BCM4710
++ BCM4710_DUMMY_RREG();
++#endif
+ __asm__ __volatile__(
+ ".set noreorder\n\t"
+ ".set mips3\n"
+@@ -148,8 +179,12 @@
+ unsigned long ws, addr;
+
+ for (ws = 0; ws < ws_end; ws += ws_inc)
+- for (addr = start; addr < end; addr += 0x200)
++ for (addr = start; addr < end; addr += 0x200) {
++#ifdef CONFIG_BCM4710
++ BCM4710_DUMMY_RREG();
++#endif
+ cache16_unroll32(addr|ws,Index_Writeback_Inv_D);
++ }
+ }
+
+ static inline void blast_dcache16_page(unsigned long page)
+@@ -158,6 +193,9 @@
+ unsigned long end = start + PAGE_SIZE;
+
+ do {
++#ifdef CONFIG_BCM4710
++ BCM4710_DUMMY_RREG();
++#endif
+ cache16_unroll32(start,Hit_Writeback_Inv_D);
+ start += 0x200;
+ } while (start < end);
+@@ -173,8 +211,12 @@
+ unsigned long ws, addr;
+
+ for (ws = 0; ws < ws_end; ws += ws_inc)
+- for (addr = start; addr < end; addr += 0x200)
++ for (addr = start; addr < end; addr += 0x200) {
++#ifdef CONFIG_BCM4710
++ BCM4710_DUMMY_RREG();
++#endif
+ cache16_unroll32(addr|ws,Index_Writeback_Inv_D);
++ }
+ }
+
+ static inline void blast_icache16(void)
+@@ -196,7 +238,13 @@