ath5k: disable the 32 khz sleep clock, atheros also does this, might improve stability
authornbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sun, 3 Jul 2011 01:08:35 +0000 (01:08 +0000)
committernbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sun, 3 Jul 2011 01:08:35 +0000 (01:08 +0000)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27366 3c298f89-4303-0410-b956-a3cf2f4a3e73

package/mac80211/patches/446-ath5k_disable_32khz_clock.patch [new file with mode: 0644]

diff --git a/package/mac80211/patches/446-ath5k_disable_32khz_clock.patch b/package/mac80211/patches/446-ath5k_disable_32khz_clock.patch
new file mode 100644 (file)
index 0000000..21bf037
--- /dev/null
@@ -0,0 +1,18 @@
+--- a/drivers/net/wireless/ath/ath5k/reset.c
++++ b/drivers/net/wireless/ath/ath5k/reset.c
+@@ -1287,15 +1287,6 @@ int ath5k_hw_reset(struct ath5k_hw *ah, 
+        */
+       ath5k_hw_dma_init(ah);
+-
+-      /* Enable 32KHz clock function for AR5212+ chips
+-       * Set clocks to 32KHz operation and use an
+-       * external 32KHz crystal when sleeping if one
+-       * exists */
+-      if (ah->ah_version == AR5K_AR5212 &&
+-          op_mode != NL80211_IFTYPE_AP)
+-              ath5k_hw_set_sleep_clock(ah, true);
+-
+       /*
+        * Disable beacons and reset the TSF
+        */
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