-diff -urN linux.old/include/asm-mips/ar7/sangam_boards.h linux.dev/include/asm-mips/ar7/sangam_boards.h
---- linux.old/include/asm-mips/ar7/sangam_boards.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/include/asm-mips/ar7/sangam_boards.h 2005-07-12 02:59:26.201667160 +0200
-@@ -0,0 +1,77 @@
-+#ifndef _SANGAM_BOARDS_H
-+#define _SANGAM_BOARDS_H
-+
-+// Let us define board specific information here.
-+
-+
-+#if defined(CONFIG_AR7DB)
-+
-+#define AFECLK_FREQ 35328000
-+#define REFCLK_FREQ 25000000
-+#define OSC3_FREQ 24000000
-+#define AVALANCHE_LOW_CPMAC_PHY_MASK 0x80000000
-+#define AVALANCHE_HIGH_CPMAC_PHY_MASK 0x55555555
-+#define AVALANCHE_LOW_CPMAC_MDIX_MASK 0x80000000
-+
-+#endif
-+
-+
-+#if defined(CONFIG_AR7RD)
-+#define AFECLK_FREQ 35328000
-+#define REFCLK_FREQ 25000000
-+#define OSC3_FREQ 24000000
-+#define AVALANCHE_LOW_CPMAC_PHY_MASK 0x80000000
-+#define AVALANCHE_HIGH_CPMAC_PHY_MASK 0x2
-+#define AVALANCHE_LOW_CPMAC_MDIX_MASK 0x80000000
-+#endif
-+
-+
-+#if defined(CONFIG_AR7WI)
-+#define AFECLK_FREQ 35328000
-+#define REFCLK_FREQ 25000000
-+#define OSC3_FREQ 24000000
-+#define AVALANCHE_LOW_CPMAC_PHY_MASK 0x80000000
-+#define AVALANCHE_HIGH_CPMAC_PHY_MASK 0x2
-+#define AVALANCHE_LOW_CPMAC_MDIX_MASK 0x80000000
-+#endif
-+
-+
-+#if defined(CONFIG_AR7V)
-+#define AFECLK_FREQ 35328000
-+#define REFCLK_FREQ 25000000
-+#define OSC3_FREQ 24000000
-+#define AVALANCHE_LOW_CPMAC_PHY_MASK 0x80000000
-+#define AVALANCHE_HIGH_CPMAC_PHY_MASK 0x2
-+#define AVALANCHE_LOW_CPMAC_MDIX_MASK 0x80000000
-+#endif
-+
-+
-+#if defined(CONFIG_AR7WRD)
-+#define AFECLK_FREQ 35328000
-+#define REFCLK_FREQ 25000000
-+#define OSC3_FREQ 24000000
-+#define AVALANCHE_LOW_CPMAC_PHY_MASK 0x80000000
-+#define AVALANCHE_HIGH_CPMAC_PHY_MASK 0x00010000
-+#define AVALANCHE_LOW_CPMAC_MDIX_MASK 0x80000000
-+#endif
-+
-+
-+#if defined(CONFIG_AR7VWI)
-+#define AFECLK_FREQ 35328000
-+#define REFCLK_FREQ 25000000
-+#define OSC3_FREQ 24000000
-+#define AVALANCHE_LOW_CPMAC_PHY_MASK 0x80000000
-+#define AVALANCHE_HIGH_CPMAC_PHY_MASK 0x00010000
-+#define AVALANCHE_LOW_CPMAC_MDIX_MASK 0x80000000
-+#endif
-+
-+
-+#if defined CONFIG_SEAD2
-+#define AVALANCHE_LOW_CPMAC_PHY_MASK 0xAAAAAAAA
-+#define AVALANCHE_HIGH_CPMAC_PHY_MASK 0x55555555
-+#define AVALANCHE_LOW_CPMAC_MDIX_MASK 0
-+#include <asm/mips-boards/sead.h>
-+#endif
-+
-+
-+#endif