CFLAGS:=-Os -pipe -mips32r2 -mtune=mips32r2 -fno-caller-saves
FEATURES:=squashfs
-LINUX_VERSION:=2.6.36.4
+LINUX_VERSION:=2.6.37.4
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES+=kmod-leds-gpio wpad-mini
--- /dev/null
+--- a/arch/mips/kernel/traps.c
++++ b/arch/mips/kernel/traps.c
+@@ -54,6 +54,7 @@
+ #include <asm/types.h>
+ #include <asm/stacktrace.h>
+ #include <asm/uasm.h>
++#include <asm/time.h>
+
+ extern void check_wait(void);
+ extern asmlinkage void r4k_wait(void);
+@@ -1578,6 +1579,8 @@ void __cpuinit per_cpu_trap_init(void)
+ if (cpu_has_mips_r2) {
+ cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
+ cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
++ if (get_c0_compare_irq)
++ cp0_compare_irq = get_c0_compare_irq();
+ cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
+ if (cp0_perfcount_irq == cp0_compare_irq)
+ cp0_perfcount_irq = -1;
+--- a/arch/mips/include/asm/time.h
++++ b/arch/mips/include/asm/time.h
+@@ -52,6 +52,7 @@ extern int (*perf_irq)(void);
+ */
+ #ifdef CONFIG_CEVT_R4K_LIB
+ extern unsigned int __weak get_c0_compare_int(void);
++extern unsigned int __weak get_c0_compare_irq(void);
+ extern int r4k_clockevent_init(void);
+ #endif
+
--- /dev/null
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -1640,7 +1640,7 @@ static int __xipram do_erase_chip(struct
+ chip->erase_suspended = 0;
+ }
+
+- if (chip_ready(map, adr))
++ if (chip_good(map, adr, map_word_ff(map)))
+ break;
+
+ if (time_after(jiffies, timeo)) {
+@@ -1728,7 +1728,7 @@ static int __xipram do_erase_oneblock(st
+ chip->erase_suspended = 0;
+ }
+
+- if (chip_ready(map, adr)) {
++ if (chip_good(map, adr, map_word_ff(map))) {
+ xip_enable(map, chip, adr);
+ break;
+ }
--- /dev/null
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -158,6 +158,26 @@ cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -W
+ endif
+ cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1
+
++#
++# Ralink SoC common stuff
++#
++core-$(CONFIG_MIPS_RALINK) += arch/mips/ralink/common/
++cflags-$(CONFIG_MIPS_RALINK) += -I$(srctree)/arch/mips/include/asm/mach-ralink
++
++#
++# Ralink RT288x
++#
++core-$(CONFIG_RALINK_RT288X) += arch/mips/ralink/rt288x/
++cflags-$(CONFIG_RALINK_RT288X) += -I$(srctree)//arch/mips/include/asm/mach-ralink/rt288x
++load-$(CONFIG_RALINK_RT288X) += 0xffffffff88000000
++
++#
++# Ralink RT305x
++#
++core-$(CONFIG_RALINK_RT305X) += arch/mips/ralink/rt305x/
++cflags-$(CONFIG_RALINK_RT305X) += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt305x
++load-$(CONFIG_RALINK_RT305X) += 0xffffffff80000000
++
+ cflags-$(CONFIG_CPU_R4000_WORKAROUNDS) += $(call cc-option,-mfix-r4000,)
+ cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += $(call cc-option,-mfix-r4400,)
+ cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS) += $(call cc-option,-mno-daddi,)
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -65,6 +65,9 @@ config AR7
+ Support for the Texas Instruments AR7 System-on-a-Chip
+ family: TNETD7100, 7200 and 7300.
+
++config MIPS_RALINK
++ bool "Ralink MIPS SoC based boards"
++
+ config BCM47XX
+ bool "Broadcom BCM47XX based boards"
+ select CEVT_R4K
+@@ -722,6 +725,7 @@ source "arch/mips/jazz/Kconfig"
+ source "arch/mips/jz4740/Kconfig"
+ source "arch/mips/lasat/Kconfig"
+ source "arch/mips/pmc-sierra/Kconfig"
++source "arch/mips/ralink/Kconfig"
+ source "arch/mips/powertv/Kconfig"
+ source "arch/mips/sgi-ip27/Kconfig"
+ source "arch/mips/sibyte/Kconfig"
+@@ -1081,7 +1085,7 @@ config BOOT_ELF32
+
+ config MIPS_L1_CACHE_SHIFT
+ int
+- default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
++ default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL || RALINK_RT288X
+ default "6" if MIPS_CPU_SCACHE
+ default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
+ default "5"
--- /dev/null
+--- a/drivers/serial/8250.c
++++ b/drivers/serial/8250.c
+@@ -305,9 +305,9 @@ static const struct serial8250_config ua
+ },
+ };
+
+-#if defined(CONFIG_MIPS_ALCHEMY)
++#if defined(CONFIG_MIPS_ALCHEMY) || defined (CONFIG_SERIAL_8250_RT288X)
+
+-/* Au1x00 UART hardware has a weird register layout */
++/* Au1x00 and RT288x UART hardware has a weird register layout */
+ static const u8 au_io_in_map[] = {
+ [UART_RX] = 0,
+ [UART_IER] = 2,
+@@ -571,8 +571,8 @@ static inline void _serial_dl_write(stru
+ serial_outp(up, UART_DLM, value >> 8 & 0xff);
+ }
+
+-#if defined(CONFIG_MIPS_ALCHEMY)
+-/* Au1x00 haven't got a standard divisor latch */
++#if defined(CONFIG_MIPS_ALCHEMY) || defined (CONFIG_SERIAL_8250_RT288X)
++/* Au1x00 and RT288x haven't got a standard divisor latch */
+ static int serial_dl_read(struct uart_8250_port *up)
+ {
+ if (up->port.iotype == UPIO_AU)
+@@ -779,22 +779,19 @@ static int size_fifo(struct uart_8250_po
+ */
+ static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
+ {
+- unsigned char old_dll, old_dlm, old_lcr;
++ unsigned char old_lcr;
++ unsigned int old_dl;
+ unsigned int id;
+
+ old_lcr = serial_inp(p, UART_LCR);
+ serial_outp(p, UART_LCR, UART_LCR_DLAB);
+
+- old_dll = serial_inp(p, UART_DLL);
+- old_dlm = serial_inp(p, UART_DLM);
++ old_dl = serial_dl_read(p);
+
+- serial_outp(p, UART_DLL, 0);
+- serial_outp(p, UART_DLM, 0);
++ serial_dl_write(p, 0);
++ id = serial_dl_read(p);
+
+- id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
+-
+- serial_outp(p, UART_DLL, old_dll);
+- serial_outp(p, UART_DLM, old_dlm);
++ serial_dl_write(p, old_dl);
+ serial_outp(p, UART_LCR, old_lcr);
+
+ return id;
+--- a/drivers/serial/Kconfig
++++ b/drivers/serial/Kconfig
+@@ -258,6 +258,14 @@ config SERIAL_8250_ACORN
+ system, say Y to this option. The driver can handle 1, 2, or 3 port
+ cards. If unsure, say N.
+
++config SERIAL_8250_RT288X
++ bool "Ralink RT288x/RT305x serial port support"
++ depends on SERIAL_8250 != n && (SOC_RT288X || SOC_RT305X)
++ help
++ If you have a Ralink RT288x/RT305x SoC based board and want to use the
++ serial port, say Y to this option. The driver can handle up to 2 serial
++ ports. If unsure, say N.
++
+ config SERIAL_8250_RM9K
+ bool "Support for MIPS RM9xxx integrated serial port"
+ depends on SERIAL_8250 != n && SERIAL_RM9000
+--- a/include/linux/serial_core.h
++++ b/include/linux/serial_core.h
+@@ -307,7 +307,7 @@ struct uart_port {
+ #define UPIO_HUB6 (1)
+ #define UPIO_MEM (2)
+ #define UPIO_MEM32 (3)
+-#define UPIO_AU (4) /* Au1x00 type IO */
++#define UPIO_AU (4) /* Au1x00 and RT288x type IO */
+ #define UPIO_TSI (5) /* Tsi108/109 type IO */
+ #define UPIO_DWAPB (6) /* DesignWare APB UART */
+ #define UPIO_RM9000 (7) /* RM9000 type IO */
--- /dev/null
+--- a/arch/mips/pci/Makefile
++++ b/arch/mips/pci/Makefile
+@@ -55,6 +55,7 @@ obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capc
+ obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
+ obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
+ obj-$(CONFIG_CPU_CAVIUM_OCTEON) += pci-octeon.o pcie-octeon.o
++obj-$(CONFIG_SOC_RT288X) += pci-rt288x.o
+
+ ifdef CONFIG_PCI_MSI
+ obj-$(CONFIG_CPU_CAVIUM_OCTEON) += msi-octeon.o
--- /dev/null
+--- a/drivers/net/Kconfig
++++ b/drivers/net/Kconfig
+@@ -494,6 +494,12 @@ config MIPS_AU1X00_ENET
+ If you have an Alchemy Semi AU1X00 based system
+ say Y. Otherwise, say N.
+
++config MIPS_RAMIPS_NET
++ tristate "Ethernet driver for rt288x/rt305x"
++ depends on MIPS_RALINK
++ help
++ This driver supports the etehrnet mac inside the ralink wisocs
++
+ config SGI_IOC3_ETH
+ bool "SGI IOC3 Ethernet"
+ depends on PCI && SGI_IP27
+--- a/drivers/net/Makefile
++++ b/drivers/net/Makefile
+@@ -225,6 +225,7 @@ obj-$(CONFIG_KORINA) += korina.o
+ obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o
+ obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o
+ obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o
++obj-$(CONFIG_MIPS_RAMIPS_NET) += ramips.o
+ obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o
+ obj-$(CONFIG_DECLANCE) += declance.o
+ obj-$(CONFIG_ATARILANCE) += atarilance.o
--- /dev/null
+--- a/drivers/watchdog/Kconfig
++++ b/drivers/watchdog/Kconfig
+@@ -930,6 +930,13 @@ config BCM63XX_WDT
+ To compile this driver as a loadable module, choose M here.
+ The module will be called bcm63xx_wdt.
+
++config RAMIPS_WDT
++ tristate "Ralink RT288X/RT305X Watchdog Timer"
++ depends on SOC_RT288X || SOC_RT305X
++ help
++ Hardware driver for the built-in watchdog timer on the
++ Ralink RT288X/RT305X SoCs.
++
+ # PARISC Architecture
+
+ # POWERPC Architecture
+--- a/drivers/watchdog/Makefile
++++ b/drivers/watchdog/Makefile
+@@ -119,6 +119,7 @@ obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
+ obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
+ obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
+ octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
++obj-$(CONFIG_RAMIPS_WDT) += ramips_wdt.o
+
+ # PARISC Architecture
+
--- /dev/null
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_AUTO_IRQ_AFFINITY is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CMDLINE="console=ttyS1,57600 rootfstype=squashfs,jffs2"
+CONFIG_CMDLINE_BOOL=y
+# CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS32_R1 is not set
+CONFIG_CPU_MIPS32_R2=y
+CONFIG_CPU_MIPSR2=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CSRC_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_FSNOTIFY is not set
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED is not set
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+# CONFIG_GENERIC_PENDING_IRQ is not set
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_HARDIRQS_SW_RESEND is not set
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+# CONFIG_HAVE_SPARSE_IRQ is not set
+CONFIG_HW_HAS_PCI=y
+CONFIG_HW_RANDOM=m
+CONFIG_IMAGE_CMDLINE_HACK=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQ_CPU=y
+# CONFIG_IRQ_PER_CPU is not set
+# CONFIG_LEDS_GPIO is not set
+CONFIG_LOONGSON_UART_BASE=y
+CONFIG_MACH_NO_WESTBRIDGE=y
+# CONFIG_MII is not set
+CONFIG_MIPS=y
+CONFIG_MIPS_L1_CACHE_SHIFT=4
+CONFIG_MIPS_MACHINE=y
+CONFIG_MIPS_MT_DISABLED=y
+CONFIG_MIPS_RALINK=y
+CONFIG_MIPS_RAMIPS_NET=y
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PHYLIB=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_RALINK_DEV_GPIO_BUTTONS=y
+CONFIG_RALINK_DEV_GPIO_LEDS=y
+CONFIG_RALINK_RT288X=y
+# CONFIG_RALINK_RT305X is not set
+CONFIG_RAMIPS_WDT=y
+CONFIG_RT288X_MACH_RT_N15=y
+CONFIG_RT288X_MACH_WZR_AGL300NH=y
+CONFIG_RTL8366S_PHY=y
+CONFIG_RTL8366_SMI=y
+# CONFIG_SCSI_DMA is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RT288X=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+CONFIG_SOC_RT288X=y
+CONFIG_SWCONFIG=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_CPU_MIPS32_R2=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_USB_SUPPORT=y
+CONFIG_ZONE_DMA_FLAG=0
--- /dev/null
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_AUTO_IRQ_AFFINITY is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CMDLINE="console=ttyS1,57600 rootfstype=squashfs,jffs2"
+CONFIG_CMDLINE_BOOL=y
+# CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS32_R1 is not set
+CONFIG_CPU_MIPS32_R2=y
+CONFIG_CPU_MIPSR2=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CSRC_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_FSNOTIFY is not set
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED is not set
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+# CONFIG_GENERIC_PENDING_IRQ is not set
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_HARDIRQS_SW_RESEND is not set
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+# CONFIG_HAVE_SPARSE_IRQ is not set
+CONFIG_HW_RANDOM=m
+CONFIG_IMAGE_CMDLINE_HACK=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQ_CPU=y
+# CONFIG_IRQ_PER_CPU is not set
+# CONFIG_LEDS_GPIO is not set
+CONFIG_LOONGSON_UART_BASE=y
+CONFIG_MACH_NO_WESTBRIDGE=y
+# CONFIG_MII is not set
+CONFIG_MIPS=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_MIPS_MACHINE=y
+CONFIG_MIPS_MT_DISABLED=y
+CONFIG_MIPS_RALINK=y
+CONFIG_MIPS_RAMIPS_NET=y
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PHYLIB=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_RALINK_DEV_GPIO_BUTTONS=y
+CONFIG_RALINK_DEV_GPIO_LEDS=y
+# CONFIG_RALINK_RT288X is not set
+CONFIG_RALINK_RT305X=y
+CONFIG_RAMIPS_WDT=y
+CONFIG_RT305X_MACH_DIR_300_REVB=y
+CONFIG_RT305X_MACH_F5D8235_V2=y
+CONFIG_RT305X_MACH_FONERA20N=y
+CONFIG_RT305X_MACH_HW550_3G=y
+CONFIG_RT305X_MACH_PWH2004=y
+CONFIG_RT305X_MACH_V22RW_2X2=y
+CONFIG_RT305X_MACH_WCR150GN=y
+CONFIG_RT305X_MACH_WHR_G300N=y
+# CONFIG_SCSI_DMA is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RT288X=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+CONFIG_SOC_RT305X=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_CPU_MIPS32_R2=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_ZONE_DMA_FLAG=0
projects / openwrt.git / commitdiff