add usb controller definition
authorejka <ejka@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Mon, 1 Oct 2007 12:35:35 +0000 (12:35 +0000)
committerejka <ejka@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Mon, 1 Oct 2007 12:35:35 +0000 (12:35 +0000)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9087 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/ar7/files/arch/mips/ar7/platform.c
target/linux/ar7/files/include/asm-mips/ar7/ar7.h

index 1671be1..f3a9372 100644 (file)
@@ -180,6 +180,27 @@ static struct resource vlynq_high_res[] = {
        },
 };
 
+static struct resource usb_res[] = {
+       {
+               .name = "regs",
+               .flags = IORESOURCE_MEM,
+               .start = AR7_REGS_USB,
+               .end = AR7_REGS_USB + 0xff,
+       },
+       {
+               .name = "irq",
+               .flags = IORESOURCE_IRQ,
+               .start = 32,
+               .end = 32,
+       },
+       {
+               .name = "mem",
+               .flags = IORESOURCE_MEM,
+               .start = 0x03400000,
+               .end = 0x034001fff,
+       },
+};
+
 static struct physmap_flash_data physmap_flash_data = {
        .width = 2,
 };
@@ -331,6 +352,13 @@ static struct platform_device ar7_gpio_leds = {
 };
 #endif
 
+static struct platform_device ar7_udc = {
+       .id = -1,
+       .name = "ar7_udc",
+       .resource = usb_res,
+       .num_resources = ARRAY_SIZE(usb_res),
+};
+
 static inline unsigned char char2hex(char h)
 {
        switch (h) {
@@ -454,6 +482,11 @@ static int __init ar7_register_devices(void)
        ar7_led_data.leds = default_leds;
        res = platform_device_register(&ar7_gpio_leds);
 #endif
+       if (res)
+               return res;
+
+       res = platform_device_register(&ar7_udc);
+
        return res;
 }
 
index 89e8b30..9592f63 100644 (file)
@@ -30,6 +30,7 @@
 /* 0x08610A00 - 0x08610BFF (512 bytes, 128 bytes / clock) */
 #define AR7_REGS_POWER (AR7_REGS_BASE + 0x0a00)
 #define AR7_REGS_UART0 (AR7_REGS_BASE + 0x0e00)
+#define AR7_REGS_USB   (AR7_REGS_BASE + 0x1200)
 #define AR7_REGS_RESET (AR7_REGS_BASE + 0x1600)
 #define AR7_REGS_VLYNQ0        (AR7_REGS_BASE + 0x1800)
 #define AR7_REGS_DCL   (AR7_REGS_BASE + 0x1a00)
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