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split b44 patch, fix compile warning in b44.h
authorwbx <wbx@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Fri, 16 Sep 2005 10:13:31 +0000 (10:13 +0000)
committerwbx <wbx@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Fri, 16 Sep 2005 10:13:31 +0000 (10:13 +0000)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk/openwrt@1932 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/linux-2.6/patches/brcm/001-bcm947xx.patch patch | blob | history
target/linux/linux-2.6/patches/generic/003-net-b44.patch [new file with mode: 0644] patch | blob

diff --git a/target/linux/linux-2.6/patches/brcm/001-bcm947xx.patch b/target/linux/linux-2.6/patches/brcm/001-bcm947xx.patch
index 649028d..65336bf 100644 (file)
--- a/target/linux/linux-2.6/patches/brcm/001-bcm947xx.patch
+++ b/target/linux/linux-2.6/patches/brcm/001-bcm947xx.patch
@@ -1,6 +1,6 @@
 diff -Nur linux-2.6.12.5/arch/mips/Kconfig linux-2.6.12.5-brcm/arch/mips/Kconfig
 --- linux-2.6.12.5/arch/mips/Kconfig   2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/arch/mips/Kconfig      2005-09-03 21:53:36.323284896 +0200
++++ linux-2.6.12.5-brcm/arch/mips/Kconfig      2005-09-16 10:29:18.135597872 +0200
 @@ -40,6 +40,15 @@
         Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
         Olivetti M700-10 workstations.
@@ -28,7 +28,7 @@ diff -Nur linux-2.6.12.5/arch/mips/Kconfig linux-2.6.12.5-brcm/arch/mips/Kconfig
          Some MIPS machines can be configured for either little or big endian
 diff -Nur linux-2.6.12.5/arch/mips/Makefile linux-2.6.12.5-brcm/arch/mips/Makefile
 --- linux-2.6.12.5/arch/mips/Makefile  2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/arch/mips/Makefile     2005-09-03 22:24:07.794917120 +0200
++++ linux-2.6.12.5-brcm/arch/mips/Makefile     2005-09-16 10:29:18.137597568 +0200
 @@ -79,7 +79,7 @@
  cflags-y                      += -I $(TOPDIR)/include/asm/gcc
  cflags-y                      += -G 0 -mno-abicalls -fno-pic -pipe
@@ -63,7 +63,7 @@ diff -Nur linux-2.6.12.5/arch/mips/Makefile linux-2.6.12.5-brcm/arch/mips/Makefi
  core-$(CONFIG_SNI_RM200_PCI)  += arch/mips/sni/
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/Makefile linux-2.6.12.5-brcm/arch/mips/bcm947xx/Makefile
 --- linux-2.6.12.5/arch/mips/bcm947xx/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/Makefile    2005-08-28 11:12:20.406862800 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/Makefile    2005-09-16 10:29:18.149595744 +0200
 @@ -0,0 +1,6 @@
 +#
 +# Makefile for the BCM47xx specific kernel interface routines
@@ -73,7 +73,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/Makefile linux-2.6.12.5-brcm/arch/mi
 +obj-y := irq.o int-handler.o prom.o setup.o time.o
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/Makefile linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/Makefile
 --- linux-2.6.12.5/arch/mips/bcm947xx/broadcom/Makefile        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/Makefile   2005-08-28 11:12:20.407862648 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/Makefile   2005-09-16 10:29:18.149595744 +0200
 @@ -0,0 +1,6 @@
 +#
 +# Makefile for the BCM47xx specific kernel interface routines
@@ -83,7 +83,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/Makefile linux-2.6.12.5-brc
 +obj-y   := sbutils.o linux_osl.o bcmsrom.o bcmutils.o sbmips.o sbpci.o hnddma.o
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/bcmsrom.c linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/bcmsrom.c
 --- linux-2.6.12.5/arch/mips/bcm947xx/broadcom/bcmsrom.c       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/bcmsrom.c  2005-08-28 11:12:20.408862496 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/bcmsrom.c  2005-09-16 10:29:18.150595592 +0200
 @@ -0,0 +1,685 @@
 +/*
 + *  Misc useful routines to access NIC SROM
@@ -772,7 +772,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/bcmsrom.c linux-2.6.12.5-br
 +
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/bcmutils.c linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/bcmutils.c
 --- linux-2.6.12.5/arch/mips/bcm947xx/broadcom/bcmutils.c      1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/bcmutils.c 2005-08-28 11:12:20.428859456 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/bcmutils.c 2005-09-16 10:29:18.164593464 +0200
 @@ -0,0 +1,691 @@
 +/*
 + * Misc useful OS-independent routines.
@@ -1467,7 +1467,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/bcmutils.c linux-2.6.12.5-b
 +
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/hnddma.c linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/hnddma.c
 --- linux-2.6.12.5/arch/mips/bcm947xx/broadcom/hnddma.c        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/hnddma.c   2005-08-28 11:12:20.430859152 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/hnddma.c   2005-09-16 10:29:18.165593312 +0200
 @@ -0,0 +1,763 @@
 +/*
 + * Generic Broadcom Home Networking Division (HND) DMA module.
@@ -2234,7 +2234,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/hnddma.c linux-2.6.12.5-brc
 +}
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/linux_osl.c linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/linux_osl.c
 --- linux-2.6.12.5/arch/mips/bcm947xx/broadcom/linux_osl.c     1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/linux_osl.c        2005-08-28 11:12:20.476852160 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/linux_osl.c        2005-09-16 10:29:18.166593160 +0200
 @@ -0,0 +1,420 @@
 +/*
 + * Linux OS Independent Layer
@@ -2658,7 +2658,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/linux_osl.c linux-2.6.12.5-
 +#endif
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/sbmips.c linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/sbmips.c
 --- linux-2.6.12.5/arch/mips/bcm947xx/broadcom/sbmips.c        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/sbmips.c   2005-08-28 11:12:20.478851856 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/sbmips.c   2005-09-16 10:29:18.168592856 +0200
 @@ -0,0 +1,950 @@
 +/*
 + * BCM47XX Sonics SiliconBackplane MIPS core routines
@@ -3612,7 +3612,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/sbmips.c linux-2.6.12.5-brc
 +}
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/sbpci.c linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/sbpci.c
 --- linux-2.6.12.5/arch/mips/bcm947xx/broadcom/sbpci.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/sbpci.c    2005-08-28 11:12:20.479851704 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/sbpci.c    2005-09-16 10:29:18.169592704 +0200
 @@ -0,0 +1,530 @@
 +/*
 + * Low-Level PCI and SB support for BCM47xx
@@ -4146,7 +4146,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/sbpci.c linux-2.6.12.5-brcm
 +}
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/sbutils.c linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/sbutils.c
 --- linux-2.6.12.5/arch/mips/bcm947xx/broadcom/sbutils.c       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/sbutils.c  2005-08-28 11:12:20.482851248 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/broadcom/sbutils.c  2005-09-16 10:29:18.172592248 +0200
 @@ -0,0 +1,1895 @@
 +/*
 + * Misc utility routines for accessing chip-specific features
@@ -6045,7 +6045,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/broadcom/sbutils.c linux-2.6.12.5-br
 +
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcm4710.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcm4710.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/bcm4710.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcm4710.h   2005-08-28 11:12:20.430859152 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcm4710.h   2005-09-16 10:29:18.172592248 +0200
 @@ -0,0 +1,90 @@
 +/*
 + * BCM4710 address space map and definitions
@@ -6139,7 +6139,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcm4710.h linux-2.6.12.5-brc
 +#endif /* _bcm4710_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmdevs.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmdevs.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/bcmdevs.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmdevs.h   2005-08-28 11:12:20.431859000 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmdevs.h   2005-09-16 10:29:18.173592096 +0200
 @@ -0,0 +1,238 @@
 +/*
 + * Broadcom device-specific manifest constants.
@@ -6381,7 +6381,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmdevs.h linux-2.6.12.5-brc
 +#endif /* _BCMDEVS_H */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmendian.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmendian.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/bcmendian.h      1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmendian.h 2005-08-28 11:12:20.431859000 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmendian.h 2005-09-16 10:29:18.173592096 +0200
 @@ -0,0 +1,125 @@
 +/*******************************************************************************
 + * $Id$
@@ -6510,7 +6510,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmendian.h linux-2.6.12.5-b
 +#endif /* _BCMENDIAN_H_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmenet47xx.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmenet47xx.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/bcmenet47xx.h    1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmenet47xx.h       2005-08-28 11:12:20.432858848 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmenet47xx.h       2005-09-16 10:29:18.174591944 +0200
 @@ -0,0 +1,229 @@
 +/*
 + * Hardware-specific definitions for
@@ -6743,7 +6743,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmenet47xx.h linux-2.6.12.5
 +#endif        /* _bcmenet_47xx_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmenetmib.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmenetmib.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/bcmenetmib.h     1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmenetmib.h        2005-08-28 11:12:20.432858848 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmenetmib.h        2005-09-16 10:29:18.174591944 +0200
 @@ -0,0 +1,81 @@
 +/*
 + * Hardware-specific MIB definition for
@@ -6828,7 +6828,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmenetmib.h linux-2.6.12.5-
 +#endif        /* _bcmenetmib_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmenetrxh.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmenetrxh.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/bcmenetrxh.h     1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmenetrxh.h        2005-08-28 11:12:20.433858696 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmenetrxh.h        2005-09-16 10:29:18.183590576 +0200
 @@ -0,0 +1,43 @@
 +/*
 + * Hardware-specific Receive Data Header for the
@@ -6875,7 +6875,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmenetrxh.h linux-2.6.12.5-
 +#endif        /* _bcmenetrxh_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmnvram.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmnvram.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/bcmnvram.h       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmnvram.h  2005-08-28 11:12:20.433858696 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmnvram.h  2005-09-16 10:29:18.184590424 +0200
 @@ -0,0 +1,131 @@
 +/*
 + * NVRAM variable manipulation
@@ -7010,7 +7010,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmnvram.h linux-2.6.12.5-br
 +#endif /* _bcmnvram_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmsrom.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmsrom.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/bcmsrom.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmsrom.h   2005-08-28 11:12:20.433858696 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmsrom.h   2005-09-16 10:29:18.184590424 +0200
 @@ -0,0 +1,24 @@
 +/*
 + * Misc useful routines to access NIC srom
@@ -7038,7 +7038,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmsrom.h linux-2.6.12.5-brc
 +#endif        /* _bcmsrom_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmutils.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmutils.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/bcmutils.h       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmutils.h  2005-08-28 11:12:20.435858392 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bcmutils.h  2005-09-16 10:29:18.184590424 +0200
 @@ -0,0 +1,136 @@
 +/*
 + * Misc useful os-independent macros and functions.
@@ -7178,7 +7178,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bcmutils.h linux-2.6.12.5-br
 +#endif        /* _bcmutils_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bitfuncs.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bitfuncs.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/bitfuncs.h       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bitfuncs.h  2005-08-28 11:12:20.435858392 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/bitfuncs.h  2005-09-16 10:29:18.185590272 +0200
 @@ -0,0 +1,85 @@
 +/*
 + * bit manipulation utility functions
@@ -7267,7 +7267,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/bitfuncs.h linux-2.6.12.5-br
 +#endif /* _BITFUNCS_H */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/epivers.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/epivers.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/epivers.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/epivers.h   2005-08-28 11:12:20.435858392 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/epivers.h   2005-09-16 10:29:18.185590272 +0200
 @@ -0,0 +1,69 @@
 +/*
 + * Copyright 2001-2003, Broadcom Corporation
@@ -7340,7 +7340,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/epivers.h linux-2.6.12.5-brc
 +#endif /* _epivers_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/epivers.h.in linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/epivers.h.in
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/epivers.h.in     1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/epivers.h.in        2005-08-28 11:12:20.436858240 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/epivers.h.in        2005-09-16 10:29:18.186590120 +0200
 @@ -0,0 +1,69 @@
 +/*
 + * Copyright 2001-2003, Broadcom Corporation
@@ -7413,7 +7413,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/epivers.h.in linux-2.6.12.5-
 +#endif /* _epivers_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/etsockio.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/etsockio.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/etsockio.h       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/etsockio.h  2005-08-28 11:12:20.436858240 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/etsockio.h  2005-09-16 10:29:18.186590120 +0200
 @@ -0,0 +1,60 @@
 +/*
 + * Driver-specific socket ioctls
@@ -7477,7 +7477,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/etsockio.h linux-2.6.12.5-br
 +#endif
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/flash.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/flash.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/flash.h  1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/flash.h     2005-08-28 11:12:20.437858088 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/flash.h     2005-09-16 10:29:18.187589968 +0200
 @@ -0,0 +1,184 @@
 +/*
 + * flash.h: Common definitions for flash access.
@@ -7665,7 +7665,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/flash.h linux-2.6.12.5-brcm/
 +#endif
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/flashutl.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/flashutl.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/flashutl.h       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/flashutl.h  2005-08-28 11:12:20.437858088 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/flashutl.h  2005-09-16 10:29:18.187589968 +0200
 @@ -0,0 +1,34 @@
 +/*
 + * BCM47XX FLASH driver interface
@@ -7703,7 +7703,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/flashutl.h linux-2.6.12.5-br
 +#endif /* _flashutl_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/hnddma.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/hnddma.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/hnddma.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/hnddma.h    2005-08-28 11:12:20.438857936 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/hnddma.h    2005-09-16 10:29:18.188589816 +0200
 @@ -0,0 +1,181 @@
 +/*
 + * Generic Broadcom Home Networking Division (HND) DMA engine definitions.
@@ -7888,7 +7888,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/hnddma.h linux-2.6.12.5-brcm
 +#endif        /* _hnddma_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/hndmips.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/hndmips.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/hndmips.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/hndmips.h   2005-08-28 11:12:20.439857784 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/hndmips.h   2005-09-16 10:29:18.188589816 +0200
 @@ -0,0 +1,16 @@
 +/*
 + * Alternate include file for HND sbmips.h since CFE also ships with
@@ -7908,7 +7908,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/hndmips.h linux-2.6.12.5-brc
 +#include "sbmips.h"
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/linux_osl.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/linux_osl.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/linux_osl.h      1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/linux_osl.h 2005-08-28 11:12:20.440857632 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/linux_osl.h 2005-09-16 10:29:18.190589512 +0200
 @@ -0,0 +1,313 @@
 +/*
 + * Linux OS Independent Layer
@@ -8225,7 +8225,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/linux_osl.h linux-2.6.12.5-b
 +#endif        /* _linux_osl_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/linuxver.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/linuxver.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/linuxver.h       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/linuxver.h  2005-08-28 11:12:20.441857480 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/linuxver.h  2005-09-16 10:29:18.191589360 +0200
 @@ -0,0 +1,326 @@
 +/*
 + * Linux-specific abstractions to gain some independence from linux kernel versions.
@@ -8555,7 +8555,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/linuxver.h linux-2.6.12.5-br
 +#endif /* _linuxver_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/nvports.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/nvports.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/nvports.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/nvports.h   2005-08-28 11:12:20.441857480 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/nvports.h   2005-09-16 10:29:18.191589360 +0200
 @@ -0,0 +1,62 @@
 +/*
 + * Broadcom Home Gateway Reference Design
@@ -8621,7 +8621,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/nvports.h linux-2.6.12.5-brc
 +
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/osl.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/osl.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/osl.h    1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/osl.h       2005-08-28 11:12:20.441857480 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/osl.h       2005-09-16 10:29:18.192589208 +0200
 @@ -0,0 +1,38 @@
 +/*
 + * OS Independent Layer
@@ -8663,7 +8663,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/osl.h linux-2.6.12.5-brcm/ar
 +#endif        /* _osl_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/pcicfg.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/pcicfg.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/pcicfg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/pcicfg.h    2005-08-28 11:12:20.442857328 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/pcicfg.h    2005-09-16 10:29:18.192589208 +0200
 @@ -0,0 +1,362 @@
 +/*
 + * pcicfg.h: PCI configuration  constants and structures.
@@ -9029,7 +9029,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/pcicfg.h linux-2.6.12.5-brcm
 +#endif
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/proto/802.11.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/proto/802.11.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/proto/802.11.h   1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/proto/802.11.h      2005-08-28 11:12:20.450856112 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/proto/802.11.h      2005-09-16 10:29:18.204587384 +0200
 @@ -0,0 +1,679 @@
 +/*
 + * Copyright 2001-2003, Broadcom Corporation   
@@ -9712,7 +9712,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/proto/802.11.h linux-2.6.12.
 +#endif /* _802_11_H_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/proto/ethernet.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/proto/ethernet.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/proto/ethernet.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/proto/ethernet.h    2005-08-28 11:12:20.450856112 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/proto/ethernet.h    2005-09-16 10:29:18.205587232 +0200
 @@ -0,0 +1,145 @@
 +/*******************************************************************************
 + * $Id$
@@ -9861,7 +9861,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/proto/ethernet.h linux-2.6.1
 +#endif /* _NET_ETHERNET_H_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/rts/crc.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/rts/crc.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/rts/crc.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/rts/crc.h   2005-08-28 11:12:20.451855960 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/rts/crc.h   2005-09-16 10:29:18.205587232 +0200
 @@ -0,0 +1,69 @@
 +/*******************************************************************************
 + * $Id$
@@ -9934,7 +9934,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/rts/crc.h linux-2.6.12.5-brc
 +#endif /* _RTS_CRC_H_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/s5.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/s5.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/s5.h     1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/s5.h        2005-08-28 11:12:20.451855960 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/s5.h        2005-09-16 10:29:18.206587080 +0200
 @@ -0,0 +1,103 @@
 +#ifndef _S5_H_
 +#define _S5_H_
@@ -10041,7 +10041,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/s5.h linux-2.6.12.5-brcm/arc
 +#endif /*!_S5_H_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbchipc.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbchipc.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/sbchipc.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbchipc.h   2005-08-28 11:12:20.468853376 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbchipc.h   2005-09-16 10:29:18.207586928 +0200
 @@ -0,0 +1,281 @@
 +/*
 + * SiliconBackplane Chipcommon core hardware definitions.
@@ -10326,7 +10326,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbchipc.h linux-2.6.12.5-brc
 +#endif        /* _SBCHIPC_H */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbconfig.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbconfig.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/sbconfig.h       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbconfig.h  2005-08-28 11:12:20.469853224 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbconfig.h  2005-09-16 10:29:18.207586928 +0200
 @@ -0,0 +1,296 @@
 +/*
 + * Broadcom SiliconBackplane hardware register definitions.
@@ -10626,7 +10626,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbconfig.h linux-2.6.12.5-br
 +#endif        /* _SBCONFIG_H */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbextif.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbextif.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/sbextif.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbextif.h   2005-08-28 11:12:20.470853072 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbextif.h   2005-09-16 10:29:18.208586776 +0200
 @@ -0,0 +1,242 @@
 +/*
 + * Hardware-specific External Interface I/O core definitions
@@ -10872,7 +10872,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbextif.h linux-2.6.12.5-brc
 +#endif        /* _SBEXTIF_H */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbmemc.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbmemc.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/sbmemc.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbmemc.h    2005-08-28 11:12:20.471852920 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbmemc.h    2005-09-16 10:29:18.209586624 +0200
 @@ -0,0 +1,144 @@
 +/*
 + * BCM47XX Sonics SiliconBackplane DDR/SDRAM controller core hardware definitions.
@@ -11020,7 +11020,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbmemc.h linux-2.6.12.5-brcm
 +#endif        /* _SBMEMC_H */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbmips.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbmips.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/sbmips.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbmips.h    2005-08-28 11:12:20.471852920 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbmips.h    2005-09-16 10:29:18.209586624 +0200
 @@ -0,0 +1,56 @@
 +/*
 + * Broadcom SiliconBackplane MIPS definitions
@@ -11080,7 +11080,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbmips.h linux-2.6.12.5-brcm
 +#endif        /* _SBMIPS_H */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbpci.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbpci.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/sbpci.h  1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbpci.h     2005-08-28 11:12:20.471852920 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbpci.h     2005-09-16 10:29:18.209586624 +0200
 @@ -0,0 +1,113 @@
 +/*
 + * BCM47XX Sonics SiliconBackplane PCI core hardware definitions.
@@ -11197,7 +11197,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbpci.h linux-2.6.12.5-brcm/
 +#endif        /* _SBPCI_H */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbpcmcia.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbpcmcia.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/sbpcmcia.h       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbpcmcia.h  2005-08-28 11:12:20.472852768 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbpcmcia.h  2005-09-16 10:29:18.210586472 +0200
 @@ -0,0 +1,131 @@
 +/*
 + * BCM43XX Sonics SiliconBackplane PCMCIA core hardware definitions.
@@ -11332,7 +11332,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbpcmcia.h linux-2.6.12.5-br
 +#endif        /* _SBPCMCIA_H */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbsdram.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbsdram.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/sbsdram.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbsdram.h   2005-08-28 11:12:20.472852768 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbsdram.h   2005-09-16 10:29:18.210586472 +0200
 @@ -0,0 +1,75 @@
 +/*
 + * BCM47XX Sonics SiliconBackplane SDRAM controller core hardware definitions.
@@ -11411,7 +11411,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbsdram.h linux-2.6.12.5-brc
 +#endif        /* _SBSDRAM_H */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbutils.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbutils.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/sbutils.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbutils.h   2005-08-28 11:12:20.473852616 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/sbutils.h   2005-09-16 10:29:18.211586320 +0200
 @@ -0,0 +1,90 @@
 +/*
 + * Misc utility routines for accessing chip-specific features
@@ -11505,7 +11505,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/sbutils.h linux-2.6.12.5-brc
 +#endif        /* _sbutils_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/trxhdr.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/trxhdr.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/trxhdr.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/trxhdr.h    2005-08-28 11:12:20.474852464 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/trxhdr.h    2005-09-16 10:29:18.211586320 +0200
 @@ -0,0 +1,31 @@
 +/*
 + * TRX image file header format.
@@ -11540,7 +11540,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/trxhdr.h linux-2.6.12.5-brcm
 +typedef struct trx_header TRXHDR, *PTRXHDR;
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/typedefs.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/typedefs.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/typedefs.h       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/typedefs.h  2005-08-28 11:12:20.474852464 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/typedefs.h  2005-09-16 10:29:18.212586168 +0200
 @@ -0,0 +1,162 @@
 +/*
 + * Copyright 2001-2003, Broadcom Corporation   
@@ -11706,7 +11706,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/typedefs.h linux-2.6.12.5-br
 +#endif /* _TYPEDEFS_H_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/wlioctl.h linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/wlioctl.h
 --- linux-2.6.12.5/arch/mips/bcm947xx/include/wlioctl.h        1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/wlioctl.h   2005-08-28 11:12:20.475852312 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/include/wlioctl.h   2005-09-16 10:29:18.213586016 +0200
 @@ -0,0 +1,690 @@
 +/*
 + * Custom OID/ioctl definitions for
@@ -12400,7 +12400,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/include/wlioctl.h linux-2.6.12.5-brc
 +#endif /* _wlioctl_h_ */
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/int-handler.S linux-2.6.12.5-brcm/arch/mips/bcm947xx/int-handler.S
 --- linux-2.6.12.5/arch/mips/bcm947xx/int-handler.S    1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/int-handler.S       2005-08-28 16:58:08.027788792 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/int-handler.S       2005-09-16 10:29:18.213586016 +0200
 @@ -0,0 +1,48 @@
 +/*
 + *  Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
@@ -12452,7 +12452,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/int-handler.S linux-2.6.12.5-brcm/ar
 +      END(bcm47xx_irq_handler)
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/irq.c linux-2.6.12.5-brcm/arch/mips/bcm947xx/irq.c
 --- linux-2.6.12.5/arch/mips/bcm947xx/irq.c    1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/irq.c       2005-08-28 16:58:26.178029536 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/irq.c       2005-09-16 10:29:18.214585864 +0200
 @@ -0,0 +1,68 @@
 +/*
 + *  Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
@@ -12524,7 +12524,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/irq.c linux-2.6.12.5-brcm/arch/mips/
 +}
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/prom.c linux-2.6.12.5-brcm/arch/mips/bcm947xx/prom.c
 --- linux-2.6.12.5/arch/mips/bcm947xx/prom.c   1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/prom.c      2005-08-28 16:58:41.789656208 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/prom.c      2005-09-16 10:29:18.214585864 +0200
 @@ -0,0 +1,59 @@
 +/*
 + *  Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
@@ -12587,7 +12587,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/prom.c linux-2.6.12.5-brcm/arch/mips
 +}
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/setup.c linux-2.6.12.5-brcm/arch/mips/bcm947xx/setup.c
 --- linux-2.6.12.5/arch/mips/bcm947xx/setup.c  1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/setup.c     2005-09-11 01:36:10.217667456 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/setup.c     2005-09-16 10:29:18.215585712 +0200
 @@ -0,0 +1,127 @@
 +/*
 + *  Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
@@ -12718,7 +12718,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/setup.c linux-2.6.12.5-brcm/arch/mip
 +early_initcall(bcm47xx_init);
 diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/time.c linux-2.6.12.5-brcm/arch/mips/bcm947xx/time.c
 --- linux-2.6.12.5/arch/mips/bcm947xx/time.c   1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/time.c      2005-08-28 16:57:55.440702320 +0200
++++ linux-2.6.12.5-brcm/arch/mips/bcm947xx/time.c      2005-09-16 10:29:18.215585712 +0200
 @@ -0,0 +1,59 @@
 +/*
 + *  Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
@@ -12781,7 +12781,7 @@ diff -Nur linux-2.6.12.5/arch/mips/bcm947xx/time.c linux-2.6.12.5-brcm/arch/mips
 +}
 diff -Nur linux-2.6.12.5/arch/mips/kernel/cpu-probe.c linux-2.6.12.5-brcm/arch/mips/kernel/cpu-probe.c
 --- linux-2.6.12.5/arch/mips/kernel/cpu-probe.c        2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/arch/mips/kernel/cpu-probe.c   2005-08-28 11:12:20.538842736 +0200
++++ linux-2.6.12.5-brcm/arch/mips/kernel/cpu-probe.c   2005-09-16 10:29:18.243581456 +0200
 @@ -555,6 +555,28 @@
        }
  }
@@ -12824,7 +12824,7 @@ diff -Nur linux-2.6.12.5/arch/mips/kernel/cpu-probe.c linux-2.6.12.5-brcm/arch/m
                break;
 diff -Nur linux-2.6.12.5/arch/mips/kernel/head.S linux-2.6.12.5-brcm/arch/mips/kernel/head.S
 --- linux-2.6.12.5/arch/mips/kernel/head.S     2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/arch/mips/kernel/head.S        2005-08-28 11:12:20.539842584 +0200
++++ linux-2.6.12.5-brcm/arch/mips/kernel/head.S        2005-09-16 10:29:18.244581304 +0200
 @@ -122,6 +122,14 @@
  #endif
        .endm
@@ -12842,7 +12842,7 @@ diff -Nur linux-2.6.12.5/arch/mips/kernel/head.S linux-2.6.12.5-brcm/arch/mips/k
         * Necessary for machines which link their kernels at KSEG0.
 diff -Nur linux-2.6.12.5/arch/mips/kernel/proc.c linux-2.6.12.5-brcm/arch/mips/kernel/proc.c
 --- linux-2.6.12.5/arch/mips/kernel/proc.c     2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/arch/mips/kernel/proc.c        2005-08-28 11:12:20.553840456 +0200
++++ linux-2.6.12.5-brcm/arch/mips/kernel/proc.c        2005-09-16 10:29:18.250580392 +0200
 @@ -75,7 +75,9 @@
        [CPU_VR4133]    "NEC VR4133",
        [CPU_VR4181]    "NEC VR4181",
@@ -12856,7 +12856,7 @@ diff -Nur linux-2.6.12.5/arch/mips/kernel/proc.c linux-2.6.12.5-brcm/arch/mips/k
  
 diff -Nur linux-2.6.12.5/arch/mips/mm/tlbex.c linux-2.6.12.5-brcm/arch/mips/mm/tlbex.c
 --- linux-2.6.12.5/arch/mips/mm/tlbex.c        2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/arch/mips/mm/tlbex.c   2005-08-28 11:12:20.587835288 +0200
++++ linux-2.6.12.5-brcm/arch/mips/mm/tlbex.c   2005-09-16 10:29:18.273576896 +0200
 @@ -851,6 +851,8 @@
        case CPU_4KSC:
        case CPU_20KC:
@@ -12868,7 +12868,7 @@ diff -Nur linux-2.6.12.5/arch/mips/mm/tlbex.c linux-2.6.12.5-brcm/arch/mips/mm/t
  
 diff -Nur linux-2.6.12.5/arch/mips/pci/Makefile linux-2.6.12.5-brcm/arch/mips/pci/Makefile
 --- linux-2.6.12.5/arch/mips/pci/Makefile      2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/arch/mips/pci/Makefile 2005-08-28 16:41:44.565297816 +0200
++++ linux-2.6.12.5-brcm/arch/mips/pci/Makefile 2005-09-16 10:29:18.311571120 +0200
 @@ -18,6 +18,7 @@
  obj-$(CONFIG_MIPS_TX3927)     += ops-jmr3927.o
  obj-$(CONFIG_PCI_VR41XX)      += ops-vr41xx.o pci-vr41xx.o
@@ -12879,7 +12879,7 @@ diff -Nur linux-2.6.12.5/arch/mips/pci/Makefile linux-2.6.12.5-brcm/arch/mips/pc
  # These are still pretty much in the old state, watch, go blind.
 diff -Nur linux-2.6.12.5/arch/mips/pci/fixup-bcm47xx.c linux-2.6.12.5-brcm/arch/mips/pci/fixup-bcm47xx.c
 --- linux-2.6.12.5/arch/mips/pci/fixup-bcm47xx.c       1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/pci/fixup-bcm47xx.c  2005-08-28 11:12:20.611831640 +0200
++++ linux-2.6.12.5-brcm/arch/mips/pci/fixup-bcm47xx.c  2005-09-16 10:29:18.312570968 +0200
 @@ -0,0 +1,23 @@
 +#include <linux/init.h>
 +#include <linux/pci.h>
@@ -12906,7 +12906,7 @@ diff -Nur linux-2.6.12.5/arch/mips/pci/fixup-bcm47xx.c linux-2.6.12.5-brcm/arch/
 +};
 diff -Nur linux-2.6.12.5/arch/mips/pci/ops-sb.c linux-2.6.12.5-brcm/arch/mips/pci/ops-sb.c
 --- linux-2.6.12.5/arch/mips/pci/ops-sb.c      1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/pci/ops-sb.c 2005-08-28 11:12:20.612831488 +0200
++++ linux-2.6.12.5-brcm/arch/mips/pci/ops-sb.c 2005-09-16 10:29:18.312570968 +0200
 @@ -0,0 +1,44 @@
 +#include <linux/kernel.h>
 +#include <linux/init.h>
@@ -12954,7 +12954,7 @@ diff -Nur linux-2.6.12.5/arch/mips/pci/ops-sb.c linux-2.6.12.5-brcm/arch/mips/pc
 +};
 diff -Nur linux-2.6.12.5/arch/mips/pci/pci-bcm47xx.c linux-2.6.12.5-brcm/arch/mips/pci/pci-bcm47xx.c
 --- linux-2.6.12.5/arch/mips/pci/pci-bcm47xx.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/arch/mips/pci/pci-bcm47xx.c    2005-08-28 11:12:20.612831488 +0200
++++ linux-2.6.12.5-brcm/arch/mips/pci/pci-bcm47xx.c    2005-09-16 10:29:18.313570816 +0200
 @@ -0,0 +1,61 @@
 +#include <linux/init.h>
 +#include <linux/pci.h>
@@ -13019,7 +13019,7 @@ diff -Nur linux-2.6.12.5/arch/mips/pci/pci-bcm47xx.c linux-2.6.12.5-brcm/arch/mi
 +early_initcall(bcm47xx_pci_init);
 diff -Nur linux-2.6.12.5/arch/mips/pci/pci.c linux-2.6.12.5-brcm/arch/mips/pci/pci.c
 --- linux-2.6.12.5/arch/mips/pci/pci.c 2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/arch/mips/pci/pci.c    2005-08-28 11:12:20.629828904 +0200
++++ linux-2.6.12.5-brcm/arch/mips/pci/pci.c    2005-09-16 10:29:18.327568688 +0200
 @@ -238,7 +238,8 @@
                if (dev->resource[i].flags & IORESOURCE_IO)
                        offset = hose->io_offset;
@@ -13032,7 +13032,7 @@ diff -Nur linux-2.6.12.5/arch/mips/pci/pci.c linux-2.6.12.5-brcm/arch/mips/pci/p
                dev->resource[i].end += offset;
 diff -Nur linux-2.6.12.5/drivers/mtd/maps/Kconfig linux-2.6.12.5-brcm/drivers/mtd/maps/Kconfig
 --- linux-2.6.12.5/drivers/mtd/maps/Kconfig    2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/drivers/mtd/maps/Kconfig       2005-08-28 16:21:23.595930936 +0200
++++ linux-2.6.12.5-brcm/drivers/mtd/maps/Kconfig       2005-09-16 10:29:18.355564432 +0200
 @@ -357,6 +357,12 @@
          Mapping for the Flaga digital module. If you don't have one, ignore
          this setting.
@@ -13048,7 +13048,7 @@ diff -Nur linux-2.6.12.5/drivers/mtd/maps/Kconfig linux-2.6.12.5-brcm/drivers/mt
        depends on MTD_CFI && PPC32 && 40x && BEECH
 diff -Nur linux-2.6.12.5/drivers/mtd/maps/Makefile linux-2.6.12.5-brcm/drivers/mtd/maps/Makefile
 --- linux-2.6.12.5/drivers/mtd/maps/Makefile   2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/drivers/mtd/maps/Makefile      2005-08-28 11:12:20.666823280 +0200
++++ linux-2.6.12.5-brcm/drivers/mtd/maps/Makefile      2005-09-16 10:29:18.360563672 +0200
 @@ -31,6 +31,7 @@
  obj-$(CONFIG_MTD_PCMCIA)      += pcmciamtd.o
  obj-$(CONFIG_MTD_RPXLITE)     += rpxlite.o
@@ -13059,7 +13059,7 @@ diff -Nur linux-2.6.12.5/drivers/mtd/maps/Makefile linux-2.6.12.5-brcm/drivers/m
  obj-$(CONFIG_MTD_SBC_GXX)     += sbc_gxx.o
 diff -Nur linux-2.6.12.5/drivers/mtd/maps/bcm47xx-flash.c linux-2.6.12.5-brcm/drivers/mtd/maps/bcm47xx-flash.c
 --- linux-2.6.12.5/drivers/mtd/maps/bcm47xx-flash.c    1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.12.5-brcm/drivers/mtd/maps/bcm47xx-flash.c       2005-09-10 22:23:03.178338008 +0200
++++ linux-2.6.12.5-brcm/drivers/mtd/maps/bcm47xx-flash.c       2005-09-16 10:29:18.361563520 +0200
 @@ -0,0 +1,249 @@
 +/*
 + *  Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
@@ -13310,768 +13310,9 @@ diff -Nur linux-2.6.12.5/drivers/mtd/maps/bcm47xx-flash.c linux-2.6.12.5-brcm/dr
 +
 +module_init(init_bcm947xx_map);
 +module_exit(cleanup_bcm947xx_map);
-diff -Nur linux-2.6.12.5/drivers/net/b44.c linux-2.6.12.5-brcm/drivers/net/b44.c
---- linux-2.6.12.5/drivers/net/b44.c   2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/drivers/net/b44.c      2005-08-28 11:12:20.691819480 +0200
-@@ -1,7 +1,8 @@
--/* b44.c: Broadcom 4400 device driver.
-+/* b44.c: Broadcom 4400/47xx device driver.
-  *
-  * Copyright (C) 2002 David S. Miller (davem@redhat.com)
-- * Fixed by Pekka Pietikainen (pp@ee.oulu.fi)
-+ * Copyright (C) 2004 Pekka Pietikainen (pp@ee.oulu.fi)
-+ * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
-  *
-  * Distribute under GPL.
-  */
-@@ -78,7 +79,7 @@
-       DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
- 
- MODULE_AUTHOR("Florian Schirmer, Pekka Pietikainen, David S. Miller");
--MODULE_DESCRIPTION("Broadcom 4400 10/100 PCI ethernet driver");
-+MODULE_DESCRIPTION("Broadcom 4400/47xx 10/100 PCI ethernet driver");
- MODULE_LICENSE("GPL");
- MODULE_VERSION(DRV_MODULE_VERSION);
- 
-@@ -93,6 +94,8 @@
-         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
-       { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_BCM4401B1,
-         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
-+      { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_BCM4713,
-+        PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
-       { }     /* terminate list with empty entry */
- };
- 
-@@ -106,24 +109,13 @@
- static void b44_poll_controller(struct net_device *dev);
- #endif
- 
--static inline unsigned long br32(const struct b44 *bp, unsigned long reg)
--{
--      return readl(bp->regs + reg);
--}
--
--static inline void bw32(const struct b44 *bp, 
--                      unsigned long reg, unsigned long val)
--{
--      writel(val, bp->regs + reg);
--}
--
- static int b44_wait_bit(struct b44 *bp, unsigned long reg,
-                       u32 bit, unsigned long timeout, const int clear)
- {
-       unsigned long i;
- 
-       for (i = 0; i < timeout; i++) {
--              u32 val = br32(bp, reg);
-+              u32 val = br32(reg);
- 
-               if (clear && !(val & bit))
-                       break;
-@@ -154,7 +146,7 @@
- 
- static u32 ssb_get_core_rev(struct b44 *bp)
- {
--      return (br32(bp, B44_SBIDHIGH) & SBIDHIGH_RC_MASK);
-+      return (br32(B44_SBIDHIGH) & SBIDHIGH_RC_MASK);
- }
- 
- static u32 ssb_pci_setup(struct b44 *bp, u32 cores)
-@@ -165,13 +157,13 @@
-       pci_write_config_dword(bp->pdev, SSB_BAR0_WIN, BCM4400_PCI_CORE_ADDR);
-       pci_rev = ssb_get_core_rev(bp);
- 
--      val = br32(bp, B44_SBINTVEC);
-+      val = br32(B44_SBINTVEC);
-       val |= cores;
--      bw32(bp, B44_SBINTVEC, val);
-+      bw32(B44_SBINTVEC, val);
- 
--      val = br32(bp, SSB_PCI_TRANS_2);
-+      val = br32(SSB_PCI_TRANS_2);
-       val |= SSB_PCI_PREF | SSB_PCI_BURST;
--      bw32(bp, SSB_PCI_TRANS_2, val);
-+      bw32(SSB_PCI_TRANS_2, val);
- 
-       pci_write_config_dword(bp->pdev, SSB_BAR0_WIN, bar_orig);
- 
-@@ -180,18 +172,18 @@
- 
- static void ssb_core_disable(struct b44 *bp)
- {
--      if (br32(bp, B44_SBTMSLOW) & SBTMSLOW_RESET)
-+      if (br32(B44_SBTMSLOW) & SBTMSLOW_RESET)
-               return;
- 
--      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_CLOCK));
-+      bw32(B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_CLOCK));
-       b44_wait_bit(bp, B44_SBTMSLOW, SBTMSLOW_REJECT, 100000, 0);
-       b44_wait_bit(bp, B44_SBTMSHIGH, SBTMSHIGH_BUSY, 100000, 1);
--      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_FGC | SBTMSLOW_CLOCK |
-+      bw32(B44_SBTMSLOW, (SBTMSLOW_FGC | SBTMSLOW_CLOCK |
-                           SBTMSLOW_REJECT | SBTMSLOW_RESET));
--      br32(bp, B44_SBTMSLOW);
-+      br32(B44_SBTMSLOW);
-       udelay(1);
--      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_RESET));
--      br32(bp, B44_SBTMSLOW);
-+      bw32(B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_RESET));
-+      br32(B44_SBTMSLOW);
-       udelay(1);
- }
- 
-@@ -200,58 +192,65 @@
-       u32 val;
- 
-       ssb_core_disable(bp);
--      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_RESET | SBTMSLOW_CLOCK | SBTMSLOW_FGC));
--      br32(bp, B44_SBTMSLOW);
-+      bw32(B44_SBTMSLOW, (SBTMSLOW_RESET | SBTMSLOW_CLOCK | SBTMSLOW_FGC));
-+      br32(B44_SBTMSLOW);
-       udelay(1);
- 
-       /* Clear SERR if set, this is a hw bug workaround.  */
--      if (br32(bp, B44_SBTMSHIGH) & SBTMSHIGH_SERR)
--              bw32(bp, B44_SBTMSHIGH, 0);
-+      if (br32(B44_SBTMSHIGH) & SBTMSHIGH_SERR)
-+              bw32(B44_SBTMSHIGH, 0);
- 
--      val = br32(bp, B44_SBIMSTATE);
-+      val = br32(B44_SBIMSTATE);
-       if (val & (SBIMSTATE_IBE | SBIMSTATE_TO))
--              bw32(bp, B44_SBIMSTATE, val & ~(SBIMSTATE_IBE | SBIMSTATE_TO));
-+              bw32(B44_SBIMSTATE, val & ~(SBIMSTATE_IBE | SBIMSTATE_TO));
- 
--      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK | SBTMSLOW_FGC));
--      br32(bp, B44_SBTMSLOW);
-+      bw32(B44_SBTMSLOW, (SBTMSLOW_CLOCK | SBTMSLOW_FGC));
-+      br32(B44_SBTMSLOW);
-       udelay(1);
- 
--      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK));
--      br32(bp, B44_SBTMSLOW);
-+      bw32(B44_SBTMSLOW, (SBTMSLOW_CLOCK));
-+      br32(B44_SBTMSLOW);
-       udelay(1);
- }
- 
-+static int b44_4713_instance;
-+
- static int ssb_core_unit(struct b44 *bp)
- {
--#if 0
--      u32 val = br32(bp, B44_SBADMATCH0);
--      u32 base;
--
--      type = val & SBADMATCH0_TYPE_MASK;
--      switch (type) {
--      case 0:
--              base = val & SBADMATCH0_BS0_MASK;
--              break;
--
--      case 1:
--              base = val & SBADMATCH0_BS1_MASK;
--              break;
--
--      case 2:
--      default:
--              base = val & SBADMATCH0_BS2_MASK;
--              break;
--      };
--#endif
--      return 0;
-+      if (bp->pdev->device == PCI_DEVICE_ID_BCM4713)
-+              return b44_4713_instance++;
-+      else
-+              return 0;
- }
- 
- static int ssb_is_core_up(struct b44 *bp)
- {
--      return ((br32(bp, B44_SBTMSLOW) & (SBTMSLOW_RESET | SBTMSLOW_REJECT | SBTMSLOW_CLOCK))
-+      return ((br32(B44_SBTMSLOW) & (SBTMSLOW_RESET | SBTMSLOW_REJECT | SBTMSLOW_CLOCK))
-               == SBTMSLOW_CLOCK);
- }
- 
-+static void __b44_cam_read(struct b44 *bp, unsigned char *data, int index)
-+{
-+      u32 val;
-+
-+      bw32(B44_CAM_CTRL, (CAM_CTRL_READ |
-+                          (index << CAM_CTRL_INDEX_SHIFT)));
-+
-+      b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);  
-+
-+      val = br32(B44_CAM_DATA_LO);
-+
-+      data[2] = (val >> 24) & 0xFF;
-+      data[3] = (val >> 16) & 0xFF;
-+      data[4] = (val >> 8) & 0xFF;
-+      data[5] = (val >> 0) & 0xFF;
-+
-+      val = br32(B44_CAM_DATA_HI);
-+      
-+      data[0] = (val >> 8) & 0xFF;
-+      data[1] = (val >> 0) & 0xFF;
-+}
-+
- static void __b44_cam_write(struct b44 *bp, unsigned char *data, int index)
- {
-       u32 val;
-@@ -260,19 +259,19 @@
-       val |= ((u32) data[3]) << 16;
-       val |= ((u32) data[4]) <<  8;
-       val |= ((u32) data[5]) <<  0;
--      bw32(bp, B44_CAM_DATA_LO, val);
-+      bw32(B44_CAM_DATA_LO, val);
-       val = (CAM_DATA_HI_VALID | 
-              (((u32) data[0]) << 8) |
-              (((u32) data[1]) << 0));
--      bw32(bp, B44_CAM_DATA_HI, val);
--      bw32(bp, B44_CAM_CTRL, (CAM_CTRL_WRITE |
-+      bw32(B44_CAM_DATA_HI, val);
-+      bw32(B44_CAM_CTRL, (CAM_CTRL_WRITE |
-                           (index << CAM_CTRL_INDEX_SHIFT)));
-       b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);  
- }
- 
- static inline void __b44_disable_ints(struct b44 *bp)
- {
--      bw32(bp, B44_IMASK, 0);
-+      bw32(B44_IMASK, 0);
- }
- 
- static void b44_disable_ints(struct b44 *bp)
-@@ -280,34 +279,40 @@
-       __b44_disable_ints(bp);
- 
-       /* Flush posted writes. */
--      br32(bp, B44_IMASK);
-+      br32(B44_IMASK);
- }
- 
- static void b44_enable_ints(struct b44 *bp)
- {
--      bw32(bp, B44_IMASK, bp->imask);
-+      bw32(B44_IMASK, bp->imask);
- }
- 
- static int b44_readphy(struct b44 *bp, int reg, u32 *val)
- {
-       int err;
- 
--      bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
--      bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
-+      if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
-+              return 0;
-+
-+      bw32(B44_EMAC_ISTAT, EMAC_INT_MII);
-+      bw32(B44_MDIO_DATA, (MDIO_DATA_SB_START |
-                            (MDIO_OP_READ << MDIO_DATA_OP_SHIFT) |
-                            (bp->phy_addr << MDIO_DATA_PMD_SHIFT) |
-                            (reg << MDIO_DATA_RA_SHIFT) |
-                            (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT)));
-       err = b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
--      *val = br32(bp, B44_MDIO_DATA) & MDIO_DATA_DATA;
-+      *val = br32(B44_MDIO_DATA) & MDIO_DATA_DATA;
- 
-       return err;
- }
- 
- static int b44_writephy(struct b44 *bp, int reg, u32 val)
- {
--      bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
--      bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
-+      if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
-+              return 0;
-+
-+      bw32(B44_EMAC_ISTAT, EMAC_INT_MII);
-+      bw32(B44_MDIO_DATA, (MDIO_DATA_SB_START |
-                            (MDIO_OP_WRITE << MDIO_DATA_OP_SHIFT) |
-                            (bp->phy_addr << MDIO_DATA_PMD_SHIFT) |
-                            (reg << MDIO_DATA_RA_SHIFT) |
-@@ -344,6 +349,9 @@
-       u32 val;
-       int err;
- 
-+      if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
-+              return 0;
-+
-       err = b44_writephy(bp, MII_BMCR, BMCR_RESET);
-       if (err)
-               return err;
-@@ -367,20 +375,20 @@
-       bp->flags &= ~(B44_FLAG_TX_PAUSE | B44_FLAG_RX_PAUSE);
-       bp->flags |= pause_flags;
- 
--      val = br32(bp, B44_RXCONFIG);
-+      val = br32(B44_RXCONFIG);
-       if (pause_flags & B44_FLAG_RX_PAUSE)
-               val |= RXCONFIG_FLOW;
-       else
-               val &= ~RXCONFIG_FLOW;
--      bw32(bp, B44_RXCONFIG, val);
-+      bw32(B44_RXCONFIG, val);
- 
--      val = br32(bp, B44_MAC_FLOW);
-+      val = br32(B44_MAC_FLOW);
-       if (pause_flags & B44_FLAG_TX_PAUSE)
-               val |= (MAC_FLOW_PAUSE_ENAB |
-                       (0xc0 & MAC_FLOW_RX_HI_WATER));
-       else
-               val &= ~MAC_FLOW_PAUSE_ENAB;
--      bw32(bp, B44_MAC_FLOW, val);
-+      bw32(B44_MAC_FLOW, val);
- }
- 
- static void b44_set_flow_ctrl(struct b44 *bp, u32 local, u32 remote)
-@@ -414,6 +422,9 @@
-       u32 val;
-       int err;
- 
-+      if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
-+              return 0;
-+
-       if ((err = b44_readphy(bp, B44_MII_ALEDCTRL, &val)) != 0)
-               goto out;
-       if ((err = b44_writephy(bp, B44_MII_ALEDCTRL,
-@@ -476,11 +487,11 @@
- 
-       val = &bp->hw_stats.tx_good_octets;
-       for (reg = B44_TX_GOOD_O; reg <= B44_TX_PAUSE; reg += 4UL) {
--              *val++ += br32(bp, reg);
-+              *val++ += br32(reg);
-       }
-       val = &bp->hw_stats.rx_good_octets;
-       for (reg = B44_RX_GOOD_O; reg <= B44_RX_NPAUSE; reg += 4UL) {
--              *val++ += br32(bp, reg);
-+              *val++ += br32(reg);
-       }
- }
- 
-@@ -506,6 +517,19 @@
- {
-       u32 bmsr, aux;
- 
-+      if (bp->phy_addr == B44_PHY_ADDR_NO_PHY) {
-+              bp->flags |= B44_FLAG_100_BASE_T;
-+              bp->flags |= B44_FLAG_FULL_DUPLEX;
-+              if (!netif_carrier_ok(bp->dev)) {
-+                      u32 val = br32(B44_TX_CTRL);
-+                      val |= TX_CTRL_DUPLEX;
-+                      bw32(B44_TX_CTRL, val);
-+                      netif_carrier_on(bp->dev);
-+                      b44_link_report(bp);
-+              }
-+              return;
-+      }
-+
-       if (!b44_readphy(bp, MII_BMSR, &bmsr) &&
-           !b44_readphy(bp, B44_MII_AUXCTRL, &aux) &&
-           (bmsr != 0xffff)) {
-@@ -520,14 +544,14 @@
- 
-               if (!netif_carrier_ok(bp->dev) &&
-                   (bmsr & BMSR_LSTATUS)) {
--                      u32 val = br32(bp, B44_TX_CTRL);
-+                      u32 val = br32(B44_TX_CTRL);
-                       u32 local_adv, remote_adv;
- 
-                       if (bp->flags & B44_FLAG_FULL_DUPLEX)
-                               val |= TX_CTRL_DUPLEX;
-                       else
-                               val &= ~TX_CTRL_DUPLEX;
--                      bw32(bp, B44_TX_CTRL, val);
-+                      bw32(B44_TX_CTRL, val);
- 
-                       if (!(bp->flags & B44_FLAG_FORCE_LINK) &&
-                           !b44_readphy(bp, MII_ADVERTISE, &local_adv) &&
-@@ -572,7 +596,7 @@
- {
-       u32 cur, cons;
- 
--      cur  = br32(bp, B44_DMATX_STAT) & DMATX_STAT_CDMASK;
-+      cur  = br32(B44_DMATX_STAT) & DMATX_STAT_CDMASK;
-       cur /= sizeof(struct dma_desc);
- 
-       /* XXX needs updating when NETIF_F_SG is supported */
-@@ -596,7 +620,7 @@
-           TX_BUFFS_AVAIL(bp) > B44_TX_WAKEUP_THRESH)
-               netif_wake_queue(bp->dev);
- 
--      bw32(bp, B44_GPTIMER, 0);
-+      bw32(B44_GPTIMER, 0);
- }
- 
- /* Works like this.  This chip writes a 'struct rx_header" 30 bytes
-@@ -713,7 +737,7 @@
-       u32 cons, prod;
- 
-       received = 0;
--      prod  = br32(bp, B44_DMARX_STAT) & DMARX_STAT_CDMASK;
-+      prod  = br32(B44_DMARX_STAT) & DMARX_STAT_CDMASK;
-       prod /= sizeof(struct dma_desc);
-       cons = bp->rx_cons;
- 
-@@ -792,7 +816,7 @@
-       }
- 
-       bp->rx_cons = cons;
--      bw32(bp, B44_DMARX_PTR, cons * sizeof(struct dma_desc));
-+      bw32(B44_DMARX_PTR, cons * sizeof(struct dma_desc));
- 
-       return received;
- }
-@@ -856,8 +880,8 @@
- 
-       spin_lock_irqsave(&bp->lock, flags);
- 
--      istat = br32(bp, B44_ISTAT);
--      imask = br32(bp, B44_IMASK);
-+      istat = br32(B44_ISTAT);
-+      imask = br32(B44_IMASK);
- 
-       /* ??? What the fuck is the purpose of the interrupt mask
-        * ??? register if we have to mask it out by hand anyways?
-@@ -877,8 +901,8 @@
-                              dev->name);
-               }
- 
--              bw32(bp, B44_ISTAT, istat);
--              br32(bp, B44_ISTAT);
-+              bw32(B44_ISTAT, istat);
-+              br32(B44_ISTAT);
-       }
-       spin_unlock_irqrestore(&bp->lock, flags);
-       return IRQ_RETVAL(handled);
-@@ -965,11 +989,11 @@
- 
-       wmb();
- 
--      bw32(bp, B44_DMATX_PTR, entry * sizeof(struct dma_desc));
-+      bw32(B44_DMATX_PTR, entry * sizeof(struct dma_desc));
-       if (bp->flags & B44_FLAG_BUGGY_TXPTR)
--              bw32(bp, B44_DMATX_PTR, entry * sizeof(struct dma_desc));
-+              bw32(B44_DMATX_PTR, entry * sizeof(struct dma_desc));
-       if (bp->flags & B44_FLAG_REORDER_BUG)
--              br32(bp, B44_DMATX_PTR);
-+              br32(B44_DMATX_PTR);
- 
-       if (TX_BUFFS_AVAIL(bp) < 1)
-               netif_stop_queue(dev);
-@@ -1137,32 +1161,35 @@
- {
-       unsigned long reg;
- 
--      bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
-+      bw32(B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
-       for (reg = B44_TX_GOOD_O; reg <= B44_TX_PAUSE; reg += 4UL)
--              br32(bp, reg);
-+              br32(reg);
-       for (reg = B44_RX_GOOD_O; reg <= B44_RX_NPAUSE; reg += 4UL)
--              br32(bp, reg);
-+              br32(reg);
- }
- 
- /* bp->lock is held. */
- static void b44_chip_reset(struct b44 *bp)
- {
-+      unsigned int sb_clock;
-+
-       if (ssb_is_core_up(bp)) {
--              bw32(bp, B44_RCV_LAZY, 0);
--              bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE);
-+              bw32(B44_RCV_LAZY, 0);
-+              bw32(B44_ENET_CTRL, ENET_CTRL_DISABLE);
-               b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 100, 1);
--              bw32(bp, B44_DMATX_CTRL, 0);
-+              bw32(B44_DMATX_CTRL, 0);
-               bp->tx_prod = bp->tx_cons = 0;
--              if (br32(bp, B44_DMARX_STAT) & DMARX_STAT_EMASK) {
-+              if (br32(B44_DMARX_STAT) & DMARX_STAT_EMASK) {
-                       b44_wait_bit(bp, B44_DMARX_STAT, DMARX_STAT_SIDLE,
-                                    100, 0);
-               }
--              bw32(bp, B44_DMARX_CTRL, 0);
-+              bw32(B44_DMARX_CTRL, 0);
-               bp->rx_prod = bp->rx_cons = 0;
-       } else {
--              ssb_pci_setup(bp, (bp->core_unit == 0 ?
--                                 SBINTVEC_ENET0 :
--                                 SBINTVEC_ENET1));
-+              if (bp->pdev->device != PCI_DEVICE_ID_BCM4713)
-+                      ssb_pci_setup(bp, (bp->core_unit == 0 ?
-+                                         SBINTVEC_ENET0 :
-+                                         SBINTVEC_ENET1));
-       }
- 
-       ssb_core_reset(bp);
-@@ -1170,20 +1197,26 @@
-       b44_clear_stats(bp);
- 
-       /* Make PHY accessible. */
--      bw32(bp, B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE |
--                           (0x0d & MDIO_CTRL_MAXF_MASK)));
--      br32(bp, B44_MDIO_CTRL);
--
--      if (!(br32(bp, B44_DEVCTRL) & DEVCTRL_IPP)) {
--              bw32(bp, B44_ENET_CTRL, ENET_CTRL_EPSEL);
--              br32(bp, B44_ENET_CTRL);
-+      if (bp->pdev->device == PCI_DEVICE_ID_BCM4713)
-+              sb_clock = 100000000; /* 100 MHz */
-+      else
-+              sb_clock = 62500000; /* 62.5 MHz */
-+
-+      bw32(B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE |
-+                           (((sb_clock + (B44_MDC_RATIO / 2)) / B44_MDC_RATIO)
-+                           & MDIO_CTRL_MAXF_MASK)));
-+      br32(B44_MDIO_CTRL);
-+
-+      if (!(br32(B44_DEVCTRL) & DEVCTRL_IPP)) {
-+              bw32(B44_ENET_CTRL, ENET_CTRL_EPSEL);
-+              br32(B44_ENET_CTRL);
-               bp->flags &= ~B44_FLAG_INTERNAL_PHY;
-       } else {
--              u32 val = br32(bp, B44_DEVCTRL);
-+              u32 val = br32(B44_DEVCTRL);
- 
-               if (val & DEVCTRL_EPR) {
--                      bw32(bp, B44_DEVCTRL, (val & ~DEVCTRL_EPR));
--                      br32(bp, B44_DEVCTRL);
-+                      bw32(B44_DEVCTRL, (val & ~DEVCTRL_EPR));
-+                      br32(B44_DEVCTRL);
-                       udelay(100);
-               }
-               bp->flags |= B44_FLAG_INTERNAL_PHY;
-@@ -1200,13 +1233,13 @@
- /* bp->lock is held. */
- static void __b44_set_mac_addr(struct b44 *bp)
- {
--      bw32(bp, B44_CAM_CTRL, 0);
-+      bw32(B44_CAM_CTRL, 0);
-       if (!(bp->dev->flags & IFF_PROMISC)) {
-               u32 val;
- 
-               __b44_cam_write(bp, bp->dev->dev_addr, 0);
--              val = br32(bp, B44_CAM_CTRL);
--              bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
-+              val = br32(B44_CAM_CTRL);
-+              bw32(B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
-       }
- }
- 
-@@ -1240,30 +1273,30 @@
-       b44_setup_phy(bp);
- 
-       /* Enable CRC32, set proper LED modes and power on PHY */
--      bw32(bp, B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL);
--      bw32(bp, B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT));
-+      bw32(B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL);
-+      bw32(B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT));
- 
-       /* This sets the MAC address too.  */
-       __b44_set_rx_mode(bp->dev);
- 
-       /* MTU + eth header + possible VLAN tag + struct rx_header */
--      bw32(bp, B44_RXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
--      bw32(bp, B44_TXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
-+      bw32(B44_RXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
-+      bw32(B44_TXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
- 
--      bw32(bp, B44_TX_WMARK, 56); /* XXX magic */
--      bw32(bp, B44_DMATX_CTRL, DMATX_CTRL_ENABLE);
--      bw32(bp, B44_DMATX_ADDR, bp->tx_ring_dma + bp->dma_offset);
--      bw32(bp, B44_DMARX_CTRL, (DMARX_CTRL_ENABLE |
-+      bw32(B44_TX_WMARK, 56); /* XXX magic */
-+      bw32(B44_DMATX_CTRL, DMATX_CTRL_ENABLE);
-+      bw32(B44_DMATX_ADDR, bp->tx_ring_dma + bp->dma_offset);
-+      bw32(B44_DMARX_CTRL, (DMARX_CTRL_ENABLE |
-                             (bp->rx_offset << DMARX_CTRL_ROSHIFT)));
--      bw32(bp, B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset);
-+      bw32(B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset);
- 
--      bw32(bp, B44_DMARX_PTR, bp->rx_pending);
-+      bw32(B44_DMARX_PTR, bp->rx_pending);
-       bp->rx_prod = bp->rx_pending;   
- 
--      bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
-+      bw32(B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
- 
--      val = br32(bp, B44_ENET_CTRL);
--      bw32(bp, B44_ENET_CTRL, (val | ENET_CTRL_ENABLE));
-+      val = br32(B44_ENET_CTRL);
-+      bw32(B44_ENET_CTRL, (val | ENET_CTRL_ENABLE));
- }
- 
- static int b44_open(struct net_device *dev)
-@@ -1416,11 +1449,11 @@
-       int i=0;
-       unsigned char zero[6] = {0,0,0,0,0,0};
- 
--      val = br32(bp, B44_RXCONFIG);
-+      val = br32(B44_RXCONFIG);
-       val &= ~(RXCONFIG_PROMISC | RXCONFIG_ALLMULTI);
-       if (dev->flags & IFF_PROMISC) {
-               val |= RXCONFIG_PROMISC;
--              bw32(bp, B44_RXCONFIG, val);
-+              bw32(B44_RXCONFIG, val);
-       } else {
-               __b44_set_mac_addr(bp);
- 
-@@ -1432,9 +1465,9 @@
-               for(;i<64;i++) {
-                       __b44_cam_write(bp, zero, i);                   
-               }
--              bw32(bp, B44_RXCONFIG, val);
--              val = br32(bp, B44_CAM_CTRL);
--              bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
-+              bw32(B44_RXCONFIG, val);
-+              val = br32(B44_CAM_CTRL);
-+              bw32(B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
-       }
- }
- 
-@@ -1704,19 +1737,41 @@
- {
-       u8 eeprom[128];
-       int err;
-+      unsigned long flags;
- 
--      err = b44_read_eeprom(bp, &eeprom[0]);
--      if (err)
--              goto out;
--
--      bp->dev->dev_addr[0] = eeprom[79];
--      bp->dev->dev_addr[1] = eeprom[78];
--      bp->dev->dev_addr[2] = eeprom[81];
--      bp->dev->dev_addr[3] = eeprom[80];
--      bp->dev->dev_addr[4] = eeprom[83];
--      bp->dev->dev_addr[5] = eeprom[82];
--
--      bp->phy_addr = eeprom[90] & 0x1f;
-+      if (bp->pdev->device == PCI_DEVICE_ID_BCM4713) {
-+              /* 
-+               * BCM47xx boards don't have a EEPROM. The MAC is stored in
-+               * a NVRAM area somewhere in the flash memory. As we don't
-+               * know the location and/or the format of the NVRAM area
-+               * here, we simply rely on the bootloader to write the
-+               * MAC into the CAM.
-+               */
-+              spin_lock_irqsave(&bp->lock, flags);
-+              __b44_cam_read(bp, bp->dev->dev_addr, 0);
-+              spin_unlock_irqrestore(&bp->lock, flags);
-+
-+              /* 
-+               * BCM47xx boards don't have a PHY. Usually there is a switch
-+               * chip with multiple PHYs connected to the PHY port.
-+               */
-+              bp->phy_addr = B44_PHY_ADDR_NO_PHY;
-+              bp->dma_offset = 0;
-+      } else {
-+              err = b44_read_eeprom(bp, &eeprom[0]);
-+              if (err)
-+                      return err;
-+
-+              bp->dev->dev_addr[0] = eeprom[79];
-+              bp->dev->dev_addr[1] = eeprom[78];
-+              bp->dev->dev_addr[2] = eeprom[81];
-+              bp->dev->dev_addr[3] = eeprom[80];
-+              bp->dev->dev_addr[4] = eeprom[83];
-+              bp->dev->dev_addr[5] = eeprom[82];
-+
-+              bp->phy_addr = eeprom[90] & 0x1f;
-+              bp->dma_offset = SB_PCI_DMA;
-+      } 
- 
-       /* With this, plus the rx_header prepended to the data by the
-        * hardware, we'll land the ethernet header on a 2-byte boundary.
-@@ -1726,13 +1781,12 @@
-       bp->imask = IMASK_DEF;
- 
-       bp->core_unit = ssb_core_unit(bp);
--      bp->dma_offset = SB_PCI_DMA;
- 
-       /* XXX - really required? 
-          bp->flags |= B44_FLAG_BUGGY_TXPTR;
-          */
--out:
--      return err;
-+
-+      return 0;
- }
- 
- static int __devinit b44_init_one(struct pci_dev *pdev,
-@@ -1810,7 +1864,7 @@
- 
-       spin_lock_init(&bp->lock);
- 
--      bp->regs = ioremap(b44reg_base, b44reg_len);
-+      bp->regs = (unsigned long) ioremap(b44reg_base, b44reg_len);
-       if (bp->regs == 0UL) {
-               printk(KERN_ERR PFX "Cannot map device registers, "
-                      "aborting.\n");
-@@ -1871,7 +1925,8 @@
- 
-       pci_save_state(bp->pdev);
- 
--      printk(KERN_INFO "%s: Broadcom 4400 10/100BaseT Ethernet ", dev->name);
-+      printk(KERN_INFO "%s: Broadcom %s 10/100BaseT Ethernet ", dev->name,
-+              (pdev->device == PCI_DEVICE_ID_BCM4713) ? "47xx" : "4400");
-       for (i = 0; i < 6; i++)
-               printk("%2.2x%c", dev->dev_addr[i],
-                      i == 5 ? '\n' : ':');
-@@ -1879,7 +1934,7 @@
-       return 0;
- 
- err_out_iounmap:
--      iounmap(bp->regs);
-+      iounmap((void *) bp->regs);
- 
- err_out_free_dev:
-       free_netdev(dev);
-@@ -1901,7 +1956,7 @@
-               struct b44 *bp = netdev_priv(dev);
- 
-               unregister_netdev(dev);
--              iounmap(bp->regs);
-+              iounmap((void *) bp->regs);
-               free_netdev(dev);
-               pci_release_regions(pdev);
-               pci_disable_device(pdev);
-diff -Nur linux-2.6.12.5/drivers/net/b44.h linux-2.6.12.5-brcm/drivers/net/b44.h
---- linux-2.6.12.5/drivers/net/b44.h   2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/drivers/net/b44.h      2005-08-28 11:12:20.694819024 +0200
-@@ -292,6 +292,9 @@
- #define SSB_PCI_MASK1         0xfc000000
- #define SSB_PCI_MASK2         0xc0000000
- 
-+#define br32(REG)     readl(bp->regs + (REG))
-+#define bw32(REG,VAL) writel((VAL), bp->regs + (REG))
-+
- /* 4400 PHY registers */
- #define B44_MII_AUXCTRL               24      /* Auxiliary Control */
- #define  MII_AUXCTRL_DUPLEX   0x0001  /* Full Duplex */
-@@ -345,6 +348,8 @@
- };
- 
- #define B44_MCAST_TABLE_SIZE  32
-+#define B44_PHY_ADDR_NO_PHY   30
-+#define B44_MDC_RATIO         5000000
- 
- /* SW copy of device statistics, kept up to date by periodic timer
-  * which probes HW values.  Must have same relative layout as HW
-@@ -410,7 +415,7 @@
-       struct net_device_stats stats;
-       struct b44_hw_stats     hw_stats;
- 
--      void __iomem            *regs;
-+      unsigned long           regs;
-       struct pci_dev          *pdev;
-       struct net_device       *dev;
- 
 diff -Nur linux-2.6.12.5/include/asm-mips/bootinfo.h linux-2.6.12.5-brcm/include/asm-mips/bootinfo.h
 --- linux-2.6.12.5/include/asm-mips/bootinfo.h 2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/include/asm-mips/bootinfo.h    2005-08-28 11:12:20.695818872 +0200
++++ linux-2.6.12.5-brcm/include/asm-mips/bootinfo.h    2005-09-16 10:29:18.415555312 +0200
 @@ -213,6 +213,12 @@
  #define MACH_GROUP_TITAN       22     /* PMC-Sierra Titan             */
  #define  MACH_TITAN_YOSEMITE  1       /* PMC-Sierra Yosemite          */
@@ -14087,7 +13328,7 @@ diff -Nur linux-2.6.12.5/include/asm-mips/bootinfo.h linux-2.6.12.5-brcm/include
  const char *get_system_type(void);
 diff -Nur linux-2.6.12.5/include/asm-mips/cpu.h linux-2.6.12.5-brcm/include/asm-mips/cpu.h
 --- linux-2.6.12.5/include/asm-mips/cpu.h      2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/include/asm-mips/cpu.h 2005-08-28 11:12:20.695818872 +0200
++++ linux-2.6.12.5-brcm/include/asm-mips/cpu.h 2005-09-16 10:29:18.416555160 +0200
 @@ -87,6 +87,13 @@
  #define PRID_IMP_SR71000        0x0400
  
@@ -14115,7 +13356,7 @@ diff -Nur linux-2.6.12.5/include/asm-mips/cpu.h linux-2.6.12.5-brcm/include/asm-
   * ISA Level encodings
 diff -Nur linux-2.6.12.5/include/asm-mips/mipsregs.h linux-2.6.12.5-brcm/include/asm-mips/mipsregs.h
 --- linux-2.6.12.5/include/asm-mips/mipsregs.h 2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/include/asm-mips/mipsregs.h    2005-08-28 11:12:20.722814768 +0200
++++ linux-2.6.12.5-brcm/include/asm-mips/mipsregs.h    2005-09-16 10:29:18.426553640 +0200
 @@ -790,10 +790,18 @@
  #define read_c0_config1()     __read_32bit_c0_register($16, 1)
  #define read_c0_config2()     __read_32bit_c0_register($16, 2)
@@ -14137,7 +13378,7 @@ diff -Nur linux-2.6.12.5/include/asm-mips/mipsregs.h linux-2.6.12.5-brcm/include
   * The WatchLo register.  There may be upto 8 of them.
 diff -Nur linux-2.6.12.5/include/linux/init.h linux-2.6.12.5-brcm/include/linux/init.h
 --- linux-2.6.12.5/include/linux/init.h        2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/include/linux/init.h   2005-08-28 11:12:20.723814616 +0200
++++ linux-2.6.12.5-brcm/include/linux/init.h   2005-09-16 10:29:18.426553640 +0200
 @@ -86,6 +86,8 @@
        static initcall_t __initcall_##fn __attribute_used__ \
        __attribute__((__section__(".initcall" level ".init"))) = fn
@@ -14149,7 +13390,7 @@ diff -Nur linux-2.6.12.5/include/linux/init.h linux-2.6.12.5-brcm/include/linux/
  #define arch_initcall(fn)             __define_initcall("3",fn)
 diff -Nur linux-2.6.12.5/include/linux/pci_ids.h linux-2.6.12.5-brcm/include/linux/pci_ids.h
 --- linux-2.6.12.5/include/linux/pci_ids.h     2005-08-15 02:20:18.000000000 +0200
-+++ linux-2.6.12.5-brcm/include/linux/pci_ids.h        2005-08-28 11:12:20.726814160 +0200
++++ linux-2.6.12.5-brcm/include/linux/pci_ids.h        2005-09-16 10:29:18.429553184 +0200
 @@ -2110,6 +2110,7 @@
  #define PCI_DEVICE_ID_TIGON3_5901_2   0x170e
  #define PCI_DEVICE_ID_BCM4401         0x4401
diff --git a/target/linux/linux-2.6/patches/generic/003-net-b44.patch b/target/linux/linux-2.6/patches/generic/003-net-b44.patch
new file mode 100644 (file)
index 0000000..dcab825
--- /dev/null
+++ b/target/linux/linux-2.6/patches/generic/003-net-b44.patch
@@ -0,0 +1,759 @@
+diff -Nur linux-2.6.12.5/drivers/net/b44.c linux-2.6.12.5-b44/drivers/net/b44.c
+--- linux-2.6.12.5/drivers/net/b44.c   2005-08-15 02:20:18.000000000 +0200
++++ linux-2.6.12.5-b44/drivers/net/b44.c       2005-09-16 10:33:56.284312840 +0200
+@@ -1,7 +1,8 @@
+-/* b44.c: Broadcom 4400 device driver.
++/* b44.c: Broadcom 4400/47xx device driver.
+  *
+  * Copyright (C) 2002 David S. Miller (davem@redhat.com)
+- * Fixed by Pekka Pietikainen (pp@ee.oulu.fi)
++ * Copyright (C) 2004 Pekka Pietikainen (pp@ee.oulu.fi)
++ * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
+  *
+  * Distribute under GPL.
+  */
+@@ -78,7 +79,7 @@
+       DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
+ 
+ MODULE_AUTHOR("Florian Schirmer, Pekka Pietikainen, David S. Miller");
+-MODULE_DESCRIPTION("Broadcom 4400 10/100 PCI ethernet driver");
++MODULE_DESCRIPTION("Broadcom 4400/47xx 10/100 PCI ethernet driver");
+ MODULE_LICENSE("GPL");
+ MODULE_VERSION(DRV_MODULE_VERSION);
+ 
+@@ -93,6 +94,8 @@
+         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
+       { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_BCM4401B1,
+         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
++      { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_BCM4713,
++        PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
+       { }     /* terminate list with empty entry */
+ };
+ 
+@@ -106,24 +109,13 @@
+ static void b44_poll_controller(struct net_device *dev);
+ #endif
+ 
+-static inline unsigned long br32(const struct b44 *bp, unsigned long reg)
+-{
+-      return readl(bp->regs + reg);
+-}
+-
+-static inline void bw32(const struct b44 *bp, 
+-                      unsigned long reg, unsigned long val)
+-{
+-      writel(val, bp->regs + reg);
+-}
+-
+ static int b44_wait_bit(struct b44 *bp, unsigned long reg,
+                       u32 bit, unsigned long timeout, const int clear)
+ {
+       unsigned long i;
+ 
+       for (i = 0; i < timeout; i++) {
+-              u32 val = br32(bp, reg);
++              u32 val = br32(reg);
+ 
+               if (clear && !(val & bit))
+                       break;
+@@ -154,7 +146,7 @@
+ 
+ static u32 ssb_get_core_rev(struct b44 *bp)
+ {
+-      return (br32(bp, B44_SBIDHIGH) & SBIDHIGH_RC_MASK);
++      return (br32(B44_SBIDHIGH) & SBIDHIGH_RC_MASK);
+ }
+ 
+ static u32 ssb_pci_setup(struct b44 *bp, u32 cores)
+@@ -165,13 +157,13 @@
+       pci_write_config_dword(bp->pdev, SSB_BAR0_WIN, BCM4400_PCI_CORE_ADDR);
+       pci_rev = ssb_get_core_rev(bp);
+ 
+-      val = br32(bp, B44_SBINTVEC);
++      val = br32(B44_SBINTVEC);
+       val |= cores;
+-      bw32(bp, B44_SBINTVEC, val);
++      bw32(B44_SBINTVEC, val);
+ 
+-      val = br32(bp, SSB_PCI_TRANS_2);
++      val = br32(SSB_PCI_TRANS_2);
+       val |= SSB_PCI_PREF | SSB_PCI_BURST;
+-      bw32(bp, SSB_PCI_TRANS_2, val);
++      bw32(SSB_PCI_TRANS_2, val);
+ 
+       pci_write_config_dword(bp->pdev, SSB_BAR0_WIN, bar_orig);
+ 
+@@ -180,18 +172,18 @@
+ 
+ static void ssb_core_disable(struct b44 *bp)
+ {
+-      if (br32(bp, B44_SBTMSLOW) & SBTMSLOW_RESET)
++      if (br32(B44_SBTMSLOW) & SBTMSLOW_RESET)
+               return;
+ 
+-      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_CLOCK));
++      bw32(B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_CLOCK));
+       b44_wait_bit(bp, B44_SBTMSLOW, SBTMSLOW_REJECT, 100000, 0);
+       b44_wait_bit(bp, B44_SBTMSHIGH, SBTMSHIGH_BUSY, 100000, 1);
+-      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_FGC | SBTMSLOW_CLOCK |
++      bw32(B44_SBTMSLOW, (SBTMSLOW_FGC | SBTMSLOW_CLOCK |
+                           SBTMSLOW_REJECT | SBTMSLOW_RESET));
+-      br32(bp, B44_SBTMSLOW);
++      br32(B44_SBTMSLOW);
+       udelay(1);
+-      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_RESET));
+-      br32(bp, B44_SBTMSLOW);
++      bw32(B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_RESET));
++      br32(B44_SBTMSLOW);
+       udelay(1);
+ }
+ 
+@@ -200,58 +192,65 @@
+       u32 val;
+ 
+       ssb_core_disable(bp);
+-      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_RESET | SBTMSLOW_CLOCK | SBTMSLOW_FGC));
+-      br32(bp, B44_SBTMSLOW);
++      bw32(B44_SBTMSLOW, (SBTMSLOW_RESET | SBTMSLOW_CLOCK | SBTMSLOW_FGC));
++      br32(B44_SBTMSLOW);
+       udelay(1);
+ 
+       /* Clear SERR if set, this is a hw bug workaround.  */
+-      if (br32(bp, B44_SBTMSHIGH) & SBTMSHIGH_SERR)
+-              bw32(bp, B44_SBTMSHIGH, 0);
++      if (br32(B44_SBTMSHIGH) & SBTMSHIGH_SERR)
++              bw32(B44_SBTMSHIGH, 0);
+ 
+-      val = br32(bp, B44_SBIMSTATE);
++      val = br32(B44_SBIMSTATE);
+       if (val & (SBIMSTATE_IBE | SBIMSTATE_TO))
+-              bw32(bp, B44_SBIMSTATE, val & ~(SBIMSTATE_IBE | SBIMSTATE_TO));
++              bw32(B44_SBIMSTATE, val & ~(SBIMSTATE_IBE | SBIMSTATE_TO));
+ 
+-      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK | SBTMSLOW_FGC));
+-      br32(bp, B44_SBTMSLOW);
++      bw32(B44_SBTMSLOW, (SBTMSLOW_CLOCK | SBTMSLOW_FGC));
++      br32(B44_SBTMSLOW);
+       udelay(1);
+ 
+-      bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK));
+-      br32(bp, B44_SBTMSLOW);
++      bw32(B44_SBTMSLOW, (SBTMSLOW_CLOCK));
++      br32(B44_SBTMSLOW);
+       udelay(1);
+ }
+ 
++static int b44_4713_instance;
++
+ static int ssb_core_unit(struct b44 *bp)
+ {
+-#if 0
+-      u32 val = br32(bp, B44_SBADMATCH0);
+-      u32 base;
+-
+-      type = val & SBADMATCH0_TYPE_MASK;
+-      switch (type) {
+-      case 0:
+-              base = val & SBADMATCH0_BS0_MASK;
+-              break;
+-
+-      case 1:
+-              base = val & SBADMATCH0_BS1_MASK;
+-              break;
+-
+-      case 2:
+-      default:
+-              base = val & SBADMATCH0_BS2_MASK;
+-              break;
+-      };
+-#endif
+-      return 0;
++      if (bp->pdev->device == PCI_DEVICE_ID_BCM4713)
++              return b44_4713_instance++;
++      else
++              return 0;
+ }
+ 
+ static int ssb_is_core_up(struct b44 *bp)
+ {
+-      return ((br32(bp, B44_SBTMSLOW) & (SBTMSLOW_RESET | SBTMSLOW_REJECT | SBTMSLOW_CLOCK))
++      return ((br32(B44_SBTMSLOW) & (SBTMSLOW_RESET | SBTMSLOW_REJECT | SBTMSLOW_CLOCK))
+               == SBTMSLOW_CLOCK);
+ }
+ 
++static void __b44_cam_read(struct b44 *bp, unsigned char *data, int index)
++{
++      u32 val;
++
++      bw32(B44_CAM_CTRL, (CAM_CTRL_READ |
++                          (index << CAM_CTRL_INDEX_SHIFT)));
++
++      b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);  
++
++      val = br32(B44_CAM_DATA_LO);
++
++      data[2] = (val >> 24) & 0xFF;
++      data[3] = (val >> 16) & 0xFF;
++      data[4] = (val >> 8) & 0xFF;
++      data[5] = (val >> 0) & 0xFF;
++
++      val = br32(B44_CAM_DATA_HI);
++      
++      data[0] = (val >> 8) & 0xFF;
++      data[1] = (val >> 0) & 0xFF;
++}
++
+ static void __b44_cam_write(struct b44 *bp, unsigned char *data, int index)
+ {
+       u32 val;
+@@ -260,19 +259,19 @@
+       val |= ((u32) data[3]) << 16;
+       val |= ((u32) data[4]) <<  8;
+       val |= ((u32) data[5]) <<  0;
+-      bw32(bp, B44_CAM_DATA_LO, val);
++      bw32(B44_CAM_DATA_LO, val);
+       val = (CAM_DATA_HI_VALID | 
+              (((u32) data[0]) << 8) |
+              (((u32) data[1]) << 0));
+-      bw32(bp, B44_CAM_DATA_HI, val);
+-      bw32(bp, B44_CAM_CTRL, (CAM_CTRL_WRITE |
++      bw32(B44_CAM_DATA_HI, val);
++      bw32(B44_CAM_CTRL, (CAM_CTRL_WRITE |
+                           (index << CAM_CTRL_INDEX_SHIFT)));
+       b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);  
+ }
+ 
+ static inline void __b44_disable_ints(struct b44 *bp)
+ {
+-      bw32(bp, B44_IMASK, 0);
++      bw32(B44_IMASK, 0);
+ }
+ 
+ static void b44_disable_ints(struct b44 *bp)
+@@ -280,34 +279,40 @@
+       __b44_disable_ints(bp);
+ 
+       /* Flush posted writes. */
+-      br32(bp, B44_IMASK);
++      br32(B44_IMASK);
+ }
+ 
+ static void b44_enable_ints(struct b44 *bp)
+ {
+-      bw32(bp, B44_IMASK, bp->imask);
++      bw32(B44_IMASK, bp->imask);
+ }
+ 
+ static int b44_readphy(struct b44 *bp, int reg, u32 *val)
+ {
+       int err;
+ 
+-      bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
+-      bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
++      if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
++              return 0;
++
++      bw32(B44_EMAC_ISTAT, EMAC_INT_MII);
++      bw32(B44_MDIO_DATA, (MDIO_DATA_SB_START |
+                            (MDIO_OP_READ << MDIO_DATA_OP_SHIFT) |
+                            (bp->phy_addr << MDIO_DATA_PMD_SHIFT) |
+                            (reg << MDIO_DATA_RA_SHIFT) |
+                            (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT)));
+       err = b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
+-      *val = br32(bp, B44_MDIO_DATA) & MDIO_DATA_DATA;
++      *val = br32(B44_MDIO_DATA) & MDIO_DATA_DATA;
+ 
+       return err;
+ }
+ 
+ static int b44_writephy(struct b44 *bp, int reg, u32 val)
+ {
+-      bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
+-      bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
++      if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
++              return 0;
++
++      bw32(B44_EMAC_ISTAT, EMAC_INT_MII);
++      bw32(B44_MDIO_DATA, (MDIO_DATA_SB_START |
+                            (MDIO_OP_WRITE << MDIO_DATA_OP_SHIFT) |
+                            (bp->phy_addr << MDIO_DATA_PMD_SHIFT) |
+                            (reg << MDIO_DATA_RA_SHIFT) |
+@@ -344,6 +349,9 @@
+       u32 val;
+       int err;
+ 
++      if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
++              return 0;
++
+       err = b44_writephy(bp, MII_BMCR, BMCR_RESET);
+       if (err)
+               return err;
+@@ -367,20 +375,20 @@
+       bp->flags &= ~(B44_FLAG_TX_PAUSE | B44_FLAG_RX_PAUSE);
+       bp->flags |= pause_flags;
+ 
+-      val = br32(bp, B44_RXCONFIG);
++      val = br32(B44_RXCONFIG);
+       if (pause_flags & B44_FLAG_RX_PAUSE)
+               val |= RXCONFIG_FLOW;
+       else
+               val &= ~RXCONFIG_FLOW;
+-      bw32(bp, B44_RXCONFIG, val);
++      bw32(B44_RXCONFIG, val);
+ 
+-      val = br32(bp, B44_MAC_FLOW);
++      val = br32(B44_MAC_FLOW);
+       if (pause_flags & B44_FLAG_TX_PAUSE)
+               val |= (MAC_FLOW_PAUSE_ENAB |
+                       (0xc0 & MAC_FLOW_RX_HI_WATER));
+       else
+               val &= ~MAC_FLOW_PAUSE_ENAB;
+-      bw32(bp, B44_MAC_FLOW, val);
++      bw32(B44_MAC_FLOW, val);
+ }
+ 
+ static void b44_set_flow_ctrl(struct b44 *bp, u32 local, u32 remote)
+@@ -414,6 +422,9 @@
+       u32 val;
+       int err;
+ 
++      if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
++              return 0;
++
+       if ((err = b44_readphy(bp, B44_MII_ALEDCTRL, &val)) != 0)
+               goto out;
+       if ((err = b44_writephy(bp, B44_MII_ALEDCTRL,
+@@ -476,11 +487,11 @@
+ 
+       val = &bp->hw_stats.tx_good_octets;
+       for (reg = B44_TX_GOOD_O; reg <= B44_TX_PAUSE; reg += 4UL) {
+-              *val++ += br32(bp, reg);
++              *val++ += br32(reg);
+       }
+       val = &bp->hw_stats.rx_good_octets;
+       for (reg = B44_RX_GOOD_O; reg <= B44_RX_NPAUSE; reg += 4UL) {
+-              *val++ += br32(bp, reg);
++              *val++ += br32(reg);
+       }
+ }
+ 
+@@ -506,6 +517,19 @@
+ {
+       u32 bmsr, aux;
+ 
++      if (bp->phy_addr == B44_PHY_ADDR_NO_PHY) {
++              bp->flags |= B44_FLAG_100_BASE_T;
++              bp->flags |= B44_FLAG_FULL_DUPLEX;
++              if (!netif_carrier_ok(bp->dev)) {
++                      u32 val = br32(B44_TX_CTRL);
++                      val |= TX_CTRL_DUPLEX;
++                      bw32(B44_TX_CTRL, val);
++                      netif_carrier_on(bp->dev);
++                      b44_link_report(bp);
++              }
++              return;
++      }
++
+       if (!b44_readphy(bp, MII_BMSR, &bmsr) &&
+           !b44_readphy(bp, B44_MII_AUXCTRL, &aux) &&
+           (bmsr != 0xffff)) {
+@@ -520,14 +544,14 @@
+ 
+               if (!netif_carrier_ok(bp->dev) &&
+                   (bmsr & BMSR_LSTATUS)) {
+-                      u32 val = br32(bp, B44_TX_CTRL);
++                      u32 val = br32(B44_TX_CTRL);
+                       u32 local_adv, remote_adv;
+ 
+                       if (bp->flags & B44_FLAG_FULL_DUPLEX)
+                               val |= TX_CTRL_DUPLEX;
+                       else
+                               val &= ~TX_CTRL_DUPLEX;
+-                      bw32(bp, B44_TX_CTRL, val);
++                      bw32(B44_TX_CTRL, val);
+ 
+                       if (!(bp->flags & B44_FLAG_FORCE_LINK) &&
+                           !b44_readphy(bp, MII_ADVERTISE, &local_adv) &&
+@@ -572,7 +596,7 @@
+ {
+       u32 cur, cons;
+ 
+-      cur  = br32(bp, B44_DMATX_STAT) & DMATX_STAT_CDMASK;
++      cur  = br32(B44_DMATX_STAT) & DMATX_STAT_CDMASK;
+       cur /= sizeof(struct dma_desc);
+ 
+       /* XXX needs updating when NETIF_F_SG is supported */
+@@ -596,7 +620,7 @@
+           TX_BUFFS_AVAIL(bp) > B44_TX_WAKEUP_THRESH)
+               netif_wake_queue(bp->dev);
+ 
+-      bw32(bp, B44_GPTIMER, 0);
++      bw32(B44_GPTIMER, 0);
+ }
+ 
+ /* Works like this.  This chip writes a 'struct rx_header" 30 bytes
+@@ -713,7 +737,7 @@
+       u32 cons, prod;
+ 
+       received = 0;
+-      prod  = br32(bp, B44_DMARX_STAT) & DMARX_STAT_CDMASK;
++      prod  = br32(B44_DMARX_STAT) & DMARX_STAT_CDMASK;
+       prod /= sizeof(struct dma_desc);
+       cons = bp->rx_cons;
+ 
+@@ -792,7 +816,7 @@
+       }
+ 
+       bp->rx_cons = cons;
+-      bw32(bp, B44_DMARX_PTR, cons * sizeof(struct dma_desc));
++      bw32(B44_DMARX_PTR, cons * sizeof(struct dma_desc));
+ 
+       return received;
+ }
+@@ -856,8 +880,8 @@
+ 
+       spin_lock_irqsave(&bp->lock, flags);
+ 
+-      istat = br32(bp, B44_ISTAT);
+-      imask = br32(bp, B44_IMASK);
++      istat = br32(B44_ISTAT);
++      imask = br32(B44_IMASK);
+ 
+       /* ??? What the fuck is the purpose of the interrupt mask
+        * ??? register if we have to mask it out by hand anyways?
+@@ -877,8 +901,8 @@
+                              dev->name);
+               }
+ 
+-              bw32(bp, B44_ISTAT, istat);
+-              br32(bp, B44_ISTAT);
++              bw32(B44_ISTAT, istat);
++              br32(B44_ISTAT);
+       }
+       spin_unlock_irqrestore(&bp->lock, flags);
+       return IRQ_RETVAL(handled);
+@@ -965,11 +989,11 @@
+ 
+       wmb();
+ 
+-      bw32(bp, B44_DMATX_PTR, entry * sizeof(struct dma_desc));
++      bw32(B44_DMATX_PTR, entry * sizeof(struct dma_desc));
+       if (bp->flags & B44_FLAG_BUGGY_TXPTR)
+-              bw32(bp, B44_DMATX_PTR, entry * sizeof(struct dma_desc));
++              bw32(B44_DMATX_PTR, entry * sizeof(struct dma_desc));
+       if (bp->flags & B44_FLAG_REORDER_BUG)
+-              br32(bp, B44_DMATX_PTR);
++              br32(B44_DMATX_PTR);
+ 
+       if (TX_BUFFS_AVAIL(bp) < 1)
+               netif_stop_queue(dev);
+@@ -1137,32 +1161,35 @@
+ {
+       unsigned long reg;
+ 
+-      bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
++      bw32(B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
+       for (reg = B44_TX_GOOD_O; reg <= B44_TX_PAUSE; reg += 4UL)
+-              br32(bp, reg);
++              br32(reg);
+       for (reg = B44_RX_GOOD_O; reg <= B44_RX_NPAUSE; reg += 4UL)
+-              br32(bp, reg);
++              br32(reg);
+ }
+ 
+ /* bp->lock is held. */
+ static void b44_chip_reset(struct b44 *bp)
+ {
++      unsigned int sb_clock;
++
+       if (ssb_is_core_up(bp)) {
+-              bw32(bp, B44_RCV_LAZY, 0);
+-              bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE);
++              bw32(B44_RCV_LAZY, 0);
++              bw32(B44_ENET_CTRL, ENET_CTRL_DISABLE);
+               b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 100, 1);
+-              bw32(bp, B44_DMATX_CTRL, 0);
++              bw32(B44_DMATX_CTRL, 0);
+               bp->tx_prod = bp->tx_cons = 0;
+-              if (br32(bp, B44_DMARX_STAT) & DMARX_STAT_EMASK) {
++              if (br32(B44_DMARX_STAT) & DMARX_STAT_EMASK) {
+                       b44_wait_bit(bp, B44_DMARX_STAT, DMARX_STAT_SIDLE,
+                                    100, 0);
+               }
+-              bw32(bp, B44_DMARX_CTRL, 0);
++              bw32(B44_DMARX_CTRL, 0);
+               bp->rx_prod = bp->rx_cons = 0;
+       } else {
+-              ssb_pci_setup(bp, (bp->core_unit == 0 ?
+-                                 SBINTVEC_ENET0 :
+-                                 SBINTVEC_ENET1));
++              if (bp->pdev->device != PCI_DEVICE_ID_BCM4713)
++                      ssb_pci_setup(bp, (bp->core_unit == 0 ?
++                                         SBINTVEC_ENET0 :
++                                         SBINTVEC_ENET1));
+       }
+ 
+       ssb_core_reset(bp);
+@@ -1170,20 +1197,26 @@
+       b44_clear_stats(bp);
+ 
+       /* Make PHY accessible. */
+-      bw32(bp, B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE |
+-                           (0x0d & MDIO_CTRL_MAXF_MASK)));
+-      br32(bp, B44_MDIO_CTRL);
+-
+-      if (!(br32(bp, B44_DEVCTRL) & DEVCTRL_IPP)) {
+-              bw32(bp, B44_ENET_CTRL, ENET_CTRL_EPSEL);
+-              br32(bp, B44_ENET_CTRL);
++      if (bp->pdev->device == PCI_DEVICE_ID_BCM4713)
++              sb_clock = 100000000; /* 100 MHz */
++      else
++              sb_clock = 62500000; /* 62.5 MHz */
++
++      bw32(B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE |
++                           (((sb_clock + (B44_MDC_RATIO / 2)) / B44_MDC_RATIO)
++                           & MDIO_CTRL_MAXF_MASK)));
++      br32(B44_MDIO_CTRL);
++
++      if (!(br32(B44_DEVCTRL) & DEVCTRL_IPP)) {
++              bw32(B44_ENET_CTRL, ENET_CTRL_EPSEL);
++              br32(B44_ENET_CTRL);
+               bp->flags &= ~B44_FLAG_INTERNAL_PHY;
+       } else {
+-              u32 val = br32(bp, B44_DEVCTRL);
++              u32 val = br32(B44_DEVCTRL);
+ 
+               if (val & DEVCTRL_EPR) {
+-                      bw32(bp, B44_DEVCTRL, (val & ~DEVCTRL_EPR));
+-                      br32(bp, B44_DEVCTRL);
++                      bw32(B44_DEVCTRL, (val & ~DEVCTRL_EPR));
++                      br32(B44_DEVCTRL);
+                       udelay(100);
+               }
+               bp->flags |= B44_FLAG_INTERNAL_PHY;
+@@ -1200,13 +1233,13 @@
+ /* bp->lock is held. */
+ static void __b44_set_mac_addr(struct b44 *bp)
+ {
+-      bw32(bp, B44_CAM_CTRL, 0);
++      bw32(B44_CAM_CTRL, 0);
+       if (!(bp->dev->flags & IFF_PROMISC)) {
+               u32 val;
+ 
+               __b44_cam_write(bp, bp->dev->dev_addr, 0);
+-              val = br32(bp, B44_CAM_CTRL);
+-              bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
++              val = br32(B44_CAM_CTRL);
++              bw32(B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
+       }
+ }
+ 
+@@ -1240,30 +1273,30 @@
+       b44_setup_phy(bp);
+ 
+       /* Enable CRC32, set proper LED modes and power on PHY */
+-      bw32(bp, B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL);
+-      bw32(bp, B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT));
++      bw32(B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL);
++      bw32(B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT));
+ 
+       /* This sets the MAC address too.  */
+       __b44_set_rx_mode(bp->dev);
+ 
+       /* MTU + eth header + possible VLAN tag + struct rx_header */
+-      bw32(bp, B44_RXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
+-      bw32(bp, B44_TXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
++      bw32(B44_RXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
++      bw32(B44_TXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
+ 
+-      bw32(bp, B44_TX_WMARK, 56); /* XXX magic */
+-      bw32(bp, B44_DMATX_CTRL, DMATX_CTRL_ENABLE);
+-      bw32(bp, B44_DMATX_ADDR, bp->tx_ring_dma + bp->dma_offset);
+-      bw32(bp, B44_DMARX_CTRL, (DMARX_CTRL_ENABLE |
++      bw32(B44_TX_WMARK, 56); /* XXX magic */
++      bw32(B44_DMATX_CTRL, DMATX_CTRL_ENABLE);
++      bw32(B44_DMATX_ADDR, bp->tx_ring_dma + bp->dma_offset);
++      bw32(B44_DMARX_CTRL, (DMARX_CTRL_ENABLE |
+                             (bp->rx_offset << DMARX_CTRL_ROSHIFT)));
+-      bw32(bp, B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset);
++      bw32(B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset);
+ 
+-      bw32(bp, B44_DMARX_PTR, bp->rx_pending);
++      bw32(B44_DMARX_PTR, bp->rx_pending);
+       bp->rx_prod = bp->rx_pending;   
+ 
+-      bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
++      bw32(B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
+ 
+-      val = br32(bp, B44_ENET_CTRL);
+-      bw32(bp, B44_ENET_CTRL, (val | ENET_CTRL_ENABLE));
++      val = br32(B44_ENET_CTRL);
++      bw32(B44_ENET_CTRL, (val | ENET_CTRL_ENABLE));
+ }
+ 
+ static int b44_open(struct net_device *dev)
+@@ -1416,11 +1449,11 @@
+       int i=0;
+       unsigned char zero[6] = {0,0,0,0,0,0};
+ 
+-      val = br32(bp, B44_RXCONFIG);
++      val = br32(B44_RXCONFIG);
+       val &= ~(RXCONFIG_PROMISC | RXCONFIG_ALLMULTI);
+       if (dev->flags & IFF_PROMISC) {
+               val |= RXCONFIG_PROMISC;
+-              bw32(bp, B44_RXCONFIG, val);
++              bw32(B44_RXCONFIG, val);
+       } else {
+               __b44_set_mac_addr(bp);
+ 
+@@ -1432,9 +1465,9 @@
+               for(;i<64;i++) {
+                       __b44_cam_write(bp, zero, i);                   
+               }
+-              bw32(bp, B44_RXCONFIG, val);
+-              val = br32(bp, B44_CAM_CTRL);
+-              bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
++              bw32(B44_RXCONFIG, val);
++              val = br32(B44_CAM_CTRL);
++              bw32(B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
+       }
+ }
+ 
+@@ -1704,19 +1737,41 @@
+ {
+       u8 eeprom[128];
+       int err;
++      unsigned long flags;
+ 
+-      err = b44_read_eeprom(bp, &eeprom[0]);
+-      if (err)
+-              goto out;
+-
+-      bp->dev->dev_addr[0] = eeprom[79];
+-      bp->dev->dev_addr[1] = eeprom[78];
+-      bp->dev->dev_addr[2] = eeprom[81];
+-      bp->dev->dev_addr[3] = eeprom[80];
+-      bp->dev->dev_addr[4] = eeprom[83];
+-      bp->dev->dev_addr[5] = eeprom[82];
+-
+-      bp->phy_addr = eeprom[90] & 0x1f;
++      if (bp->pdev->device == PCI_DEVICE_ID_BCM4713) {
++              /* 
++               * BCM47xx boards don't have a EEPROM. The MAC is stored in
++               * a NVRAM area somewhere in the flash memory. As we don't
++               * know the location and/or the format of the NVRAM area
++               * here, we simply rely on the bootloader to write the
++               * MAC into the CAM.
++               */
++              spin_lock_irqsave(&bp->lock, flags);
++              __b44_cam_read(bp, bp->dev->dev_addr, 0);
++              spin_unlock_irqrestore(&bp->lock, flags);
++
++              /* 
++               * BCM47xx boards don't have a PHY. Usually there is a switch
++               * chip with multiple PHYs connected to the PHY port.
++               */
++              bp->phy_addr = B44_PHY_ADDR_NO_PHY;
++              bp->dma_offset = 0;
++      } else {
++              err = b44_read_eeprom(bp, &eeprom[0]);
++              if (err)
++                      return err;
++
++              bp->dev->dev_addr[0] = eeprom[79];
++              bp->dev->dev_addr[1] = eeprom[78];
++              bp->dev->dev_addr[2] = eeprom[81];
++              bp->dev->dev_addr[3] = eeprom[80];
++              bp->dev->dev_addr[4] = eeprom[83];
++              bp->dev->dev_addr[5] = eeprom[82];
++
++              bp->phy_addr = eeprom[90] & 0x1f;
++              bp->dma_offset = SB_PCI_DMA;
++      } 
+ 
+       /* With this, plus the rx_header prepended to the data by the
+        * hardware, we'll land the ethernet header on a 2-byte boundary.
+@@ -1726,13 +1781,12 @@
+       bp->imask = IMASK_DEF;
+ 
+       bp->core_unit = ssb_core_unit(bp);
+-      bp->dma_offset = SB_PCI_DMA;
+ 
+       /* XXX - really required? 
+          bp->flags |= B44_FLAG_BUGGY_TXPTR;
+          */
+-out:
+-      return err;
++
++      return 0;
+ }
+ 
+ static int __devinit b44_init_one(struct pci_dev *pdev,
+@@ -1810,7 +1864,7 @@
+ 
+       spin_lock_init(&bp->lock);
+ 
+-      bp->regs = ioremap(b44reg_base, b44reg_len);
++      bp->regs = (unsigned long) ioremap(b44reg_base, b44reg_len);
+       if (bp->regs == 0UL) {
+               printk(KERN_ERR PFX "Cannot map device registers, "
+                      "aborting.\n");
+@@ -1871,7 +1925,8 @@
+ 
+       pci_save_state(bp->pdev);
+ 
+-      printk(KERN_INFO "%s: Broadcom 4400 10/100BaseT Ethernet ", dev->name);
++      printk(KERN_INFO "%s: Broadcom %s 10/100BaseT Ethernet ", dev->name,
++              (pdev->device == PCI_DEVICE_ID_BCM4713) ? "47xx" : "4400");
+       for (i = 0; i < 6; i++)
+               printk("%2.2x%c", dev->dev_addr[i],
+                      i == 5 ? '\n' : ':');
+@@ -1879,7 +1934,7 @@
+       return 0;
+ 
+ err_out_iounmap:
+-      iounmap(bp->regs);
++      iounmap((void *) bp->regs);
+ 
+ err_out_free_dev:
+       free_netdev(dev);
+@@ -1901,7 +1956,7 @@
+               struct b44 *bp = netdev_priv(dev);
+ 
+               unregister_netdev(dev);
+-              iounmap(bp->regs);
++              iounmap((void *) bp->regs);
+               free_netdev(dev);
+               pci_release_regions(pdev);
+               pci_disable_device(pdev);
+diff -Nur linux-2.6.12.5/drivers/net/b44.h linux-2.6.12.5-b44/drivers/net/b44.h
+--- linux-2.6.12.5/drivers/net/b44.h   2005-08-15 02:20:18.000000000 +0200
++++ linux-2.6.12.5-b44/drivers/net/b44.h       2005-09-16 11:06:16.393533960 +0200
+@@ -292,6 +292,9 @@
+ #define SSB_PCI_MASK1         0xfc000000
+ #define SSB_PCI_MASK2         0xc0000000
+ 
++#define br32(REG)     readl((void *)bp->regs + (REG))
++#define bw32(REG,VAL) writel((VAL), (void *)bp->regs + (REG))
++
+ /* 4400 PHY registers */
+ #define B44_MII_AUXCTRL               24      /* Auxiliary Control */
+ #define  MII_AUXCTRL_DUPLEX   0x0001  /* Full Duplex */
+@@ -345,6 +348,8 @@
+ };
+ 
+ #define B44_MCAST_TABLE_SIZE  32
++#define B44_PHY_ADDR_NO_PHY   30
++#define B44_MDC_RATIO         5000000
+ 
+ /* SW copy of device statistics, kept up to date by periodic timer
+  * which probes HW values.  Must have same relative layout as HW
+@@ -410,7 +415,7 @@
+       struct net_device_stats stats;
+       struct b44_hw_stats     hw_stats;
+ 
+-      void __iomem            *regs;
++      unsigned long           regs;
+       struct pci_dev          *pdev;
+       struct net_device       *dev;
+ 
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