--- /dev/null
+CONFIG_AG71XX=y
+CONFIG_AG71XX_AR8216_SUPPORT=y
+# CONFIG_AG71XX_DEBUG is not set
+# CONFIG_AG71XX_DEBUG_FS is not set
+CONFIG_AR71XX_DEV_AP91_PCI=y
+CONFIG_AR71XX_DEV_AP94_PCI=y
+CONFIG_AR71XX_DEV_AR9XXX_WMAC=y
+CONFIG_AR71XX_DEV_DB120_PCI=y
+CONFIG_AR71XX_DEV_DSA=y
+CONFIG_AR71XX_DEV_GPIO_BUTTONS=y
+CONFIG_AR71XX_DEV_LEDS_GPIO=y
+CONFIG_AR71XX_DEV_M25P80=y
+CONFIG_AR71XX_DEV_PB42_PCI=y
+CONFIG_AR71XX_DEV_PB9X_PCI=y
+CONFIG_AR71XX_DEV_USB=y
+CONFIG_AR71XX_MACH_AP121=y
+CONFIG_AR71XX_MACH_AP81=y
+CONFIG_AR71XX_MACH_AP83=y
+CONFIG_AR71XX_MACH_AP96=y
+CONFIG_AR71XX_MACH_AW_NR580=y
+CONFIG_AR71XX_MACH_DB120=y
+CONFIG_AR71XX_MACH_DIR_600_A1=y
+CONFIG_AR71XX_MACH_DIR_615_C1=y
+CONFIG_AR71XX_MACH_DIR_825_B1=y
+CONFIG_AR71XX_MACH_EAP7660D=y
+CONFIG_AR71XX_MACH_JA76PF=y
+CONFIG_AR71XX_MACH_JWAP003=y
+CONFIG_AR71XX_MACH_MZK_W04NU=y
+CONFIG_AR71XX_MACH_MZK_W300NH=y
+CONFIG_AR71XX_MACH_NBG460N=y
+CONFIG_AR71XX_MACH_PB42=y
+CONFIG_AR71XX_MACH_PB44=y
+CONFIG_AR71XX_MACH_PB92=y
+CONFIG_AR71XX_MACH_RB4XX=y
+CONFIG_AR71XX_MACH_RB750=y
+CONFIG_AR71XX_MACH_TEW_632BRP=y
+CONFIG_AR71XX_MACH_TL_MR3X20=y
+CONFIG_AR71XX_MACH_TL_WA901ND=y
+CONFIG_AR71XX_MACH_TL_WA901ND_V2=y
+CONFIG_AR71XX_MACH_TL_WR1043ND=y
+CONFIG_AR71XX_MACH_TL_WR741ND=y
+CONFIG_AR71XX_MACH_TL_WR841N_V1=y
+CONFIG_AR71XX_MACH_TL_WR941ND=y
+CONFIG_AR71XX_MACH_UBNT=y
+CONFIG_AR71XX_MACH_WNDR3700=y
+CONFIG_AR71XX_MACH_WNR2000=y
+CONFIG_AR71XX_MACH_WP543=y
+CONFIG_AR71XX_MACH_WRT160NL=y
+CONFIG_AR71XX_MACH_WRT400N=y
+CONFIG_AR71XX_MACH_WZR_HP_AG300H=y
+CONFIG_AR71XX_MACH_WZR_HP_G300NH=y
+CONFIG_AR71XX_MACH_ZCN_1523H=y
+CONFIG_AR71XX_NVRAM=y
+CONFIG_AR71XX_PCI_ATH9K_FIXUP=y
+CONFIG_AR71XX_WDT=y
+CONFIG_AR8216_PHY=y
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_ATH79 is not set
+CONFIG_ATHEROS_AR71XX=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd"
+CONFIG_CMDLINE_BOOL=y
+# CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS32_R1 is not set
+CONFIG_CPU_MIPS32_R2=y
+CONFIG_CPU_MIPSR2=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CSRC_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_FSNOTIFY is not set
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_NXP_74HC153=y
+CONFIG_GPIO_PCF857X=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IRQ_WORK=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HW_HAS_PCI=y
+CONFIG_I2C=y
+CONFIG_I2C_ALGOBIT=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_GPIO=y
+# CONFIG_I2C_PXA_PCI is not set
+CONFIG_IMAGE_CMDLINE_HACK=y
+CONFIG_INITRAMFS_ROOT_GID=0
+CONFIG_INITRAMFS_ROOT_UID=0
+CONFIG_INITRAMFS_SOURCE="../../root"
+CONFIG_IP17XX_PHY=y
+CONFIG_IRQ_CPU=y
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_LEDS_RB750 is not set
+# CONFIG_LEDS_WNDR3700_USB is not set
+# CONFIG_M25PXX_USE_FAST_READ is not set
+CONFIG_MACH_NO_WESTBRIDGE=y
+CONFIG_MARVELL_PHY=y
+CONFIG_MICREL_PHY=y
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+CONFIG_MIPS=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_MIPS_MACHINE=y
+CONFIG_MIPS_MT_DISABLED=y
+CONFIG_MTD_AR91XX_FLASH=y
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_MYLOADER_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_WRT160NL_PARTS=y
+CONFIG_MYLOADER=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_MV88E6060=y
+CONFIG_NET_DSA_MV88E6063=y
+CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PCI=y
+CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PHYLIB=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_RTL8306_PHY=y
+CONFIG_RTL8366RB_PHY=y
+CONFIG_RTL8366S_PHY=y
+CONFIG_RTL8366_SMI=y
+# CONFIG_SCSI_DMA is not set
+CONFIG_SERIAL_8250_NR_UARTS=1
+CONFIG_SERIAL_8250_RUNTIME_UARTS=1
+CONFIG_SERIAL_AR933X=y
+CONFIG_SERIAL_AR933X_CONSOLE=y
+CONFIG_SERIAL_AR933X_NR_UARTS=2
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+CONFIG_SOC_AR71XX=y
+CONFIG_SOC_AR724X=y
+CONFIG_SOC_AR913X=y
+CONFIG_SOC_AR933X=y
+CONFIG_SOC_AR934X=y
+CONFIG_SPI=y
+CONFIG_SPI_AP83=y
+CONFIG_SPI_AR71XX=y
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_PB44=y
+CONFIG_SWCONFIG=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_CPU_MIPS32_R2=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_USB_SUPPORT=y
+CONFIG_XZ_DEC=y
+CONFIG_ZONE_DMA_FLAG=0
--- /dev/null
+/*
+ * Atheros AR933X SoC built-in UART driver
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/sysrq.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial_core.h>
+#include <linux/serial.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+
+#include <asm/mach-ar71xx/ar933x_uart.h>
+#include <asm/mach-ar71xx/ar933x_uart_platform.h>
+
+#define DRIVER_NAME "ar933x-uart"
+
+#define AR933X_DUMMY_STATUS_RD 0x01
+
+static struct uart_driver ar933x_uart_driver;
+
+struct ar933x_uart_port {
+ struct uart_port port;
+ unsigned int ier; /* shadow Interrupt Enable Register */
+};
+
+static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
+ int offset)
+{
+ return readl(up->port.membase + offset);
+}
+
+static inline void ar933x_uart_write(struct ar933x_uart_port *up,
+ int offset, unsigned int value)
+{
+ writel(value, up->port.membase + offset);
+}
+
+static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
+ unsigned int offset,
+ unsigned int mask,
+ unsigned int val)
+{
+ unsigned int t;
+
+ t = ar933x_uart_read(up, offset);
+ t &= ~mask;
+ t |= val;
+ ar933x_uart_write(up, offset, t);
+}
+
+static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
+ unsigned int offset,
+ unsigned int val)
+{
+ ar933x_uart_rmw(up, offset, 0, val);
+}
+
+static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
+ unsigned int offset,
+ unsigned int val)
+{
+ ar933x_uart_rmw(up, offset, val, 0);
+}
+
+static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
+{
+ up->ier |= AR933X_UART_INT_TX_EMPTY;
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
+}
+
+static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
+{
+ up->ier &= ~AR933X_UART_INT_TX_EMPTY;
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
+}
+
+static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
+{
+ unsigned int rdata;
+
+ rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
+ rdata |= AR933X_UART_DATA_TX_CSR;
+ ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
+}
+
+static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+ unsigned long flags;
+ unsigned int rdata;
+
+ spin_lock_irqsave(&up->port.lock, flags);
+ rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
+ spin_unlock_irqrestore(&up->port.lock, flags);
+
+ return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
+}
+
+static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
+{
+ return TIOCM_CAR;
+}
+
+static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+}
+
+static void ar933x_uart_start_tx(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+
+ ar933x_uart_start_tx_interrupt(up);
+}
+
+static void ar933x_uart_stop_tx(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+
+ ar933x_uart_stop_tx_interrupt(up);
+}
+
+static void ar933x_uart_stop_rx(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+
+ up->ier &= ~AR933X_UART_INT_RX_VALID;
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
+}
+
+static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+ unsigned long flags;
+
+ spin_lock_irqsave(&up->port.lock, flags);
+ if (break_state == -1)
+ ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
+ AR933X_UART_CS_TX_BREAK);
+ else
+ ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
+ AR933X_UART_CS_TX_BREAK);
+ spin_unlock_irqrestore(&up->port.lock, flags);
+}
+
+static void ar933x_uart_enable_ms(struct uart_port *port)
+{
+}
+
+static void ar933x_uart_set_termios(struct uart_port *port,
+ struct ktermios *new,
+ struct ktermios *old)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+ unsigned int cs;
+ unsigned long flags;
+ unsigned int baud, scale;
+
+ /* Only CS8 is supported */
+ new->c_cflag &= ~CSIZE;
+ new->c_cflag |= CS8;
+
+ /* Only one stop bit is supported */
+ new->c_cflag &= ~CSTOPB;
+
+ cs = 0;
+ if (new->c_cflag & PARENB) {
+ if (!(new->c_cflag & PARODD))
+ cs |= AR933X_UART_CS_PARITY_EVEN;
+ else
+ cs |= AR933X_UART_CS_PARITY_ODD;
+ } else {
+ cs |= AR933X_UART_CS_PARITY_NONE;
+ }
+
+ /* Mark/space parity is not supported */
+ new->c_cflag &= ~CMSPAR;
+
+ baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
+ scale = (port->uartclk / (16 * baud)) - 1;
+
+ /*
+ * Ok, we're now changing the port state. Do it with
+ * interrupts disabled.
+ */
+ spin_lock_irqsave(&up->port.lock, flags);
+
+ /* Update the per-port timeout. */
+ uart_update_timeout(port, new->c_cflag, baud);
+
+ up->port.ignore_status_mask = 0;
+
+ /* ignore all characters if CREAD is not set */
+ if ((new->c_cflag & CREAD) == 0)
+ up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
+
+ ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
+ scale << AR933X_UART_CLOCK_SCALE_S | 8192);
+
+ /* setup configuration register */
+ ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
+
+ /* enable host interrupt */
+ ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
+ AR933X_UART_CS_HOST_INT_EN);
+
+ spin_unlock_irqrestore(&up->port.lock, flags);
+
+ if (tty_termios_baud_rate(new))
+ tty_termios_encode_baud_rate(new, baud, baud);
+}
+
+static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
+{
+ struct tty_struct *tty;
+ int max_count = 256;
+
+ tty = tty_port_tty_get(&up->port.state->port);
+ do {
+ unsigned int rdata;
+ unsigned char ch;
+
+ rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
+ if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
+ break;
+
+ /* remove the character from the FIFO */
+ ar933x_uart_write(up, AR933X_UART_DATA_REG,
+ AR933X_UART_DATA_RX_CSR);
+
+ if (!tty) {
+ /* discard the data if no tty available */
+ continue;
+ }
+
+ up->port.icount.rx++;
+ ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
+
+ if (uart_handle_sysrq_char(&up->port, ch))
+ continue;
+
+ if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
+ tty_insert_flip_char(tty, ch, TTY_NORMAL);
+ } while (max_count-- > 0);
+
+ if (tty) {
+ tty_flip_buffer_push(tty);
+ tty_kref_put(tty);
+ }
+}
+
+static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
+{
+ struct circ_buf *xmit = &up->port.state->xmit;
+ int count;
+
+ if (uart_tx_stopped(&up->port))
+ return;
+
+ count = up->port.fifosize;
+ do {
+ unsigned int rdata;
+
+ rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
+ if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
+ break;
+
+ if (up->port.x_char) {
+ ar933x_uart_putc(up, up->port.x_char);
+ up->port.icount.tx++;
+ up->port.x_char = 0;
+ continue;
+ }
+
+ if (uart_circ_empty(xmit))
+ break;
+
+ ar933x_uart_putc(up, xmit->buf[xmit->tail]);
+
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ up->port.icount.tx++;
+ } while (--count > 0);
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(&up->port);
+
+ if (!uart_circ_empty(xmit))
+ ar933x_uart_start_tx_interrupt(up);
+}
+
+static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
+{
+ struct ar933x_uart_port *up = dev_id;
+ unsigned int status;
+
+ status = ar933x_uart_read(up, AR933X_UART_CS_REG);
+ if ((status & AR933X_UART_CS_HOST_INT) == 0)
+ return IRQ_NONE;
+
+ spin_lock(&up->port.lock);
+
+ status = ar933x_uart_read(up, AR933X_UART_INT_REG);
+ status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
+
+ if (status & AR933X_UART_INT_RX_VALID) {
+ ar933x_uart_write(up, AR933X_UART_INT_REG,
+ AR933X_UART_INT_RX_VALID);
+ ar933x_uart_rx_chars(up);
+ }
+
+ if (status & AR933X_UART_INT_TX_EMPTY) {
+ ar933x_uart_write(up, AR933X_UART_INT_REG,
+ AR933X_UART_INT_TX_EMPTY);
+ ar933x_uart_stop_tx_interrupt(up);
+ ar933x_uart_tx_chars(up);
+ }
+
+ spin_unlock(&up->port.lock);
+
+ return IRQ_HANDLED;
+}
+
+static int ar933x_uart_startup(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+ unsigned long flags;
+ int ret;
+
+ ret = request_irq(up->port.irq, ar933x_uart_interrupt,
+ up->port.irqflags, dev_name(up->port.dev), up);
+ if (ret)
+ return ret;
+
+ spin_lock_irqsave(&up->port.lock, flags);
+
+ /* Enable HOST interrupts */
+ ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
+ AR933X_UART_CS_HOST_INT_EN);
+
+ /* Enable RX interrupts */
+ up->ier = AR933X_UART_INT_RX_VALID;
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
+
+ spin_unlock_irqrestore(&up->port.lock, flags);
+
+ return 0;
+}
+
+static void ar933x_uart_shutdown(struct uart_port *port)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+
+ /* Disable all interrupts */
+ up->ier = 0;
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
+
+ /* Disable break condition */
+ ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
+ AR933X_UART_CS_TX_BREAK);
+
+ free_irq(up->port.irq, up);
+}
+
+static const char *ar933x_uart_type(struct uart_port *port)
+{
+ return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
+}
+
+static void ar933x_uart_release_port(struct uart_port *port)
+{
+ /* Nothing to release ... */
+}
+
+static int ar933x_uart_request_port(struct uart_port *port)
+{
+ /* UARTs always present */
+ return 0;
+}
+
+static void ar933x_uart_config_port(struct uart_port *port, int flags)
+{
+ if (flags & UART_CONFIG_TYPE)
+ port->type = PORT_AR933X;
+}
+
+static int ar933x_uart_verify_port(struct uart_port *port,
+ struct serial_struct *ser)
+{
+ if (ser->type != PORT_UNKNOWN &&
+ ser->type != PORT_AR933X)
+ return -EINVAL;
+
+ if (ser->irq < 0 || ser->irq >= NR_IRQS)
+ return -EINVAL;
+
+ if (ser->baud_base < 28800)
+ return -EINVAL;
+
+ return 0;
+}
+
+static struct uart_ops ar933x_uart_ops = {
+ .tx_empty = ar933x_uart_tx_empty,
+ .set_mctrl = ar933x_uart_set_mctrl,
+ .get_mctrl = ar933x_uart_get_mctrl,
+ .stop_tx = ar933x_uart_stop_tx,
+ .start_tx = ar933x_uart_start_tx,
+ .stop_rx = ar933x_uart_stop_rx,
+ .enable_ms = ar933x_uart_enable_ms,
+ .break_ctl = ar933x_uart_break_ctl,
+ .startup = ar933x_uart_startup,
+ .shutdown = ar933x_uart_shutdown,
+ .set_termios = ar933x_uart_set_termios,
+ .type = ar933x_uart_type,
+ .release_port = ar933x_uart_release_port,
+ .request_port = ar933x_uart_request_port,
+ .config_port = ar933x_uart_config_port,
+ .verify_port = ar933x_uart_verify_port,
+};
+
+#ifdef CONFIG_SERIAL_AR933X_CONSOLE
+
+static struct ar933x_uart_port *
+ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
+
+static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
+{
+ unsigned int status;
+ unsigned int timeout = 60000;
+
+ /* Wait up to 60ms for the character(s) to be sent. */
+ do {
+ status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
+ if (--timeout == 0)
+ break;
+ udelay(1);
+ } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
+}
+
+static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
+{
+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
+
+ ar933x_uart_wait_xmitr(up);
+ ar933x_uart_putc(up, ch);
+}
+
+static void ar933x_uart_console_write(struct console *co, const char *s,
+ unsigned int count)
+{
+ struct ar933x_uart_port *up = ar933x_console_ports[co->index];
+ unsigned long flags;
+ unsigned int int_en;
+ int locked = 1;
+
+ local_irq_save(flags);
+
+ if (up->port.sysrq)
+ locked = 0;
+ else if (oops_in_progress)
+ locked = spin_trylock(&up->port.lock);
+ else
+ spin_lock(&up->port.lock);
+
+ /*
+ * First save the IER then disable the interrupts
+ */
+ int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
+
+ uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
+
+ /*
+ * Finally, wait for transmitter to become empty
+ * and restore the IER
+ */
+ ar933x_uart_wait_xmitr(up);
+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
+
+ ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
+
+ if (locked)
+ spin_unlock(&up->port.lock);
+
+ local_irq_restore(flags);
+}
+
+static int ar933x_uart_console_setup(struct console *co, char *options)
+{
+ struct ar933x_uart_port *up;
+ int baud = 115200;
+ int bits = 8;
+ int parity = 'n';
+ int flow = 'n';
+
+ if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
+ return -EINVAL;
+
+ up = ar933x_console_ports[co->index];
+ if (!up)
+ return -ENODEV;
+
+ if (options)
+ uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+ return uart_set_options(&up->port, co, baud, parity, bits, flow);
+}
+
+static struct console ar933x_uart_console = {
+ .name = "ttyATH",
+ .write = ar933x_uart_console_write,
+ .device = uart_console_device,
+ .setup = ar933x_uart_console_setup,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+ .data = &ar933x_uart_driver,
+};
+
+static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
+{
+ ar933x_console_ports[up->port.line] = up;
+}
+
+#define AR933X_SERIAL_CONSOLE (&ar933x_uart_console)
+
+#else
+
+static inline void ar933x_uart_add_console_port(struct ar933x_uart_port *up) {}
+
+#define AR933X_SERIAL_CONSOLE NULL
+
+#endif /* CONFIG_SERIAL_AR933X_CONSOLE */
+
+static struct uart_driver ar933x_uart_driver = {
+ .owner = THIS_MODULE,
+ .driver_name = DRIVER_NAME,
+ .dev_name = "ttyATH",
+ .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
+ .cons = AR933X_SERIAL_CONSOLE,
+};
+
+static int __devinit ar933x_uart_probe(struct platform_device *pdev)
+{
+ struct ar933x_uart_platform_data *pdata;
+ struct ar933x_uart_port *up;
+ struct uart_port *port;
+ struct resource *mem_res;
+ struct resource *irq_res;
+ int id;
+ int ret;
+
+ pdata = pdev->dev.platform_data;
+ if (!pdata)
+ return -EINVAL;
+
+ id = pdev->id;
+ if (id == -1)
+ id = 0;
+
+ if (id > CONFIG_SERIAL_AR933X_NR_UARTS)
+ return -EINVAL;
+
+ mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem_res) {
+ dev_err(&pdev->dev, "no MEM resource\n");
+ return -EINVAL;
+ }
+
+ irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!irq_res) {
+ dev_err(&pdev->dev, "no IRQ resource\n");
+ return -EINVAL;
+ }
+
+ up = kzalloc(sizeof(struct ar933x_uart_port), GFP_KERNEL);
+ if (!up)
+ return -ENOMEM;
+
+ port = &up->port;
+ port->mapbase = mem_res->start;
+
+ port->membase = ioremap(mem_res->start, AR933X_UART_REGS_SIZE);
+ if (!port->membase) {
+ ret = -ENOMEM;
+ goto err_free_up;
+ }
+
+ port->line = id;
+ port->irq = irq_res->start;
+ port->dev = &pdev->dev;
+ port->type = PORT_AR933X;
+ port->iotype = UPIO_MEM32;
+ port->uartclk = pdata->uartclk;
+
+ port->regshift = 2;
+ port->fifosize = AR933X_UART_FIFO_SIZE;
+ port->ops = &ar933x_uart_ops;
+
+ ar933x_uart_add_console_port(up);
+
+ ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
+ if (ret)
+ goto err_unmap;
+
+ platform_set_drvdata(pdev, up);
+ return 0;
+
+err_unmap:
+ iounmap(up->port.membase);
+err_free_up:
+ kfree(up);
+ return ret;
+}
+
+static int __devexit ar933x_uart_remove(struct platform_device *pdev)
+{
+ struct ar933x_uart_port *up;
+
+ up = platform_get_drvdata(pdev);
+ platform_set_drvdata(pdev, NULL);
+
+ if (up) {
+ uart_remove_one_port(&ar933x_uart_driver, &up->port);
+ iounmap(up->port.membase);
+ kfree(up);
+ }
+
+ return 0;
+}
+
+static struct platform_driver ar933x_uart_platform_driver = {
+ .probe = ar933x_uart_probe,
+ .remove = __devexit_p(ar933x_uart_remove),
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init ar933x_uart_init(void)
+{
+ int ret;
+
+ ar933x_uart_driver.nr = CONFIG_SERIAL_AR933X_NR_UARTS;
+ ret = uart_register_driver(&ar933x_uart_driver);
+ if (ret)
+ goto err_out;
+
+ ret = platform_driver_register(&ar933x_uart_platform_driver);
+ if (ret)
+ goto err_unregister_uart_driver;
+
+ return 0;
+
+err_unregister_uart_driver:
+ uart_unregister_driver(&ar933x_uart_driver);
+err_out:
+ return ret;
+}
+
+static void __exit ar933x_uart_exit(void)
+{
+ platform_driver_unregister(&ar933x_uart_platform_driver);
+ uart_unregister_driver(&ar933x_uart_driver);
+}
+
+module_init(ar933x_uart_init);
+module_exit(ar933x_uart_exit);
+
+MODULE_DESCRIPTION("Atheros AR933X UART driver");
+MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" DRIVER_NAME);
--- /dev/null
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -158,6 +158,13 @@ cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -W
+ endif
+ cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1
+
++#
++# Atheros AR71xx
++#
++core-$(CONFIG_ATHEROS_AR71XX) += arch/mips/ar71xx/
++cflags-$(CONFIG_ATHEROS_AR71XX) += -I$(srctree)/arch/mips/include/asm/mach-ar71xx
++load-$(CONFIG_ATHEROS_AR71XX) += 0xffffffff80060000
++
+ cflags-$(CONFIG_CPU_R4000_WORKAROUNDS) += $(call cc-option,-mfix-r4000,)
+ cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += $(call cc-option,-mfix-r4400,)
+ cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS) += $(call cc-option,-mno-daddi,)
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -84,6 +84,23 @@ config ATH79
+ help
+ Support for the Atheros AR71XX/AR724X/AR913X SoCs.
+
++config ATHEROS_AR71XX
++ bool "Atheros AR71xx based boards"
++ select CEVT_R4K
++ select CSRC_R4K
++ select DMA_NONCOHERENT
++ select HW_HAS_PCI
++ select IRQ_CPU
++ select ARCH_REQUIRE_GPIOLIB
++ select SYS_HAS_CPU_MIPS32_R1
++ select SYS_HAS_CPU_MIPS32_R2
++ select SYS_SUPPORTS_32BIT_KERNEL
++ select SYS_SUPPORTS_BIG_ENDIAN
++ select SYS_HAS_EARLY_PRINTK
++ select MIPS_MACHINE
++ help
++ Support for Atheros AR71xx based boards.
++
+ config BCM47XX
+ bool "Broadcom BCM47XX based boards"
+ select CEVT_R4K
+@@ -739,6 +756,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
+ endchoice
+
+ source "arch/mips/alchemy/Kconfig"
++source "arch/mips/ar71xx/Kconfig"
+ source "arch/mips/ath79/Kconfig"
+ source "arch/mips/bcm63xx/Kconfig"
+ source "arch/mips/jazz/Kconfig"
--- /dev/null
+--- a/arch/mips/pci/Makefile
++++ b/arch/mips/pci/Makefile
+@@ -18,6 +18,7 @@ obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
+ obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o
+ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \
+ ops-bcm63xx.o
++obj-$(CONFIG_ATHEROS_AR71XX) += pci-ar71xx.o pci-ar724x.o
+
+ #
+ # These are still pretty much in the old state, watch, go blind.
--- /dev/null
+--- a/drivers/usb/host/Kconfig
++++ b/drivers/usb/host/Kconfig
+@@ -129,6 +129,13 @@ config XPS_USB_HCD_XILINX
+ config USB_FSL_MPH_DR_OF
+ tristate
+
++config USB_EHCI_AR71XX
++ bool "USB EHCI support for AR71xx"
++ depends on USB_EHCI_HCD && ATHEROS_AR71XX
++ default y
++ help
++ Support for Atheros AR71xx built-in EHCI controller
++
+ config USB_EHCI_FSL
+ bool "Support for Freescale on-chip EHCI USB controller"
+ depends on USB_EHCI_HCD && FSL_SOC
+@@ -287,6 +294,13 @@ config USB_OHCI_HCD_OMAP3
+ Enables support for the on-chip OHCI controller on
+ OMAP3 and later chips.
+
++config USB_OHCI_AR71XX
++ bool "USB OHCI support for Atheros AR71xx"
++ depends on USB_OHCI_HCD && ATHEROS_AR71XX
++ default y
++ help
++ Support for Atheros AR71xx built-in OHCI controller
++
+ config USB_OHCI_HCD_PPC_SOC
+ bool "OHCI support for on-chip PPC USB controller"
+ depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
+--- a/drivers/usb/host/ehci-hcd.c
++++ b/drivers/usb/host/ehci-hcd.c
+@@ -1267,6 +1267,11 @@ MODULE_LICENSE ("GPL");
+ #define PLATFORM_DRIVER tegra_ehci_driver
+ #endif
+
++#ifdef CONFIG_USB_EHCI_AR71XX
++#include "ehci-ar71xx.c"
++#define PLATFORM_DRIVER ehci_ar71xx_driver
++#endif
++
+ #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
+ !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
+ !defined(XILINX_OF_PLATFORM_DRIVER)
+--- a/drivers/usb/host/ohci-hcd.c
++++ b/drivers/usb/host/ohci-hcd.c
+@@ -1107,6 +1107,11 @@ MODULE_LICENSE ("GPL");
+ #define PLATFORM_DRIVER ohci_hcd_cns3xxx_driver
+ #endif
+
++#ifdef CONFIG_USB_OHCI_AR71XX
++#include "ohci-ar71xx.c"
++#define PLATFORM_DRIVER ohci_hcd_ar71xx_driver
++#endif
++
+ #if !defined(PCI_DRIVER) && \
+ !defined(PLATFORM_DRIVER) && \
+ !defined(OMAP1_PLATFORM_DRIVER) && \
--- /dev/null
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -67,6 +67,13 @@ config SPI_ATH79
+ This enables support for the SPI controller present on the
+ Atheros AR71XX/AR724X/AR913X SoCs.
+
++config SPI_AR71XX
++ tristate "Atheros AR71xx SPI Controller"
++ depends on SPI_MASTER && ATHEROS_AR71XX
++ select SPI_BITBANG
++ help
++ This is the SPI contoller driver for Atheros AR71xx.
++
+ config SPI_ATMEL
+ tristate "Atmel SPI Controller"
+ depends on (ARCH_AT91 || AVR32)
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -10,6 +10,7 @@ obj-$(CONFIG_SPI_MASTER) += spi.o
+
+ # SPI master controller drivers (bus)
+ obj-$(CONFIG_SPI_ALTERA) += spi_altera.o
++obj-$(CONFIG_SPI_AR71XX) += ar71xx_spi.o
+ obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
+ obj-$(CONFIG_SPI_ATH79) += ath79_spi.o
+ obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
--- /dev/null
+--- a/drivers/net/Kconfig
++++ b/drivers/net/Kconfig
+@@ -2071,6 +2071,8 @@ config ACENIC_OMIT_TIGON_I
+
+ The safe and default value for this is N.
+
++source drivers/net/ag71xx/Kconfig
++
+ config DL2K
+ tristate "DL2000/TC902x-based Gigabit Ethernet support"
+ depends on PCI
+--- a/drivers/net/Makefile
++++ b/drivers/net/Makefile
+@@ -112,6 +112,7 @@ obj-$(CONFIG_STMMAC_ETH) += stmmac/
+ # end link order section
+ #
+
++obj-$(CONFIG_AG71XX) += ag71xx/
+ obj-$(CONFIG_SUNDANCE) += sundance.o
+ obj-$(CONFIG_HAMACHI) += hamachi.o
+ obj-$(CONFIG_NET) += Space.o loopback.o
--- /dev/null
+--- a/drivers/watchdog/Kconfig
++++ b/drivers/watchdog/Kconfig
+@@ -990,6 +990,13 @@ config BCM63XX_WDT
+ To compile this driver as a loadable module, choose M here.
+ The module will be called bcm63xx_wdt.
+
++config AR71XX_WDT
++ tristate "Atheros AR71xx Watchdog Timer"
++ depends on ATHEROS_AR71XX
++ help
++ Hardware driver for the built-in watchdog timer on the Atheros
++ AR71xx SoCs.
++
+ # PARISC Architecture
+
+ # POWERPC Architecture
+--- a/drivers/watchdog/Makefile
++++ b/drivers/watchdog/Makefile
+@@ -119,6 +119,7 @@ obj-$(CONFIG_JZ4740_WDT) += jz4740_wdt.o
+ obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
+ obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o
+ obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
++obj-$(CONFIG_AR71XX_WDT) += ar71xx_wdt.o
+ obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
+ obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
+ obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
--- /dev/null
+--- a/drivers/mtd/maps/Kconfig
++++ b/drivers/mtd/maps/Kconfig
+@@ -260,6 +260,13 @@ config MTD_BCM963XX
+ Support for parsing CFE image tag and creating MTD partitions on
+ Broadcom BCM63xx boards.
+
++config MTD_AR91XX_FLASH
++ tristate "Atheros AR91xx parallel flash support"
++ depends on ATHEROS_AR71XX
++ select MTD_COMPLEX_MAPPINGS
++ help
++ Parallel flash driver for the Atheros AR91xx based boards.
++
+ config MTD_DILNETPC
+ tristate "CFI Flash device mapped on DIL/Net PC"
+ depends on X86 && MTD_PARTITIONS && MTD_CFI_INTELEXT && BROKEN
+--- a/drivers/mtd/maps/Makefile
++++ b/drivers/mtd/maps/Makefile
+@@ -40,6 +40,7 @@ obj-$(CONFIG_MTD_SCx200_DOCFLASH)+= scx2
+ obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.o
+ obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
+ obj-$(CONFIG_MTD_PCI) += pci.o
++obj-$(CONFIG_MTD_AR91XX_FLASH) += ar91xx_flash.o
+ obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
+ obj-$(CONFIG_MTD_EDB7312) += edb7312.o
+ obj-$(CONFIG_MTD_IMPA7) += impa7.o
--- /dev/null
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -119,6 +119,11 @@ config RTL8306_PHY
+ tristate "Driver for Realtek RTL8306S switches"
+ select SWCONFIG
+
++config MICREL_PHY
++ tristate "Drivers for Micrel/Kendin PHYs"
++ ---help---
++ Currently has a driver for the KSZ8041
++
+ config FIXED_PHY
+ bool "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
+ depends on PHYLIB=y
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -24,6 +24,7 @@ obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi
+ obj-$(CONFIG_RTL8366S_PHY) += rtl8366s.o
+ obj-$(CONFIG_RTL8366RB_PHY) += rtl8366rb.o
+ obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
++obj-$(CONFIG_MICREL_PHY) += micrel.o
+ obj-$(CONFIG_FIXED_PHY) += fixed.o
+ obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
+ obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -968,6 +968,16 @@ static int __devinit m25p_probe(struct s
+ part_probes, &parts, 0);
+ }
+
++#ifdef CONFIG_MTD_MYLOADER_PARTS
++ if (nr_parts <= 0) {
++ static const char *part_probes[]
++ = { "MyLoader", NULL, };
++
++ nr_parts = parse_mtd_partitions(&flash->mtd,
++ part_probes, &parts, 0);
++ }
++#endif
++
+ if (nr_parts <= 0 && data && data->parts) {
+ parts = data->parts;
+ nr_parts = data->nr_parts;
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -978,6 +978,15 @@ static int __devinit m25p_probe(struct s
+ }
+ #endif
+
++#ifdef CONFIG_MTD_REDBOOT_PARTS
++ if (nr_parts <= 0) {
++ static const char *part_probes[]
++ = { "RedBoot", NULL, };
++
++ nr_parts = parse_mtd_partitions(&flash->mtd,
++ part_probes, &parts, 0);
++ }
++#endif
+ if (nr_parts <= 0 && data && data->parts) {
+ parts = data->parts;
+ nr_parts = data->nr_parts;
--- /dev/null
+--- a/drivers/mtd/chips/jedec_probe.c
++++ b/drivers/mtd/chips/jedec_probe.c
+@@ -148,6 +148,7 @@
+ #define SST39LF160 0x2782
+ #define SST39VF1601 0x234b
+ #define SST39VF3201 0x235b
++#define SST39VF6401B 0x236d
+ #define SST39WF1601 0x274b
+ #define SST39WF1602 0x274a
+ #define SST39LF512 0x00D4
+@@ -1568,6 +1569,18 @@ static const struct amd_flash_info jedec
+ ERASEINFO(0x10000,64),
+ }
+ }, {
++ .mfr_id = CFI_MFR_SST,
++ .dev_id = SST39VF6401B,
++ .name = "SST 39VF6401B",
++ .devtypes = CFI_DEVICETYPE_X16,
++ .uaddr = MTD_UADDR_0xAAAA_0x5555,
++ .dev_size = SIZE_8MiB,
++ .cmd_set = P_ID_AMD_STD,
++ .nr_regions = 1,
++ .regions = {
++ ERASEINFO(0x10000,128)
++ }
++ }, {
+ .mfr_id = CFI_MFR_ST,
+ .dev_id = M29F800AB,
+ .name = "ST M29F800AB",
--- /dev/null
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -1219,8 +1219,8 @@ static int __xipram do_write_oneword(str
+ break;
+ }
+
+- if (chip_ready(map, adr))
+- break;
++ if (chip_good(map, adr, datum))
++ goto enable_xip;
+
+ /* Latency issues. Drop the lock, wait a while and retry */
+ UDELAY(map, chip, adr, 1);
+@@ -1236,6 +1236,8 @@ static int __xipram do_write_oneword(str
+
+ ret = -EIO;
+ }
++
++ enable_xip:
+ xip_enable(map, chip, adr);
+ op_done:
+ chip->state = FL_READY;
+@@ -1567,7 +1569,6 @@ static int cfi_amdstd_write_buffers(stru
+ return 0;
+ }
+
+-
+ /*
+ * Handle devices with one erase region, that only implement
+ * the chip erase command.
+@@ -1631,8 +1632,8 @@ static int __xipram do_erase_chip(struct
+ chip->erase_suspended = 0;
+ }
+
+- if (chip_ready(map, adr))
+- break;
++ if (chip_good(map, adr, map_word_ff(map)))
++ goto op_done;
+
+ if (time_after(jiffies, timeo)) {
+ printk(KERN_WARNING "MTD %s(): software timeout\n",
+@@ -1652,6 +1653,7 @@ static int __xipram do_erase_chip(struct
+ ret = -EIO;
+ }
+
++ op_done:
+ chip->state = FL_READY;
+ xip_enable(map, chip, adr);
+ put_chip(map, chip, adr);
+@@ -1719,9 +1721,9 @@ static int __xipram do_erase_oneblock(st
+ chip->erase_suspended = 0;
+ }
+
+- if (chip_ready(map, adr)) {
++ if (chip_good(map, adr, map_word_ff(map))) {
+ xip_enable(map, chip, adr);
+- break;
++ goto op_done;
+ }
+
+ if (time_after(jiffies, timeo)) {
+@@ -1743,6 +1745,7 @@ static int __xipram do_erase_oneblock(st
+ ret = -EIO;
+ }
+
++ op_done:
+ chip->state = FL_READY;
+ put_chip(map, chip, adr);
+ mutex_unlock(&chip->mutex);
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -987,6 +987,16 @@ static int __devinit m25p_probe(struct s
+ part_probes, &parts, 0);
+ }
+ #endif
++
++#ifdef CONFIG_MTD_WRT160NL_PARTS
++ if (nr_parts <= 0) {
++ static const char *part_probes[]
++ = { "wrt160nl", NULL, };
++
++ nr_parts = parse_mtd_partitions(&flash->mtd,
++ part_probes, &parts, 0);
++ }
++#endif
+ if (nr_parts <= 0 && data && data->parts) {
+ parts = data->parts;
+ nr_parts = data->nr_parts;
+--- a/drivers/mtd/Kconfig
++++ b/drivers/mtd/Kconfig
+@@ -176,6 +176,12 @@ config MTD_AR7_PARTS
+
+ endif # MTD_PARTITIONS
+
++config MTD_WRT160NL_PARTS
++ tristate "Linksys WRT160NL partitioning support"
++ depends on MTD_PARTITIONS && AR71XX_MACH_WRT160NL
++ ---help---
++ Linksys WRT160NL partitioning support
++
+ config MTD_MYLOADER_PARTS
+ tristate "MyLoader partition parsing"
+ depends on MTD_PARTITIONS && (ADM5120 || ATHEROS_AR231X || ATHEROS_AR71XX)
+--- a/drivers/mtd/Makefile
++++ b/drivers/mtd/Makefile
+@@ -12,6 +12,7 @@ obj-$(CONFIG_MTD_REDBOOT_PARTS) += redbo
+ obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
+ obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
+ obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
++obj-$(CONFIG_MTD_WRT160NL_PARTS) += wrt160nl_part.o
+ obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
+
+ # 'Users' - code which presents functionality to userspace.
--- /dev/null
+--- a/drivers/usb/host/ehci-q.c
++++ b/drivers/usb/host/ehci-q.c
+@@ -1183,6 +1183,9 @@ static void end_unlink_async (struct ehc
+ ehci->reclaim = NULL;
+ start_unlink_async (ehci, next);
+ }
++
++ if (ehci->has_synopsys_hc_bug)
++ writel((u32)ehci->async->qh_dma, &ehci->regs->async_next);
+ }
+
+ /* makes sure the async qh will become idle */
+--- a/drivers/usb/host/ehci.h
++++ b/drivers/usb/host/ehci.h
+@@ -134,6 +134,7 @@ struct ehci_hcd { /* one per controlle
+ unsigned amd_pll_fix:1;
+ unsigned fs_i_thresh:1; /* Intel iso scheduling */
+ unsigned use_dummy_qh:1; /* AMD Frame List table quirk*/
++ unsigned has_synopsys_hc_bug:1; /* Synopsys HC */
+
+ /* required for usb32 quirk */
+ #define OHCI_CTRL_HCFS (3 << 6)
--- /dev/null
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -39,7 +39,7 @@
+ #include <linux/mtd/xip.h>
+
+ #define AMD_BOOTLOC_BUG
+-#define FORCE_WORD_WRITE 0
++#define FORCE_WORD_WRITE 1
+
+ #define MAX_WORD_RETRIES 3
+
+@@ -50,7 +50,9 @@
+
+ static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
++#if !FORCE_WORD_WRITE
+ static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
++#endif
+ static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *);
+ static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);
+ static void cfi_amdstd_sync (struct mtd_info *);
+@@ -186,6 +188,7 @@ static void fixup_amd_bootblock(struct m
+ }
+ #endif
+
++#if !FORCE_WORD_WRITE
+ static void fixup_use_write_buffers(struct mtd_info *mtd)
+ {
+ struct map_info *map = mtd->priv;
+@@ -195,6 +198,7 @@ static void fixup_use_write_buffers(stru
+ mtd->write = cfi_amdstd_write_buffers;
+ }
+ }
++#endif /* !FORCE_WORD_WRITE */
+
+ /* Atmel chips don't use the same PRI format as AMD chips */
+ static void fixup_convert_atmel_pri(struct mtd_info *mtd)
+@@ -1379,6 +1383,7 @@ static int cfi_amdstd_write_words(struct
+ /*
+ * FIXME: interleaved mode not tested, and probably not supported!
+ */
++#if !FORCE_WORD_WRITE
+ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
+ unsigned long adr, const u_char *buf,
+ int len)
+@@ -1489,7 +1494,6 @@ static int __xipram do_write_buffer(stru
+ return ret;
+ }
+
+-
+ static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len,
+ size_t *retlen, const u_char *buf)
+ {
+@@ -1568,6 +1572,7 @@ static int cfi_amdstd_write_buffers(stru
+
+ return 0;
+ }
++#endif /* !FORCE_WORD_WRITE */
+
+ /*
+ * Handle devices with one erase region, that only implement
--- /dev/null
+--- a/net/dsa/tag_trailer.c
++++ b/net/dsa/tag_trailer.c
+@@ -87,7 +87,7 @@ static int trailer_rcv(struct sk_buff *s
+
+ trailer = skb_tail_pointer(skb) - 4;
+ if (trailer[0] != 0x80 || (trailer[1] & 0xf8) != 0x00 ||
+- (trailer[3] & 0xef) != 0x00 || trailer[3] != 0x00)
++ (trailer[2] & 0xef) != 0x00 || (trailer[3] & 0xfe) != 0x00)
+ goto out_drop;
+
+ source_port = trailer[1] & 7;
--- /dev/null
+--- a/net/dsa/Kconfig
++++ b/net/dsa/Kconfig
+@@ -36,6 +36,13 @@ config NET_DSA_MV88E6060
+ This enables support for the Marvell 88E6060 ethernet switch
+ chip.
+
++config NET_DSA_MV88E6063
++ bool "Marvell 88E6063 ethernet switch chip support"
++ select NET_DSA_TAG_TRAILER
++ ---help---
++ This enables support for the Marvell 88E6063 ethernet switch
++ chip
++
+ config NET_DSA_MV88E6XXX_NEED_PPU
+ bool
+ default n
+--- a/net/dsa/Makefile
++++ b/net/dsa/Makefile
+@@ -6,6 +6,7 @@ obj-$(CONFIG_NET_DSA_TAG_TRAILER) += tag
+ # switch drivers
+ obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx.o
+ obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o
++obj-$(CONFIG_NET_DSA_MV88E6063) += mv88e6063.o
+ obj-$(CONFIG_NET_DSA_MV88E6123_61_65) += mv88e6123_61_65.o
+ obj-$(CONFIG_NET_DSA_MV88E6131) += mv88e6131.o
+
--- /dev/null
+--- a/drivers/mtd/redboot.c
++++ b/drivers/mtd/redboot.c
+@@ -78,31 +78,32 @@ static int parse_redboot_partitions(stru
+ static char nullstring[] = "unallocated";
+ #endif
+
++ buf = vmalloc(master->erasesize);
++ if (!buf)
++ return -ENOMEM;
++
++ restart:
+ if ( directory < 0 ) {
+ offset = master->size + directory * master->erasesize;
+- while (master->block_isbad &&
++ while (master->block_isbad &&
+ master->block_isbad(master, offset)) {
+ if (!offset) {
+ nogood:
+ printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n");
++ vfree(buf);
+ return -EIO;
+ }
+ offset -= master->erasesize;
+ }
+ } else {
+ offset = directory * master->erasesize;
+- while (master->block_isbad &&
++ while (master->block_isbad &&
+ master->block_isbad(master, offset)) {
+ offset += master->erasesize;
+ if (offset == master->size)
+ goto nogood;
+ }
+ }
+- buf = vmalloc(master->erasesize);
+-
+- if (!buf)
+- return -ENOMEM;
+-
+ printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
+ master->name, offset);
+
+@@ -174,6 +175,11 @@ static int parse_redboot_partitions(stru
+ }
+ if (i == numslots) {
+ /* Didn't find it */
++ if (offset + master->erasesize < master->size) {
++ /* not at the end of the flash yet, maybe next block :) */
++ directory++;
++ goto restart;
++ }
+ printk(KERN_NOTICE "No RedBoot partition table detected in %s\n",
+ master->name);
+ ret = 0;
--- /dev/null
+--- a/drivers/Makefile
++++ b/drivers/Makefile
+@@ -46,8 +46,8 @@ obj-$(CONFIG_IDE) += ide/
+ obj-$(CONFIG_SCSI) += scsi/
+ obj-$(CONFIG_ATA) += ata/
+ obj-$(CONFIG_TARGET_CORE) += target/
+-obj-$(CONFIG_MTD) += mtd/
+ obj-$(CONFIG_SPI) += spi/
++obj-$(CONFIG_MTD) += mtd/
+ obj-y += net/
+ obj-$(CONFIG_ATM) += atm/
+ obj-$(CONFIG_FUSION) += message/
--- /dev/null
+--- a/include/linux/spi/spi.h
++++ b/include/linux/spi/spi.h
+@@ -441,6 +441,8 @@ struct spi_transfer {
+ dma_addr_t rx_dma;
+
+ unsigned cs_change:1;
++ unsigned verify:1;
++ unsigned fast_write:1;
+ u8 bits_per_word;
+ u16 delay_usecs;
+ u32 speed_hz;
+@@ -482,6 +484,7 @@ struct spi_message {
+ struct spi_device *spi;
+
+ unsigned is_dma_mapped:1;
++ unsigned fast_read:1;
+
+ /* REVISIT: we might want a flag affecting the behavior of the
+ * last transfer ... allowing things like "read 16 bit length L"
--- /dev/null
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -317,6 +317,12 @@ config SPI_PXA2XX
+ config SPI_PXA2XX_PCI
+ def_bool SPI_PXA2XX && X86_32 && PCI
+
++config SPI_RB4XX
++ tristate "Mikrotik RB4XX SPI master"
++ depends on SPI_MASTER && AR71XX_MACH_RB4XX
++ help
++ SPI controller driver for the Mikrotik RB4xx series boards.
++
+ config SPI_S3C24XX
+ tristate "Samsung S3C24XX series SPI"
+ depends on ARCH_S3C2410 && EXPERIMENTAL
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -56,6 +56,7 @@ obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.
+ obj-$(CONFIG_SPI_SH_MSIOF) += spi_sh_msiof.o
+ obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o
+ obj-$(CONFIG_SPI_NUC900) += spi_nuc900.o
++obj-$(CONFIG_SPI_RB4XX) += rb4xx_spi.o
+
+ # special build for s3c24xx spi driver with fiq support
+ spi_s3c24xx_hw-y := spi_s3c24xx.o
--- /dev/null
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -479,6 +479,13 @@ config SPI_TLE62X0
+ sysfs interface, with each line presented as a kind of GPIO
+ exposing both switch control and diagnostic feedback.
+
++config SPI_RB4XX_CPLD
++ tristate "MikroTik RB4XX CPLD driver"
++ depends on AR71XX_MACH_RB4XX
++ help
++ SPI driver for the Xilinx CPLD chip present on the
++ MikroTik RB4xx boards.
++
+ #
+ # Add new SPI protocol masters in alphabetical order above this line
+ #
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -65,6 +65,7 @@ spi_s3c24xx_hw-$(CONFIG_SPI_S3C24XX_FIQ)
+ # ... add above this line ...
+
+ # SPI protocol drivers (device/link on bus)
++obj-$(CONFIG_SPI_RB4XX_CPLD) += spi_rb4xx_cpld.o
+ obj-$(CONFIG_SPI_SPIDEV) += spidev.o
+ obj-$(CONFIG_SPI_TLE62X0) += tle62x0.o
+ # ... add above this line ...
--- /dev/null
+--- a/drivers/mtd/nand/Kconfig
++++ b/drivers/mtd/nand/Kconfig
+@@ -531,4 +531,8 @@ config MTD_NAND_FSMC
+ Enables support for NAND Flash chips on the ST Microelectronics
+ Flexible Static Memory Controller (FSMC)
+
++config MTD_NAND_RB4XX
++ tristate "NAND flash driver for RouterBoard 4xx series"
++ depends on MTD_NAND && AR71XX_MACH_RB4XX
++
+ endif # MTD_NAND
+--- a/drivers/mtd/nand/Makefile
++++ b/drivers/mtd/nand/Makefile
+@@ -34,6 +34,7 @@ obj-$(CONFIG_MTD_NAND_CM_X270) += cmx27
+ obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o
+ obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
+ obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
++obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o
+ obj-$(CONFIG_MTD_ALAUDA) += alauda.o
+ obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
+ obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
--- /dev/null
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -10,6 +10,7 @@ obj-$(CONFIG_SPI_MASTER) += spi.o
+
+ # SPI master controller drivers (bus)
+ obj-$(CONFIG_SPI_ALTERA) += spi_altera.o
++obj-$(CONFIG_SPI_AP83) += ap83_spi.o
+ obj-$(CONFIG_SPI_AR71XX) += ar71xx_spi.o
+ obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
+ obj-$(CONFIG_SPI_ATH79) += ath79_spi.o
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -67,6 +67,14 @@ config SPI_ATH79
+ This enables support for the SPI controller present on the
+ Atheros AR71XX/AR724X/AR913X SoCs.
+
++config SPI_AP83
++ tristate "Atheros AP83 specific SPI Controller"
++ depends on SPI_MASTER && AR71XX_MACH_AP83
++ select SPI_BITBANG
++ help
++ This is a specific SPI controller driver for the Atheros AP83
++ reference board.
++
+ config SPI_AR71XX
+ tristate "Atheros AR71xx SPI Controller"
+ depends on SPI_MASTER && ATHEROS_AR71XX
--- /dev/null
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -494,6 +494,11 @@ config SPI_RB4XX_CPLD
+ SPI driver for the Xilinx CPLD chip present on the
+ MikroTik RB4xx boards.
+
++config SPI_VSC7385
++ tristate "Vitesse VSC7385 ethernet switch driver"
++ help
++ SPI driver for the Vitesse VSC7385 ethernet switch.
++
+ #
+ # Add new SPI protocol masters in alphabetical order above this line
+ #
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -68,6 +68,7 @@ spi_s3c24xx_hw-$(CONFIG_SPI_S3C24XX_FIQ)
+ # SPI protocol drivers (device/link on bus)
+ obj-$(CONFIG_SPI_RB4XX_CPLD) += spi_rb4xx_cpld.o
+ obj-$(CONFIG_SPI_SPIDEV) += spidev.o
++obj-$(CONFIG_SPI_VSC7385) += spi_vsc7385.o
+ obj-$(CONFIG_SPI_TLE62X0) += tle62x0.o
+ # ... add above this line ...
+
--- /dev/null
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -82,6 +82,14 @@ config SPI_AR71XX
+ help
+ This is the SPI contoller driver for Atheros AR71xx.
+
++config SPI_PB44
++ tristate "Atheros PB44 board specific SPI controller"
++ depends on SPI_MASTER && AR71XX_MACH_PB44
++ select SPI_BITBANG
++ help
++ This is a specific SPI controller driver for the Atheros PB44
++ reference board.
++
+ config SPI_ATMEL
+ tristate "Atmel SPI Controller"
+ depends on (ARCH_AT91 || AVR32)
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -29,6 +29,7 @@ obj-$(CONFIG_SPI_GPIO) += spi_gpio.o
+ obj-$(CONFIG_SPI_GPIO_OLD) += spi_gpio_old.o
+ obj-$(CONFIG_SPI_IMX) += spi_imx.o
+ obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o
++obj-$(CONFIG_SPI_PB44) += pb44_spi.o
+ obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
+ obj-$(CONFIG_SPI_PXA2XX_PCI) += pxa2xx_spi_pci.o
+ obj-$(CONFIG_SPI_OC_TINY) += spi_oc_tiny.o
--- /dev/null
+--- a/drivers/leds/Kconfig
++++ b/drivers/leds/Kconfig
+@@ -387,6 +387,13 @@ config LEDS_TRIGGERS
+ These triggers allow kernel events to drive the LEDs and can
+ be configured via sysfs. If unsure, say Y.
+
++config LEDS_WNDR3700_USB
++ tristate "NETGEAR WNDR3700 USB LED driver"
++ depends on LEDS_CLASS && AR71XX_MACH_WNDR3700
++ help
++ This option enables support for the USB LED found on the
++ NETGEAR WNDR3700 board.
++
+ comment "LED Triggers"
+
+ config LEDS_TRIGGER_TIMER
+--- a/drivers/leds/Makefile
++++ b/drivers/leds/Makefile
+@@ -34,6 +34,7 @@ obj-$(CONFIG_LEDS_DA903X) += leds-da903
+ obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o
+ obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o
+ obj-$(CONFIG_LEDS_PWM) += leds-pwm.o
++obj-${CONFIG_LEDS_WNDR3700_USB} += leds-wndr3700-usb.o
+ obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o
+ obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o
+ obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o
--- /dev/null
+--- a/drivers/gpio/Kconfig
++++ b/drivers/gpio/Kconfig
+@@ -419,4 +419,13 @@ config AB8500_GPIO
+ depends on AB8500_CORE && BROKEN
+ help
+ Select this to enable the AB8500 IC GPIO driver
++
++comment "Other GPIO expanders"
++
++config GPIO_NXP_74HC153
++ tristate "NXP 74HC153 Dual 4-input multiplexer"
++ help
++ Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This
++ provides a GPIO interface supporting input mode only.
++
+ endif
+--- a/drivers/gpio/Makefile
++++ b/drivers/gpio/Makefile
+@@ -18,6 +18,7 @@ obj-$(CONFIG_GPIO_MAX7301) += max7301.o
+ obj-$(CONFIG_GPIO_MAX732X) += max732x.o
+ obj-$(CONFIG_GPIO_MC33880) += mc33880.o
+ obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o
++obj-$(CONFIG_GPIO_NXP_74HC153) += nxp_74hc153.o
+ obj-$(CONFIG_GPIO_74X164) += 74x164.o
+ obj-$(CONFIG_GPIO_PCA953X) += pca953x.o
+ obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o
--- /dev/null
+--- a/drivers/leds/Kconfig
++++ b/drivers/leds/Kconfig
+@@ -394,6 +394,10 @@ config LEDS_WNDR3700_USB
+ This option enables support for the USB LED found on the
+ NETGEAR WNDR3700 board.
+
++config LEDS_RB750
++ tristate "LED driver for the Mikrotik RouterBOARD 750"
++ depends on LEDS_CLASS && AR71XX_MACH_RB750
++
+ comment "LED Triggers"
+
+ config LEDS_TRIGGER_TIMER
+--- a/drivers/leds/Makefile
++++ b/drivers/leds/Makefile
+@@ -41,6 +41,7 @@ obj-$(CONFIG_LEDS_LT3593) += leds-lt359
+ obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o
+ obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o
+ obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o
++obj-$(CONFIG_LEDS_RB750) += leds-rb750.o
+ obj-$(CONFIG_LEDS_NS2) += leds-ns2.o
+ obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o
+
--- /dev/null
+--- a/drivers/mtd/nand/Kconfig
++++ b/drivers/mtd/nand/Kconfig
+@@ -535,4 +535,8 @@ config MTD_NAND_RB4XX
+ tristate "NAND flash driver for RouterBoard 4xx series"
+ depends on MTD_NAND && AR71XX_MACH_RB4XX
+
++config MTD_NAND_RB750
++ tristate "NAND flash driver for the RouterBoard 750"
++ depends on MTD_NAND && AR71XX_MACH_RB750
++
+ endif # MTD_NAND
+--- a/drivers/mtd/nand/Makefile
++++ b/drivers/mtd/nand/Makefile
+@@ -35,6 +35,7 @@ obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx
+ obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
+ obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
+ obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o
++obj-$(CONFIG_MTD_NAND_RB750) += rb750_nand.o
+ obj-$(CONFIG_MTD_ALAUDA) += alauda.o
+ obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
+ obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
--- /dev/null
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -181,6 +181,7 @@ endif
+ #
+ libs-$(CONFIG_ARC) += arch/mips/fw/arc/
+ libs-$(CONFIG_CFE) += arch/mips/fw/cfe/
++libs-$(CONFIG_MYLOADER) += arch/mips/fw/myloader/
+ libs-$(CONFIG_SNIPROM) += arch/mips/fw/sni/
+ libs-y += arch/mips/fw/lib/
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -933,6 +933,9 @@ config MIPS_NILE4
+ config MIPS_DISABLE_OBSOLETE_IDE
+ bool
+
++config MYLOADER
++ bool
++
+ config SYNC_R4K
+ bool
+
--- /dev/null
+--- a/drivers/mtd/nand/rb4xx_nand.c
++++ b/drivers/mtd/nand/rb4xx_nand.c
+@@ -223,7 +223,7 @@ static int __init rb4xx_nand_probe(struc
+
+ platform_set_drvdata(pdev, info);
+
+- ret = nand_scan_ident(&info->mtd, 1);
++ ret = nand_scan_ident(&info->mtd, 1, NULL);
+ if (ret) {
+ ret = -ENXIO;
+ goto err_free_info;
+--- a/drivers/mtd/nand/rb750_nand.c
++++ b/drivers/mtd/nand/rb750_nand.c
+@@ -287,7 +287,7 @@ static int __init rb750_nand_probe(struc
+
+ platform_set_drvdata(pdev, info);
+
+- ret = nand_scan_ident(&info->mtd, 1);
++ ret = nand_scan_ident(&info->mtd, 1, NULL);
+ if (ret) {
+ ret = -ENXIO;
+ goto err_free_info;
--- /dev/null
+--- a/drivers/tty/serial/Kconfig
++++ b/drivers/tty/serial/Kconfig
+@@ -1612,4 +1612,27 @@ config SERIAL_MXS_AUART_CONSOLE
+ help
+ Enable a MXS AUART port to be the system console.
+
++config SERIAL_AR933X
++ bool "AR933X serial port support"
++ depends on SOC_AR933X
++ select SERIAL_CORE
++ help
++ If you have an Atheros AR933X SOC based board and want to use the
++ built-in UART of the SoC, say Y to this option.
++
++config SERIAL_AR933X_CONSOLE
++ bool "Console on AR933X serial port"
++ depends on SERIAL_AR933X=y
++ select SERIAL_CORE_CONSOLE
++ help
++ Enable a built-in UART port of the AR933X to be the system console.
++
++config SERIAL_AR933X_NR_UARTS
++ int "Maximum number of AR933X serial ports"
++ depends on SERIAL_AR933X
++ default "2"
++ help
++ Set this to the number of serial ports you want the driver
++ to support.
++
+ endmenu
+--- a/drivers/tty/serial/Makefile
++++ b/drivers/tty/serial/Makefile
+@@ -94,3 +94,4 @@ obj-$(CONFIG_SERIAL_IFX6X60) += ifx6x6
+ obj-$(CONFIG_SERIAL_PCH_UART) += pch_uart.o
+ obj-$(CONFIG_SERIAL_MSM_SMD) += msm_smd_tty.o
+ obj-$(CONFIG_SERIAL_MXS_AUART) += mxs-auart.o
++obj-$(CONFIG_SERIAL_AR933X) += ar933x_uart.o
+--- a/include/linux/serial_core.h
++++ b/include/linux/serial_core.h
+@@ -202,6 +202,10 @@
+ /* VIA VT8500 SoC */
+ #define PORT_VT8500 97
+
++/* Atheros AR933X SoC */
++#define PORT_AR933X 99
++
++
+ #ifdef __KERNEL__
+
+ #include <linux/compiler.h>
--- /dev/null
+--- a/arch/mips/kernel/traps.c
++++ b/arch/mips/kernel/traps.c
+@@ -54,6 +54,7 @@
+ #include <asm/types.h>
+ #include <asm/stacktrace.h>
+ #include <asm/uasm.h>
++#include <asm/time.h>
+
+ extern void check_wait(void);
+ extern asmlinkage void r4k_wait(void);
+@@ -1576,6 +1577,8 @@ void __cpuinit per_cpu_trap_init(void)
+ if (cpu_has_mips_r2) {
+ cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
+ cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
++ if (get_c0_compare_irq)
++ cp0_compare_irq = get_c0_compare_irq();
+ cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
+ if (cp0_perfcount_irq == cp0_compare_irq)
+ cp0_perfcount_irq = -1;
+--- a/arch/mips/include/asm/time.h
++++ b/arch/mips/include/asm/time.h
+@@ -52,6 +52,7 @@ extern int (*perf_irq)(void);
+ */
+ #ifdef CONFIG_CEVT_R4K_LIB
+ extern unsigned int __weak get_c0_compare_int(void);
++extern unsigned int __weak get_c0_compare_irq(void);
+ extern int r4k_clockevent_init(void);
+ #endif
+
--- /dev/null
+--- a/arch/mips/ar71xx/irq.c
++++ b/arch/mips/ar71xx/irq.c
+@@ -37,13 +37,12 @@ static void ar71xx_gpio_irq_dispatch(voi
+ spurious_interrupt();
+ }
+
+-static void ar71xx_gpio_irq_unmask(unsigned int irq)
++static void ar71xx_gpio_irq_unmask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE;
+ void __iomem *base = ar71xx_gpio_base;
+ u32 t;
+
+- irq -= AR71XX_GPIO_IRQ_BASE;
+-
+ t = __raw_readl(base + GPIO_REG_INT_ENABLE);
+ __raw_writel(t | (1 << irq), base + GPIO_REG_INT_ENABLE);
+
+@@ -51,13 +50,12 @@ static void ar71xx_gpio_irq_unmask(unsig
+ (void) __raw_readl(base + GPIO_REG_INT_ENABLE);
+ }
+
+-static void ar71xx_gpio_irq_mask(unsigned int irq)
++static void ar71xx_gpio_irq_mask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE;
+ void __iomem *base = ar71xx_gpio_base;
+ u32 t;
+
+- irq -= AR71XX_GPIO_IRQ_BASE;
+-
+ t = __raw_readl(base + GPIO_REG_INT_ENABLE);
+ __raw_writel(t & ~(1 << irq), base + GPIO_REG_INT_ENABLE);
+
+@@ -67,9 +65,9 @@ static void ar71xx_gpio_irq_mask(unsigne
+
+ static struct irq_chip ar71xx_gpio_irq_chip = {
+ .name = "AR71XX GPIO",
+- .unmask = ar71xx_gpio_irq_unmask,
+- .mask = ar71xx_gpio_irq_mask,
+- .mask_ack = ar71xx_gpio_irq_mask,
++ .irq_unmask = ar71xx_gpio_irq_unmask,
++ .irq_mask = ar71xx_gpio_irq_mask,
++ .irq_mask_ack = ar71xx_gpio_irq_mask,
+ };
+
+ static struct irqaction ar71xx_gpio_irqaction = {
+@@ -95,7 +93,7 @@ static void __init ar71xx_gpio_irq_init(
+
+ for (i = AR71XX_GPIO_IRQ_BASE;
+ i < AR71XX_GPIO_IRQ_BASE + AR71XX_GPIO_IRQ_COUNT; i++)
+- set_irq_chip_and_handler(i, &ar71xx_gpio_irq_chip,
++ irq_set_chip_and_handler(i, &ar71xx_gpio_irq_chip,
+ handle_level_irq);
+
+ setup_irq(AR71XX_MISC_IRQ_GPIO, &ar71xx_gpio_irqaction);
+@@ -151,13 +149,12 @@ static void ar71xx_misc_irq_dispatch(voi
+ spurious_interrupt();
+ }
+
+-static void ar71xx_misc_irq_unmask(unsigned int irq)
++static void ar71xx_misc_irq_unmask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
+ void __iomem *base = ar71xx_reset_base;
+ u32 t;
+
+- irq -= AR71XX_MISC_IRQ_BASE;
+-
+ t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+ __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+@@ -165,13 +162,12 @@ static void ar71xx_misc_irq_unmask(unsig
+ (void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+ }
+
+-static void ar71xx_misc_irq_mask(unsigned int irq)
++static void ar71xx_misc_irq_mask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
+ void __iomem *base = ar71xx_reset_base;
+ u32 t;
+
+- irq -= AR71XX_MISC_IRQ_BASE;
+-
+ t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+ __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+@@ -179,13 +175,12 @@ static void ar71xx_misc_irq_mask(unsigne
+ (void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+ }
+
+-static void ar724x_misc_irq_ack(unsigned int irq)
++static void ar724x_misc_irq_ack(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
+ void __iomem *base = ar71xx_reset_base;
+ u32 t;
+
+- irq -= AR71XX_MISC_IRQ_BASE;
+-
+ t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
+ __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);
+
+@@ -195,8 +190,8 @@ static void ar724x_misc_irq_ack(unsigned
+
+ static struct irq_chip ar71xx_misc_irq_chip = {
+ .name = "AR71XX MISC",
+- .unmask = ar71xx_misc_irq_unmask,
+- .mask = ar71xx_misc_irq_mask,
++ .irq_unmask = ar71xx_misc_irq_unmask,
++ .irq_mask = ar71xx_misc_irq_mask,
+ };
+
+ static struct irqaction ar71xx_misc_irqaction = {
+@@ -221,16 +216,16 @@ static void __init ar71xx_misc_irq_init(
+ case AR71XX_SOC_AR9341:
+ case AR71XX_SOC_AR9342:
+ case AR71XX_SOC_AR9344:
+- ar71xx_misc_irq_chip.ack = ar724x_misc_irq_ack;
++ ar71xx_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
+ break;
+ default:
+- ar71xx_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
++ ar71xx_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
+ break;
+ }
+
+ for (i = AR71XX_MISC_IRQ_BASE;
+ i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++)
+- set_irq_chip_and_handler(i, &ar71xx_misc_irq_chip,
++ irq_set_chip_and_handler(i, &ar71xx_misc_irq_chip,
+ handle_level_irq);
+
+ setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction);
+--- a/arch/mips/pci/pci-ar71xx.c
++++ b/arch/mips/pci/pci-ar71xx.c
+@@ -329,13 +329,12 @@ static void ar71xx_pci_irq_handler(unsig
+ spurious_interrupt();
+ }
+
+-static void ar71xx_pci_irq_unmask(unsigned int irq)
++static void ar71xx_pci_irq_unmask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE;
+ void __iomem *base = ar71xx_reset_base;
+ u32 t;
+
+- irq -= AR71XX_PCI_IRQ_BASE;
+-
+ t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
+ __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
+
+@@ -343,13 +342,12 @@ static void ar71xx_pci_irq_unmask(unsign
+ (void) __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
+ }
+
+-static void ar71xx_pci_irq_mask(unsigned int irq)
++static void ar71xx_pci_irq_mask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE;
+ void __iomem *base = ar71xx_reset_base;
+ u32 t;
+
+- irq -= AR71XX_PCI_IRQ_BASE;
+-
+ t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
+ __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
+
+@@ -359,9 +357,9 @@ static void ar71xx_pci_irq_mask(unsigned
+
+ static struct irq_chip ar71xx_pci_irq_chip = {
+ .name = "AR71XX PCI ",
+- .mask = ar71xx_pci_irq_mask,
+- .unmask = ar71xx_pci_irq_unmask,
+- .mask_ack = ar71xx_pci_irq_mask,
++ .irq_mask = ar71xx_pci_irq_mask,
++ .irq_unmask = ar71xx_pci_irq_unmask,
++ .irq_mask_ack = ar71xx_pci_irq_mask,
+ };
+
+ static void __init ar71xx_pci_irq_init(void)
+@@ -374,10 +372,10 @@ static void __init ar71xx_pci_irq_init(v
+
+ for (i = AR71XX_PCI_IRQ_BASE;
+ i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
+- set_irq_chip_and_handler(i, &ar71xx_pci_irq_chip,
++ irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
+ handle_level_irq);
+
+- set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
++ irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
+ }
+
+ int __init ar71xx_pcibios_init(void)
+--- a/arch/mips/pci/pci-ar724x.c
++++ b/arch/mips/pci/pci-ar724x.c
+@@ -280,15 +280,13 @@ static void ar724x_pci_irq_handler(unsig
+ spurious_interrupt();
+ }
+
+-static void ar724x_pci_irq_unmask(unsigned int irq)
++static void ar724x_pci_irq_unmask(struct irq_data *d)
+ {
+ void __iomem *base = ar724x_pci_ctrl_base;
+ u32 t;
+
+- switch (irq) {
++ switch (d->irq) {
+ case AR71XX_PCI_IRQ_DEV0:
+- irq -= AR71XX_PCI_IRQ_BASE;
+-
+ t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
+ __raw_writel(t | AR724X_PCI_INT_DEV0,
+ base + AR724X_PCI_REG_INT_MASK);
+@@ -297,15 +295,13 @@ static void ar724x_pci_irq_unmask(unsign
+ }
+ }
+
+-static void ar724x_pci_irq_mask(unsigned int irq)
++static void ar724x_pci_irq_mask(struct irq_data *d)
+ {
+ void __iomem *base = ar724x_pci_ctrl_base;
+ u32 t;
+
+- switch (irq) {
++ switch (d->irq) {
+ case AR71XX_PCI_IRQ_DEV0:
+- irq -= AR71XX_PCI_IRQ_BASE;
+-
+ t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
+ __raw_writel(t & ~AR724X_PCI_INT_DEV0,
+ base + AR724X_PCI_REG_INT_MASK);
+@@ -324,9 +320,9 @@ static void ar724x_pci_irq_mask(unsigned
+
+ static struct irq_chip ar724x_pci_irq_chip = {
+ .name = "AR724X PCI ",
+- .mask = ar724x_pci_irq_mask,
+- .unmask = ar724x_pci_irq_unmask,
+- .mask_ack = ar724x_pci_irq_mask,
++ .irq_mask = ar724x_pci_irq_mask,
++ .irq_unmask = ar724x_pci_irq_unmask,
++ .irq_mask_ack = ar724x_pci_irq_mask,
+ };
+
+ static void __init ar724x_pci_irq_init(void)
+@@ -346,10 +342,10 @@ static void __init ar724x_pci_irq_init(v
+
+ for (i = AR71XX_PCI_IRQ_BASE;
+ i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
+- set_irq_chip_and_handler(i, &ar724x_pci_irq_chip,
++ irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
+ handle_level_irq);
+
+- set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar724x_pci_irq_handler);
++ irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar724x_pci_irq_handler);
+ }
+
+ int __init ar724x_pcibios_init(void)
projects / openwrt.git / commitdiff