#define RTL8366RB_PHY_NO_OFFSET 9
#define RTL8366RB_PHY_NO_MASK (0x1f << 9)
#define RTL8366RB_PHY_NO_OFFSET 9
#define RTL8366RB_PHY_NO_MASK (0x1f << 9)
+#define RTL8366RB_VLAN_INGRESS_CTRL2_REG 0x037f
+
/* LED control registers */
#define RTL8366RB_LED_BLINKRATE_REG 0x0430
#define RTL8366RB_LED_BLINKRATE_BIT 0
/* LED control registers */
#define RTL8366RB_LED_BLINKRATE_REG 0x0430
#define RTL8366RB_LED_BLINKRATE_BIT 0
/* disable auto ageing for all ports */
REG_WR(smi, RTL8366RB_SSCR1, RTL8366RB_PORT_ALL);
/* disable auto ageing for all ports */
REG_WR(smi, RTL8366RB_SSCR1, RTL8366RB_PORT_ALL);
+ /*
+ * discard VLAN tagged packets if the port is not a member of
+ * the VLAN with which the packets is associated.
+ */
+ REG_WR(smi, RTL8366RB_VLAN_INGRESS_CTRL2_REG, RTL8366RB_PORT_ALL);
+
/* don't drop packets whose DA has not been learned */
REG_RMW(smi, RTL8366RB_SSCR2, RTL8366RB_SSCR2_DROP_UNKNOWN_DA, 0);
/* don't drop packets whose DA has not been learned */
REG_RMW(smi, RTL8366RB_SSCR2, RTL8366RB_SSCR2_DROP_UNKNOWN_DA, 0);
#define RTL8366S_VLAN_MEMCONF_BASE 0x0016
#define RTL8366S_VLAN_MEMCONF_BASE 0x0016
+#define RTL8366S_VLAN_MEMBERINGRESS_REG 0x0379
#define RTL8366S_PORT_LINK_STATUS_BASE 0x0060
#define RTL8366S_PORT_STATUS_SPEED_MASK 0x0003
#define RTL8366S_PORT_LINK_STATUS_BASE 0x0060
#define RTL8366S_PORT_STATUS_SPEED_MASK 0x0003
/* disable auto ageing for all ports */
REG_WR(smi, RTL8366S_SSCR1, RTL8366S_PORT_ALL);
/* disable auto ageing for all ports */
REG_WR(smi, RTL8366S_SSCR1, RTL8366S_PORT_ALL);
+ /*
+ * discard VLAN tagged packets if the port is not a member of
+ * the VLAN with which the packets is associated.
+ */
+ REG_WR(smi, RTL8366S_VLAN_MEMBERINGRESS_REG, RTL8366S_PORT_ALL);
+
/* don't drop packets whose DA has not been learned */
REG_RMW(smi, RTL8366S_SSCR2, RTL8366S_SSCR2_DROP_UNKNOWN_DA, 0);
/* don't drop packets whose DA has not been learned */
REG_RMW(smi, RTL8366S_SSCR2, RTL8366S_SSCR2_DROP_UNKNOWN_DA, 0);